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i dont think any improvememnts werre made

This commit is contained in:
pszsh 2026-01-26 23:59:03 -08:00
parent e3ef13ecc3
commit 6b598ca97e
1 changed files with 82 additions and 62 deletions
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144
Impedance.c
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@ -81,39 +81,24 @@ int32_t AppIMPCtrl(uint32_t Command, void *pPara)
{
case IMPCTRL_START:
{
// CRITICAL CHANGE: Use Manual Triggering for Sweep to avoid timing hazards
if(AppIMPCfg.SweepCfg.SweepEn)
{
// Trigger first sequence manually
AD5940_SEQMmrTrig(SEQID_0);
}
else
{
// Use WUPT for Continuous Measure (fixed frequency)
WUPTCfg_Type wupt_cfg;
if(AD5940_WakeUp(10) > 10) return AD5940ERR_WAKEUP;
if(AppIMPCfg.IMPInited == bFALSE) return AD5940ERR_APPERROR;
wupt_cfg.WuptEn = bTRUE;
wupt_cfg.WuptEndSeq = WUPTENDSEQ_A;
wupt_cfg.WuptOrder[0] = SEQID_0;
wupt_cfg.SeqxSleepTime[SEQID_0] = 4;
uint32_t wait_cycles = (uint32_t)(AppIMPCfg.WuptClkFreq/AppIMPCfg.ImpODR);
if(wait_cycles < 20) wait_cycles = 20;
wupt_cfg.SeqxWakeupTime[SEQID_0] = wait_cycles - 4;
AD5940_WUPTCfg(&wupt_cfg);
}
// Unified Start Logic: Always use Manual Trigger + ENDSEQ Interrupt
AD5940_WUPTCtrl(bFALSE);
AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ENDSEQ, bTRUE);
AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_DATAFIFOTHRESH, bFALSE);
AD5940_INTCClrFlag(AFEINTSRC_ALLINT);
AppIMPCfg.FifoDataCount = 0;
AppIMPCfg.StopRequired = bFALSE;
// Trigger first sequence manually
AD5940_SEQMmrTrig(SEQID_0);
break;
}
case IMPCTRL_STOPNOW:
{
if(AD5940_WakeUp(10) > 10) return AD5940ERR_WAKEUP;
AD5940_WUPTCtrl(bFALSE);
AD5940_WUPTCtrl(bFALSE);
AD5940_SEQCtrlS(bFALSE);
break;
}
@ -359,7 +344,11 @@ static AD5940Err AppIMPSeqMeasureGen(void)
AFECTRL_SINC2NOTCH, bFALSE);
AD5940_SEQGpioCtrlS(0);
AD5940_EnterSleepS();
// REMOVED: AD5940_EnterSleepS();
// Keeping AFE active during sweep to prevent wake-up instability.
// CRITICAL FIX: Must stop sequencer to generate ENDSEQ interrupt
AD5940_SEQGenInsert(SEQ_STOP());
error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen);
AD5940_SEQGenCtrl(bFALSE);
@ -397,6 +386,8 @@ AD5940Err AppIMPCheckFreq(float freq)
AppIMPCfg.AdcClkFreq = 16e6;
AppIMPCfg.SysClkFreq = 16000000.0;
AD5940_HPModeEn(bFALSE);
// Allow clock to settle before further SPI writes
AD5940_Delay10us(50);
}
}
else
@ -406,6 +397,8 @@ AD5940Err AppIMPCheckFreq(float freq)
AppIMPCfg.AdcClkFreq = 32e6;
AppIMPCfg.SysClkFreq = 32000000.0;
AD5940_HPModeEn(bTRUE);
// Allow clock to settle before further SPI writes
AD5940_Delay10us(50);
}
}
@ -501,6 +494,9 @@ int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize)
AD5940_SEQCfg(&seq_cfg);
AD5940_SEQMmrTrig(AppIMPCfg.InitSeqInfo.SeqId);
// CRITICAL FIX: Ensure ENDSEQ interrupt is enabled for Init Sequence
AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ENDSEQ, bTRUE);
// Safety timeout for Init Sequence
int timeout = 100000;
while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE) {
@ -593,7 +589,8 @@ int32_t AppIMPDataProcess(int32_t * const pData, uint32_t *pDataCount)
else
ZMag = 0;
ZPhase = PhaseV - PhaseI;
// Correct Phase: TIA inverts current, so we add 180 degrees (PI)
ZPhase = PhaseV - PhaseI + MATH_PI;
// Normalize Phase to -PI to +PI
while(ZPhase > MATH_PI) ZPhase -= 2*MATH_PI;
@ -626,43 +623,66 @@ int32_t AppIMPISR(void *pBuff, uint32_t *pCount)
if(AD5940_WakeUp(10) > 10) return AD5940ERR_WAKEUP;
AD5940_SleepKeyCtrlS(SLPKEY_LOCK);
if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE)
{
FifoCnt = (AD5940_FIFOGetCnt()/6)*6; // Align to 6 words
if (FifoCnt == 0) {
// Safety: If interrupt fired but no data, clear flag and exit
AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH);
AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK);
return 0;
}
// Check Interrupt Source
uint32_t IntFlag = AD5940_INTCGetFlag(AFEINTC_1);
if(FifoCnt > BuffCount)
{
FifoCnt = BuffCount;
}
AD5940_FIFORd((uint32_t *)pBuff, FifoCnt);
AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH);
// Update Frequency
if (AppIMPRegModify(pBuff, &FifoCnt) == AD5940ERR_OK)
{
// CRITICAL: Manual Trigger Chain for Sweep
if(AppIMPCfg.SweepCfg.SweepEn)
{
// Only trigger next if we haven't reached the count
if(AppIMPCfg.FifoDataCount < AppIMPCfg.NumOfData)
{
AD5940_SEQMmrTrig(SEQID_0);
}
}
}
AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK);
AppIMPDataProcess((int32_t*)pBuff, &FifoCnt);
*pCount = FifoCnt;
return 0;
// Unified ISR: Handle ENDSEQ for both Sweep and Measure modes
if(IntFlag & AFEINTSRC_ENDSEQ)
{
// FIFO Latency Wait: Wait for data to arrive.
// Use a real delay loop to ensure we don't timeout prematurely.
int timeout = 100;
while(AD5940_FIFOGetCnt() < 6 && timeout-- > 0)
{
AD5940_Delay10us(10); // Wait 100us per check
}
// Read all available data
FifoCnt = (AD5940_FIFOGetCnt()/6)*6;
if(FifoCnt > BuffCount) FifoCnt = BuffCount;
AD5940_FIFORd((uint32_t *)pBuff, FifoCnt);
AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ);
// CRITICAL: Only advance if we actually got data.
// If FifoCnt is 0, it means we missed the data or it hasn't arrived.
// Advancing the sweep in this case causes desynchronization.
if (FifoCnt > 0)
{
// Update Frequency (Sweep) or Check Limits (Measure)
if (AppIMPRegModify(pBuff, &FifoCnt) == AD5940ERR_OK)
{
if(AppIMPCfg.FifoDataCount < AppIMPCfg.NumOfData || AppIMPCfg.NumOfData == -1)
{
if(AppIMPCfg.StopRequired == bFALSE)
{
// SRAM Write Settling: AppIMPRegModify writes to SRAM in Sweep Mode.
AD5940_Delay10us(20);
// SEQ_STOP Side Effects: Toggle Sequencer Enable
AD5940_SEQCtrlS(bFALSE);
AD5940_SEQCtrlS(bTRUE);
AD5940_SEQMmrTrig(SEQID_0);
}
}
}
AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK);
AppIMPDataProcess((int32_t*)pBuff, &FifoCnt);
*pCount = FifoCnt;
}
else
{
// Error Recovery: If we got ENDSEQ but no data, clear flags and unlock.
// We do NOT trigger the next point to avoid runaway errors.
AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK);
*pCount = 0;
}
return 0;
}
// Clear any other spurious flags
AD5940_INTCClrFlag(AFEINTSRC_ALLINT);
AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK);
return 0;
}