diff --git a/cue/src/app.rs b/cue/src/app.rs index a810ead..13bc053 100644 --- a/cue/src/app.rs +++ b/cue/src/app.rs @@ -8,7 +8,6 @@ use std::fmt::Write; use std::time::Duration; use tokio::sync::mpsc; -use crate::ble::BleEvent; use crate::native_menu::{MenuAction, NativeMenu}; use crate::protocol::{ self, AmpPoint, ClPoint, ClResult, Electrode, EisMessage, EisPoint, LpRtia, LsvPoint, @@ -79,14 +78,23 @@ pub enum Message { /* Reference baseline */ SetReference, ClearReference, + CollectRefs, + GetRefs, + ClearRefs, + /* Clean */ + CleanVChanged(String), + CleanDurChanged(String), + StartClean, /* Misc */ OpenMidiSetup, + RefreshMidi, } pub struct App { tab: Tab, status: String, cmd_tx: Option>>, + ble_connected: bool, panes: pane_grid::State, native_menu: NativeMenu, show_sysinfo: bool, @@ -138,15 +146,30 @@ pub struct App { ph_result: Option, ph_stabilize: String, - /* Reference baselines (tap water) */ + /* Reference baselines */ eis_ref: Option>, lsv_ref: Option>, amp_ref: Option>, cl_ref: Option<(Vec, ClResult)>, ph_ref: Option, + /* Device reference collection */ + collecting_refs: bool, + ref_mode: Option, + ref_rtia: Option, + has_device_refs: bool, + eis_refs: [Option>; 8], + lsv_lp_range: Option<(u8, u8)>, + amp_lp_range: Option<(u8, u8)>, + cl_lp_range: Option<(u8, u8)>, + + /* Clean */ + clean_v: String, + clean_dur: String, + /* Global */ temp_c: f32, + midi_gen: u64, } /* ---- data table formatting ---- */ @@ -254,6 +277,7 @@ impl App { tab: Tab::Eis, status: "Starting...".into(), cmd_tx: None, + ble_connected: false, panes: pane_grid::State::with_configuration(pane_grid::Configuration::Split { axis: pane_grid::Axis::Horizontal, ratio: 0.55, @@ -311,7 +335,20 @@ impl App { cl_ref: None, ph_ref: None, + collecting_refs: false, + ref_mode: None, + ref_rtia: None, + has_device_refs: false, + eis_refs: Default::default(), + lsv_lp_range: None, + amp_lp_range: None, + cl_lp_range: None, + + clean_v: "1200".into(), + clean_dur: "30".into(), + temp_c: 25.0, + midi_gen: 0, }, Task::none()) } @@ -328,23 +365,49 @@ impl App { match message { Message::BleReady(tx) => { self.cmd_tx = Some(tx); + self.ble_connected = true; self.send_cmd(&protocol::build_sysex_get_config()); } - Message::BleStatus(s) => self.status = s, + Message::BleStatus(s) => { + if s.contains("Reconnecting") || s.contains("Looking") { + self.ble_connected = false; + self.cmd_tx = None; + } + self.status = s; + } Message::BleData(msg) => match msg { EisMessage::SweepStart { num_points, freq_start, freq_stop } => { - self.eis_points.clear(); - self.sweep_total = num_points; - self.eis_data = text_editor::Content::with_text(&fmt_eis(&self.eis_points)); - self.status = format!("Sweep: {} pts, {:.0}--{:.0} Hz", num_points, freq_start, freq_stop); + if self.collecting_refs { + /* ref collection: clear temp buffer */ + self.eis_points.clear(); + self.sweep_total = num_points; + } else { + self.eis_points.clear(); + self.sweep_total = num_points; + self.eis_data = text_editor::Content::with_text(&fmt_eis(&self.eis_points)); + self.status = format!("Sweep: {} pts, {:.0}--{:.0} Hz", num_points, freq_start, freq_stop); + } } EisMessage::DataPoint { point, .. } => { - self.eis_points.push(point); - self.eis_data = text_editor::Content::with_text(&fmt_eis(&self.eis_points)); - self.status = format!("Receiving: {}/{}", self.eis_points.len(), self.sweep_total); + if self.collecting_refs { + self.eis_points.push(point); + } else { + self.eis_points.push(point); + self.eis_data = text_editor::Content::with_text(&fmt_eis(&self.eis_points)); + self.status = format!("Receiving: {}/{}", self.eis_points.len(), self.sweep_total); + } } EisMessage::SweepEnd => { - self.status = format!("Sweep complete: {} points", self.eis_points.len()); + if self.collecting_refs { + if let Some(r) = self.ref_rtia { + if (r as usize) < 8 { + self.eis_refs[r as usize] = Some(self.eis_points.clone()); + } + } + self.eis_points.clear(); + } else { + self.status = format!("Sweep complete: {} points", self.eis_points.len()); + } } EisMessage::Config(cfg) => { self.freq_start = format!("{:.0}", cfg.freq_start); @@ -375,9 +438,9 @@ impl App { self.amp_data = text_editor::Content::with_text(&fmt_amp(&self.amp_points)); self.status = format!("Amp: {:.0} mV", v_hold); } - EisMessage::AmpPoint { index, point } => { + EisMessage::AmpPoint { _index, point } => { self.amp_points.push(point); - self.amp_total = index + 1; + self.amp_total = _index + 1; self.amp_data = text_editor::Content::with_text(&fmt_amp(&self.amp_points)); self.status = format!("Amp: {} pts", self.amp_points.len()); } @@ -407,13 +470,57 @@ impl App { self.status = format!("Chlorine complete: {} points", self.cl_points.len()); } EisMessage::PhResult(r) => { - self.status = format!("pH: {:.2} (OCP={:.1} mV, T={:.1}C)", - r.ph, r.v_ocp_mv, r.temp_c); - self.ph_result = Some(r); + if self.collecting_refs { + self.ph_ref = Some(r); + } else { + self.status = format!("pH: {:.2} (OCP={:.1} mV, T={:.1}C)", + r.ph, r.v_ocp_mv, r.temp_c); + self.ph_result = Some(r); + } } EisMessage::Temperature(t) => { self.temp_c = t; } + EisMessage::RefFrame { mode, rtia_idx } => { + self.ref_mode = Some(mode); + self.ref_rtia = Some(rtia_idx); + let mode_name = match mode { + 0 => "EIS", 1 => "LSV", 2 => "Amp", 3 => "Cl", 4 => "pH", _ => "?" + }; + if mode == 0 { + self.status = format!("Ref: {} RTIA {}/8", mode_name, rtia_idx + 1); + } else { + self.status = format!("Ref: {} range search", mode_name); + } + } + EisMessage::RefLpRange { mode, low_idx, high_idx } => { + match mode { + 1 => self.lsv_lp_range = Some((low_idx, high_idx)), + 2 => self.amp_lp_range = Some((low_idx, high_idx)), + 3 => self.cl_lp_range = Some((low_idx, high_idx)), + _ => {} + } + } + EisMessage::RefsDone => { + self.collecting_refs = false; + self.has_device_refs = true; + self.ref_mode = None; + self.ref_rtia = None; + /* populate eis_ref from current RTIA's ref if available */ + let rtia_idx = self.rtia.as_byte() as usize; + if rtia_idx < 8 { + if let Some(pts) = &self.eis_refs[rtia_idx] { + self.eis_ref = Some(pts.clone()); + } + } + self.status = "Reference collection complete".into(); + } + EisMessage::RefStatus { has_refs } => { + self.has_device_refs = has_refs; + if !has_refs { + self.status = "No device refs".into(); + } + } }, Message::TabSelected(t) => self.tab = t, Message::PaneResized(event) => { @@ -434,7 +541,15 @@ impl App { Message::FreqStartChanged(s) => self.freq_start = s, Message::FreqStopChanged(s) => self.freq_stop = s, Message::PpdChanged(s) => self.ppd = s, - Message::RtiaSelected(r) => self.rtia = r, + Message::RtiaSelected(r) => { + self.rtia = r; + let idx = r.as_byte() as usize; + if idx < 8 { + if let Some(pts) = &self.eis_refs[idx] { + self.eis_ref = Some(pts.clone()); + } + } + } Message::RcalSelected(r) => self.rcal = r, Message::ElectrodeSelected(e) => self.electrode = e, Message::ApplySettings => { @@ -535,6 +650,35 @@ impl App { _ => {} } } + Message::CollectRefs => { + self.collecting_refs = true; + self.eis_refs = Default::default(); + self.lsv_lp_range = None; + self.amp_lp_range = None; + self.cl_lp_range = None; + self.status = "Starting reference collection...".into(); + self.send_cmd(&protocol::build_sysex_start_refs()); + } + Message::GetRefs => { + self.collecting_refs = true; + self.eis_refs = Default::default(); + self.lsv_lp_range = None; + self.amp_lp_range = None; + self.cl_lp_range = None; + self.send_cmd(&protocol::build_sysex_get_refs()); + } + Message::ClearRefs => { + self.collecting_refs = false; + self.has_device_refs = false; + self.eis_refs = Default::default(); + self.eis_ref = None; + self.lsv_lp_range = None; + self.amp_lp_range = None; + self.cl_lp_range = None; + self.ph_ref = None; + self.send_cmd(&protocol::build_sysex_clear_refs()); + self.status = "Refs cleared".into(); + } Message::ClearReference => { match self.tab { Tab::Eis => { self.eis_ref = None; self.status = "EIS reference cleared".into(); } @@ -558,41 +702,41 @@ impl App { Message::CloseSysInfo => { self.show_sysinfo = false; } + /* Clean */ + Message::CleanVChanged(s) => self.clean_v = s, + Message::CleanDurChanged(s) => self.clean_dur = s, + Message::StartClean => { + let v = self.clean_v.parse::().unwrap_or(1200.0); + let d = self.clean_dur.parse::().unwrap_or(30.0); + self.send_cmd(&protocol::build_sysex_start_clean(v, d)); + self.status = format!("Cleaning: {:.0} mV for {:.0}s", v, d); + } Message::OpenMidiSetup => { let _ = std::process::Command::new("open") .arg("-a") .arg("Audio MIDI Setup") .spawn(); } + Message::RefreshMidi => { + self.midi_gen += 1; + self.cmd_tx = None; + self.ble_connected = false; + self.status = "Looking for MIDI device...".into(); + } } Task::none() } pub fn subscription(&self) -> Subscription { let ble = Subscription::run_with_id( - "ble", + self.midi_gen, iced::stream::channel(100, |mut output| async move { loop { - let (ble_tx, mut ble_rx) = mpsc::unbounded_channel::(); - let (cmd_tx, cmd_rx) = mpsc::unbounded_channel::>(); - - let _ = output.send(Message::BleReady(cmd_tx)).await; - - let tx = ble_tx.clone(); - tokio::spawn(async move { - if let Err(e) = crate::ble::connect_and_run(tx, cmd_rx).await { - eprintln!("BLE: {e}"); - } - }); - - while let Some(ev) = ble_rx.recv().await { - let msg = match ev { - BleEvent::Status(s) => Message::BleStatus(s), - BleEvent::Data(m) => Message::BleData(m), - }; - let _ = output.send(msg).await; + let _ = output.send(Message::BleStatus("Looking for MIDI device...".into())).await; + match crate::ble::connect_and_stream(&mut output).await { + Ok(()) => eprintln!("BLE: session ended cleanly"), + Err(e) => eprintln!("BLE: session error: {e}"), } - let _ = output.send(Message::BleStatus("Reconnecting...".into())).await; tokio::time::sleep(Duration::from_millis(500)).await; } @@ -625,8 +769,17 @@ impl App { .style(style_neutral()) .padding([6, 14]) .on_press(Message::OpenMidiSetup), + iced::widget::horizontal_space(), + text("Clean").size(12), + text_input("mV", &self.clean_v).on_input(Message::CleanVChanged).width(60), + text_input("s", &self.clean_dur).on_input(Message::CleanDurChanged).width(45), + button(text("Clean").size(13)) + .style(btn_style(Color::from_rgb(0.65, 0.55, 0.15), Color::WHITE)) + .padding([6, 14]) + .on_press(Message::StartClean), ] - .spacing(4); + .spacing(4) + .align_y(iced::Alignment::Center); let has_ref = match self.tab { Tab::Eis => self.eis_ref.is_some(), @@ -644,6 +797,37 @@ impl App { }; let mut ref_row = row![].spacing(4).align_y(iced::Alignment::Center); + + if !self.collecting_refs { + ref_row = ref_row.push( + button(text("Collect Refs").size(11)) + .style(style_action()) + .padding([4, 10]) + .on_press(Message::CollectRefs), + ); + } else { + ref_row = ref_row.push( + button(text("Collecting...").size(11)) + .style(style_neutral()) + .padding([4, 10]), + ); + } + if self.has_device_refs { + ref_row = ref_row.push( + button(text("Get Refs").size(11)) + .style(style_neutral()) + .padding([4, 10]) + .on_press(Message::GetRefs), + ); + } + if self.has_device_refs || has_ref { + ref_row = ref_row.push( + button(text("Clear Refs").size(11)) + .style(style_danger()) + .padding([4, 10]) + .on_press(Message::ClearRefs), + ); + } if has_data { ref_row = ref_row.push( button(text("Set Ref").size(11)) @@ -662,14 +846,21 @@ impl App { ref_row = ref_row.push(text("REF").size(11)); } - let status_row = row![ - text(&self.status).size(16), - iced::widget::horizontal_space(), - ref_row, - text(format!("{:.1} C", self.temp_c)).size(14), - ] - .spacing(6) - .align_y(iced::Alignment::Center); + let connected = self.ble_connected; + let mut status_row = row![text(&self.status).size(16)].spacing(6) + .align_y(iced::Alignment::Center); + if !connected { + status_row = status_row.push( + button(text("Refresh MIDI").size(11)) + .style(style_apply()) + .padding([4, 10]) + .on_press(Message::RefreshMidi), + ); + } + status_row = status_row + .push(iced::widget::horizontal_space()) + .push(ref_row) + .push(text(format!("{:.1} C", self.temp_c)).size(14)); let controls = self.view_controls(); diff --git a/cue/src/ble.rs b/cue/src/ble.rs index 892d22e..983e097 100644 --- a/cue/src/ble.rs +++ b/cue/src/ble.rs @@ -1,31 +1,29 @@ +use futures::SinkExt; use midir::{MidiInput, MidiOutput, MidiInputConnection, MidiOutputConnection}; use std::sync::mpsc as std_mpsc; use tokio::sync::mpsc; -use crate::protocol::{self, EisMessage}; +use crate::app::Message; +use crate::protocol; const DEVICE_NAME: &str = "EIS4"; -#[derive(Debug, Clone)] -pub enum BleEvent { - Status(String), - Data(EisMessage), -} - -pub async fn connect_and_run( - tx: mpsc::UnboundedSender, - mut cmd_rx: mpsc::UnboundedReceiver>, +pub async fn connect_and_stream( + output: &mut futures::channel::mpsc::Sender, ) -> Result<(), Box> { - let _ = tx.send(BleEvent::Status("Looking for MIDI device...".into())); + eprintln!("BLE: scanning for MIDI device '{DEVICE_NAME}'..."); let (midi_in, in_port, midi_out, out_port) = loop { - if let Some(found) = find_midi_ports() { - break found; + match find_midi_ports() { + Some(found) => break found, + None => { + tokio::time::sleep(std::time::Duration::from_millis(500)).await; + } } - tokio::time::sleep(std::time::Duration::from_millis(500)).await; }; - let _ = tx.send(BleEvent::Status("Connecting MIDI...".into())); + eprintln!("BLE: found ports, connecting..."); + let _ = output.send(Message::BleStatus("Connecting MIDI...".into())).await; let (sysex_tx, sysex_rx) = std_mpsc::channel::>(); @@ -43,12 +41,16 @@ pub async fn connect_and_run( &out_port, "cue-out", ).map_err(|e| format!("MIDI output connect: {e}"))?; - let _ = tx.send(BleEvent::Status("Connected".into())); + eprintln!("BLE: connected"); + let _ = output.send(Message::BleStatus("Connected".into())).await; + + let (cmd_tx, mut cmd_rx) = mpsc::unbounded_channel::>(); + let _ = output.send(Message::BleReady(cmd_tx)).await; loop { while let Ok(sysex) = sysex_rx.try_recv() { if let Some(msg) = protocol::parse_sysex(&sysex) { - let _ = tx.send(BleEvent::Data(msg)); + let _ = output.send(Message::BleData(msg)).await; } } @@ -56,10 +58,14 @@ pub async fn connect_and_run( match cmd_rx.try_recv() { Ok(pkt) => { if let Err(e) = out_conn.send(&pkt) { - eprintln!("MIDI send error: {e}"); + eprintln!("BLE: MIDI send error: {e}"); + return Err(e.into()); } } - Err(mpsc::error::TryRecvError::Disconnected) => return Ok(()), + Err(mpsc::error::TryRecvError::Disconnected) => { + eprintln!("BLE: cmd channel closed"); + return Ok(()); + } Err(mpsc::error::TryRecvError::Empty) => break, } } @@ -75,11 +81,25 @@ fn find_midi_ports() -> Option<( let midi_in = MidiInput::new("cue-in").ok()?; let midi_out = MidiOutput::new("cue-out").ok()?; - let in_port = midi_in.ports().into_iter().find(|p| { + let in_ports = midi_in.ports(); + let out_ports = midi_out.ports(); + + let in_names: Vec<_> = in_ports.iter() + .filter_map(|p| midi_in.port_name(p).ok()) + .collect(); + let out_names: Vec<_> = out_ports.iter() + .filter_map(|p| midi_out.port_name(p).ok()) + .collect(); + + if !in_names.is_empty() || !out_names.is_empty() { + eprintln!("BLE: MIDI ports — in: {:?}, out: {:?}", in_names, out_names); + } + + let in_port = in_ports.into_iter().find(|p| { midi_in.port_name(p).map_or(false, |n| n.contains(DEVICE_NAME)) })?; - let out_port = midi_out.ports().into_iter().find(|p| { + let out_port = out_ports.into_iter().find(|p| { midi_out.port_name(p).map_or(false, |n| n.contains(DEVICE_NAME)) })?; diff --git a/cue/src/plot.rs b/cue/src/plot.rs index 0b6eeca..e835e1e 100644 --- a/cue/src/plot.rs +++ b/cue/src/plot.rs @@ -21,6 +21,8 @@ const COL_GRID: Color = Color { r: 0.25, g: 0.25, b: 0.28, a: 1.0 }; const COL_AXIS: Color = Color { r: 0.6, g: 0.6, b: 0.6, a: 1.0 }; const COL_DIM: Color = Color { r: 0.4, g: 0.4, b: 0.4, a: 1.0 }; const COL_REF: Color = Color { r: 0.5, g: 0.5, b: 0.5, a: 0.5 }; +const COL_FIT: Color = Color { r: 0.7, g: 0.3, b: 0.9, a: 0.5 }; +const COL_FIT_PT: Color = Color { r: 0.9, g: 0.4, b: 0.9, a: 0.9 }; const ZOOM_FACTOR: f32 = 1.15; const DRAG_ZOOM_RATE: f32 = 200.0; @@ -100,6 +102,117 @@ fn draw_dots(frame: &mut Frame, pts: &[Point], color: Color, r: f32) { } } +/* ---- Nyquist circle fit (Kåsa algebraic method) ---- */ + +struct CircleFit { + cx: f32, + cy: f32, + r: f32, + rs: f32, + rp: f32, +} + +fn kasa_fit(pts: &[(f64, f64)]) -> Option<(f64, f64, f64)> { + if pts.len() < 3 { return None; } + let n = pts.len() as f64; + let (mut sx, mut sy) = (0.0_f64, 0.0_f64); + let (mut sx2, mut sy2, mut sxy) = (0.0, 0.0, 0.0); + let (mut sx3, mut sy3, mut sx2y, mut sxy2) = (0.0, 0.0, 0.0, 0.0); + + for &(x, y) in pts { + sx += x; sy += y; + let x2 = x * x; let y2 = y * y; let xy = x * y; + sx2 += x2; sy2 += y2; sxy += xy; + sx3 += x2 * x; sy3 += y2 * y; sx2y += x2 * y; sxy2 += x * y2; + } + + let (a00, a01, a02) = (sx2, sxy, sx); + let (a10, a11, a12) = (sxy, sy2, sy); + let (a20, a21, a22) = (sx, sy, n); + let (r0, r1, r2) = (sx3 + sxy2, sx2y + sy3, sx2 + sy2); + + let det = a00 * (a11 * a22 - a12 * a21) + - a01 * (a10 * a22 - a12 * a20) + + a02 * (a10 * a21 - a11 * a20); + if det.abs() < 1e-20 { return None; } + + let a = (r0 * (a11 * a22 - a12 * a21) + - a01 * (r1 * a22 - a12 * r2) + + a02 * (r1 * a21 - a11 * r2)) / det; + let b = (a00 * (r1 * a22 - a12 * r2) + - r0 * (a10 * a22 - a12 * a20) + + a02 * (a10 * r2 - r1 * a20)) / det; + let c = (a00 * (a11 * r2 - r1 * a21) + - a01 * (a10 * r2 - r1 * a20) + + r0 * (a10 * a21 - a11 * a20)) / det; + + let cx = a / 2.0; + let cy = b / 2.0; + let r_sq = c + cx * cx + cy * cy; + if r_sq <= 0.0 { return None; } + Some((cx, cy, r_sq.sqrt())) +} + +/// Fit the dominant Nyquist semicircle, trimming first-arc points from the +/// low-frequency end before falling back to outlier removal within each subset. +fn fit_nyquist_circle(points: &[EisPoint]) -> Option { + let all: Vec<(f64, f64)> = points.iter() + .filter(|p| p.z_real.is_finite() && p.z_imag.is_finite()) + .map(|p| (p.z_real as f64, -p.z_imag as f64)) + .collect(); + if all.len() < 4 { return None; } + + let min_pts = 4.max(all.len() / 3); + let mut best: Option = None; + let mut best_score = f64::MAX; + + for start in 0..all.len() { + let mut pts: Vec<(f64, f64)> = all[start..].to_vec(); + while pts.len() >= min_pts { + let (cx, cy, r) = match kasa_fit(&pts) { + Some(v) => v, + None => break, + }; + let disc = r * r - cy * cy; + if disc > 0.0 { + let sd = disc.sqrt(); + let rs = cx - sd; + let rp = 2.0 * sd; + if rp > 0.0 { + let avg_err: f64 = pts.iter() + .map(|&(x, y)| { + ((x - cx).powi(2) + (y - cy).powi(2)).sqrt() - r + }) + .map(|e| e.abs()) + .sum::() / (pts.len() as f64 * r); + let coverage = pts.len() as f64 / all.len() as f64; + let score = avg_err / coverage; + if score < best_score { + best_score = score; + best = Some(CircleFit { + cx: cx as f32, cy: cy as f32, r: r as f32, + rs: rs as f32, rp: rp as f32, + }); + } + break; + } + } + let worst = pts.iter().enumerate() + .map(|(i, &(x, y))| { + let d = ((x - cx).powi(2) + (y - cy).powi(2)).sqrt(); + (i, (d - r).abs()) + }) + .max_by(|a, b| a.1.partial_cmp(&b.1).unwrap()) + .map(|(i, _)| i); + match worst { + Some(i) => { pts.remove(i); } + None => break, + } + } + } + best +} + /* ---- Bode ---- */ #[derive(Default)] @@ -563,6 +676,35 @@ impl<'a> canvas::Program for NyquistPlot<'a> { draw_polyline(&mut frame, &pts, COL_NYQ, 2.0); draw_dots(&mut frame, &pts, COL_NYQ, 3.0); + if let Some(fit) = fit_nyquist_circle(self.points) { + let theta_r = (-fit.cy).atan2((fit.r * fit.r - fit.cy * fit.cy).sqrt()); + let mut theta_l = (-fit.cy).atan2(-(fit.r * fit.r - fit.cy * fit.cy).sqrt()); + if theta_l < theta_r { theta_l += std::f32::consts::TAU; } + + let n_arc = 120; + let arc_pts: Vec = (0..=n_arc).map(|i| { + let t = theta_r + (theta_l - theta_r) * i as f32 / n_arc as f32; + let x = fit.cx + fit.r * t.cos(); + let y = fit.cy + fit.r * t.sin(); + Point::new( + lerp(x, xv.lo, xv.hi, xl, xr), + lerp(y, yv.hi, yv.lo, yt, yb), + ) + }).collect(); + draw_polyline(&mut frame, &arc_pts, COL_FIT, 1.5); + + let y0_scr = lerp(0.0, yv.hi, yv.lo, yt, yb); + let rs_scr = Point::new(lerp(fit.rs, xv.lo, xv.hi, xl, xr), y0_scr); + let rp_scr = Point::new(lerp(fit.rs + fit.rp, xv.lo, xv.hi, xl, xr), y0_scr); + frame.fill(&Path::circle(rs_scr, 5.0), COL_FIT_PT); + frame.fill(&Path::circle(rp_scr, 5.0), COL_FIT_PT); + + dt(&mut frame, Point::new(rs_scr.x, rs_scr.y + 6.0), + &format!("Rs={:.0}", fit.rs), COL_FIT_PT, 10.0); + dt(&mut frame, Point::new(rp_scr.x - 30.0, rp_scr.y + 6.0), + &format!("Rp={:.0}", fit.rp), COL_FIT_PT, 10.0); + } + if let Some(pos) = cursor.position_in(bounds) { if pos.x >= xl && pos.x <= xr && pos.y >= yt && pos.y <= yb { let re = lerp(pos.x, xl, xr, xv.lo, xv.hi); diff --git a/cue/src/protocol.rs b/cue/src/protocol.rs index b4ffd9a..79f9fd4 100644 --- a/cue/src/protocol.rs +++ b/cue/src/protocol.rs @@ -19,6 +19,10 @@ pub const RSP_CL_RESULT: u8 = 0x0D; pub const RSP_CL_END: u8 = 0x0E; pub const RSP_PH_RESULT: u8 = 0x0F; pub const RSP_TEMP: u8 = 0x10; +pub const RSP_REF_FRAME: u8 = 0x20; +pub const RSP_REF_LP_RANGE: u8 = 0x21; +pub const RSP_REFS_DONE: u8 = 0x22; +pub const RSP_REF_STATUS: u8 = 0x23; /* Cue → ESP32 */ pub const CMD_SET_SWEEP: u8 = 0x10; @@ -30,10 +34,14 @@ pub const CMD_SET_ELECTRODE: u8 = 0x15; pub const CMD_START_LSV: u8 = 0x20; pub const CMD_START_AMP: u8 = 0x21; pub const CMD_STOP_AMP: u8 = 0x22; -pub const CMD_SET_TEMP: u8 = 0x16; + pub const CMD_GET_TEMP: u8 = 0x17; pub const CMD_START_CL: u8 = 0x23; pub const CMD_START_PH: u8 = 0x24; +pub const CMD_START_CLEAN: u8 = 0x25; +pub const CMD_START_REFS: u8 = 0x30; +pub const CMD_GET_REFS: u8 = 0x31; +pub const CMD_CLEAR_REFS: u8 = 0x32; #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Rtia { @@ -118,29 +126,45 @@ impl std::fmt::Display for Electrode { #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum LpRtia { - R200, R1K, R2K, R4K, R10K, R20K, R40K, R100K, R512K, + R200, R1K, R2K, R3K, R4K, R6K, R8K, R10K, R12K, R16K, + R20K, R24K, R30K, R32K, R40K, R48K, R64K, R85K, R96K, + R100K, R120K, R128K, R160K, R196K, R256K, R512K, } impl LpRtia { + #[allow(dead_code)] pub fn from_byte(b: u8) -> Option { Some(match b { - 0 => Self::R200, 1 => Self::R1K, 2 => Self::R2K, 3 => Self::R4K, - 4 => Self::R10K, 5 => Self::R20K, 6 => Self::R40K, 7 => Self::R100K, - 8 => Self::R512K, + 0 => Self::R200, 1 => Self::R1K, 2 => Self::R2K, 3 => Self::R3K, + 4 => Self::R4K, 5 => Self::R6K, 6 => Self::R8K, 7 => Self::R10K, + 8 => Self::R12K, 9 => Self::R16K, 10 => Self::R20K, 11 => Self::R24K, + 12 => Self::R30K, 13 => Self::R32K, 14 => Self::R40K, 15 => Self::R48K, + 16 => Self::R64K, 17 => Self::R85K, 18 => Self::R96K, 19 => Self::R100K, + 20 => Self::R120K, 21 => Self::R128K, 22 => Self::R160K, 23 => Self::R196K, + 24 => Self::R256K, 25 => Self::R512K, _ => return None, }) } pub fn as_byte(self) -> u8 { self as u8 } pub fn label(self) -> &'static str { match self { - Self::R200 => "200Ω", Self::R1K => "1kΩ", Self::R2K => "2kΩ", - Self::R4K => "4kΩ", Self::R10K => "10kΩ", Self::R20K => "20kΩ", - Self::R40K => "40kΩ", Self::R100K => "100kΩ", Self::R512K => "512kΩ", + Self::R200 => "200Ω", Self::R1K => "1kΩ", Self::R2K => "2kΩ", + Self::R3K => "3kΩ", Self::R4K => "4kΩ", Self::R6K => "6kΩ", + Self::R8K => "8kΩ", Self::R10K => "10kΩ", Self::R12K => "12kΩ", + Self::R16K => "16kΩ", Self::R20K => "20kΩ", Self::R24K => "24kΩ", + Self::R30K => "30kΩ", Self::R32K => "32kΩ", Self::R40K => "40kΩ", + Self::R48K => "48kΩ", Self::R64K => "64kΩ", Self::R85K => "85kΩ", + Self::R96K => "96kΩ", Self::R100K => "100kΩ", Self::R120K => "120kΩ", + Self::R128K => "128kΩ", Self::R160K => "160kΩ", Self::R196K => "196kΩ", + Self::R256K => "256kΩ", Self::R512K => "512kΩ", } } pub const ALL: &[Self] = &[ - Self::R200, Self::R1K, Self::R2K, Self::R4K, - Self::R10K, Self::R20K, Self::R40K, Self::R100K, Self::R512K, + Self::R200, Self::R1K, Self::R2K, Self::R3K, Self::R4K, + Self::R6K, Self::R8K, Self::R10K, Self::R12K, Self::R16K, + Self::R20K, Self::R24K, Self::R30K, Self::R32K, Self::R40K, + Self::R48K, Self::R64K, Self::R85K, Self::R96K, Self::R100K, + Self::R120K, Self::R128K, Self::R160K, Self::R196K, Self::R256K, Self::R512K, ]; } @@ -209,21 +233,25 @@ pub struct EisConfig { #[derive(Debug, Clone)] pub enum EisMessage { SweepStart { num_points: u16, freq_start: f32, freq_stop: f32 }, - DataPoint { index: u16, point: EisPoint }, + DataPoint { _index: u16, point: EisPoint }, SweepEnd, Config(EisConfig), LsvStart { num_points: u16, v_start: f32, v_stop: f32 }, - LsvPoint { index: u16, point: LsvPoint }, + LsvPoint { _index: u16, point: LsvPoint }, LsvEnd, AmpStart { v_hold: f32 }, - AmpPoint { index: u16, point: AmpPoint }, + AmpPoint { _index: u16, point: AmpPoint }, AmpEnd, ClStart { num_points: u16 }, - ClPoint { index: u16, point: ClPoint }, + ClPoint { _index: u16, point: ClPoint }, ClResult(ClResult), ClEnd, PhResult(PhResult), Temperature(f32), + RefFrame { mode: u8, rtia_idx: u8 }, + RefLpRange { mode: u8, low_idx: u8, high_idx: u8 }, + RefsDone, + RefStatus { has_refs: bool }, } fn decode_u16(data: &[u8]) -> u16 { @@ -269,7 +297,7 @@ pub fn parse_sysex(data: &[u8]) -> Option { let p = &data[2..]; let ext = p.len() >= 53; Some(EisMessage::DataPoint { - index: decode_u16(&p[0..3]), + _index: decode_u16(&p[0..3]), point: EisPoint { freq_hz: decode_float(&p[3..8]), mag_ohms: decode_float(&p[8..13]), @@ -307,7 +335,7 @@ pub fn parse_sysex(data: &[u8]) -> Option { RSP_LSV_POINT if data.len() >= 15 => { let p = &data[2..]; Some(EisMessage::LsvPoint { - index: decode_u16(&p[0..3]), + _index: decode_u16(&p[0..3]), point: LsvPoint { v_mv: decode_float(&p[3..8]), i_ua: decode_float(&p[8..13]), @@ -322,7 +350,7 @@ pub fn parse_sysex(data: &[u8]) -> Option { RSP_AMP_POINT if data.len() >= 15 => { let p = &data[2..]; Some(EisMessage::AmpPoint { - index: decode_u16(&p[0..3]), + _index: decode_u16(&p[0..3]), point: AmpPoint { t_ms: decode_float(&p[3..8]), i_ua: decode_float(&p[8..13]), @@ -337,7 +365,7 @@ pub fn parse_sysex(data: &[u8]) -> Option { RSP_CL_POINT if data.len() >= 16 => { let p = &data[2..]; Some(EisMessage::ClPoint { - index: decode_u16(&p[0..3]), + _index: decode_u16(&p[0..3]), point: ClPoint { t_ms: decode_float(&p[3..8]), i_ua: decode_float(&p[8..13]), @@ -365,6 +393,16 @@ pub fn parse_sysex(data: &[u8]) -> Option { temp_c: decode_float(&p[10..15]), })) } + RSP_REF_FRAME if data.len() >= 4 => { + Some(EisMessage::RefFrame { mode: data[2], rtia_idx: data[3] }) + } + RSP_REF_LP_RANGE if data.len() >= 5 => { + Some(EisMessage::RefLpRange { mode: data[2], low_idx: data[3], high_idx: data[4] }) + } + RSP_REFS_DONE => Some(EisMessage::RefsDone), + RSP_REF_STATUS if data.len() >= 3 => { + Some(EisMessage::RefStatus { has_refs: data[2] != 0 }) + } _ => None, } } @@ -448,3 +486,23 @@ pub fn build_sysex_start_ph(stabilize_s: f32) -> Vec { sx.push(0xF7); sx } + +pub fn build_sysex_start_clean(v_mv: f32, duration_s: f32) -> Vec { + let mut sx = vec![0xF0, SYSEX_MFR, CMD_START_CLEAN]; + sx.extend_from_slice(&encode_float(v_mv)); + sx.extend_from_slice(&encode_float(duration_s)); + sx.push(0xF7); + sx +} + +pub fn build_sysex_start_refs() -> Vec { + vec![0xF0, SYSEX_MFR, CMD_START_REFS, 0xF7] +} + +pub fn build_sysex_get_refs() -> Vec { + vec![0xF0, SYSEX_MFR, CMD_GET_REFS, 0xF7] +} + +pub fn build_sysex_clear_refs() -> Vec { + vec![0xF0, SYSEX_MFR, CMD_CLEAR_REFS, 0xF7] +} diff --git a/examples/AD5940_ADC/AD5940_ADCMeanFIFO.c b/examples/AD5940_ADC/AD5940_ADCMeanFIFO.c new file mode 100644 index 0000000..ecff7bc --- /dev/null +++ b/examples/AD5940_ADC/AD5940_ADCMeanFIFO.c @@ -0,0 +1,103 @@ +/*! + ***************************************************************************** + @file: AD5940_ADCMeanFIFO.c + @author: $Author: nxu2 $ + @brief: Use FIFO to read statistic block mean result. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** @addtogroup AD5940_Standard_Examples + * @{ + @defgroup ADC_MEAN_FIFO_Example + @{ + */ + +#include "ad5940.h" +#include + +uint32_t ADCBuff[256]; +void AD5940_Main(void) +{ + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + StatCfg_Type stat_cfg; + FIFOCfg_Type fifo_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + /* Firstly call this function after reset to initialize AFE registers. */ + AD5940_Initialize(); + /* Configure AFE power mode and bandwidth */ + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + /* Initialize ADC basic function */ + adc_base.ADCMuxP = ADCMUXP_AVDD_2; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + adc_base.ADCPga = ADCPGA_1; + AD5940_ADCBaseCfgS(&adc_base); + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH-->StatisticBlock */ + adc_filter.ADCSinc3Osr = ADCSINC3OSR_4; + adc_filter.ADCSinc2Osr = ADCSINC2OSR_1333; + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + + /** + * Statistic block receive data from SINC2+Notch block. Note the diagram in datasheet page 51 PrM. + * The SINC3 can be bypassed optionally. SINC2 cannot be bypassed. + * */ + stat_cfg.StatDev = STATDEV_1; /* Not used. */ + stat_cfg.StatEnable = bTRUE; + stat_cfg.StatSample = STATSAMPLE_128; /* Sample 128 points and calculate mean. */ + AD5940_StatisticCfgS(&stat_cfg); + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; + fifo_cfg.FIFOSrc = FIFOSRC_MEAN; + fifo_cfg.FIFOThresh = 2; + AD5940_FIFOCfg(&fifo_cfg); + + /* Enable all interrupt at Interrupt Controller 1. So we can check the interrupt flag */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); + AD5940_INTCCfg(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH, bTRUE); /* Enable FIFO threshold interrupt. */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + AD5940_ClrMCUIntFlag(); /* Clear the MCU interrupt flag which will be set in ISR. */ + + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); + while(1) + { + uint32_t FifoCnt; + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + FifoCnt = AD5940_FIFOGetCnt(); + AD5940_FIFORd((uint32_t *)ADCBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + printf("Get %d data, ADC Code[0]:%d\n",FifoCnt, ADCBuff[0]&0xffff); + /*!!!!!NOTE!!!!!*/ + /* The mean result already removed 32768. So to calculate the voltage, assume mean result is n, use below equation. + Voltage = n/32768*Vref + */ + } + } + } +} + +/** + * @} + * @} + * */ diff --git a/examples/AD5940_ADC/AD5940_ADCNotchTest.c b/examples/AD5940_ADC/AD5940_ADCNotchTest.c new file mode 100644 index 0000000..0140dae --- /dev/null +++ b/examples/AD5940_ADC/AD5940_ADCNotchTest.c @@ -0,0 +1,205 @@ +/*! + ***************************************************************************** + @file: AD5940_ADCNotchTest.c + @author: Neo Xu + @brief: Notch filter test. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** @addtogroup AD5940_Standard_Examples + * @{ + @defgroup ADC_Notch_Test_Example + @{ + */ + +#include "ad5940.h" +#include + +#ifdef ADI_DEBUG +#undef ADI_DEBUG +#endif + +void ad5940_sequencer_init(uint8_t adc_rate, uint8_t sinc3osr, uint8_t sinc2osr){ + FIFOCfg_Type fifo_cfg; + SEQCfg_Type seq_cfg; + /* Step2. Configure FIFO and Sequencer*/ + fifo_cfg.FIFOEn = bFALSE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_SINC2NOTCH; + fifo_cfg.FIFOThresh = 1; + AD5940_FIFOCfg(&fifo_cfg); /* Disable to reset FIFO. */ + fifo_cfg.FIFOEn = bTRUE; + AD5940_FIFOCfg(&fifo_cfg); /* Enable FIFO here */ + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + uint32_t WaitClks; + uint8_t dl_60, dl_50, dl=0; + ADCFilterCfg_Type filter; + filter.ADCSinc3Osr = sinc3osr; + filter.ADCSinc2Osr = sinc2osr; + filter.ADCRate = adc_rate; + const uint32_t sinc2osr_table[] = {22,44,89,178,267,533,640,667,800,889,1067,1333,0}; + const uint32_t sinc3osr_table[] = {5,4,2,0}; + printf("SINC3:OSR%d, SINC2:OSR%d, ", sinc3osr_table[sinc3osr], sinc2osr_table[sinc2osr]); + if(AD5940_Notch50HzAvailable(&filter, &dl_50)){ + printf("NOTCH50: DL:%d, %dHz ", dl_50, (uint32_t)((adc_rate==ADCRATE_1P6MHZ?1.6e6:800000.0)/sinc3osr_table[sinc3osr]/sinc2osr_table[sinc2osr]/dl_50 + .5)); + dl += dl_50-1; + } + if(AD5940_Notch60HzAvailable(&filter, &dl_60)){ + printf("NOTCH60: DL:%d, %dHz ", dl_60, (uint32_t)((adc_rate==ADCRATE_1P6MHZ?1.6e6:800000.0)/sinc3osr_table[sinc3osr]/sinc2osr_table[sinc2osr]/dl_60 + .5)); + dl += dl_60-1; + } + ClksCalInfo_Type clks_cal; + clks_cal.DataType = DATATYPE_NOTCH; + clks_cal.ADCRate = adc_rate; + clks_cal.DataCount = 1; /* Sample one data when wakeup */ + clks_cal.ADCSinc2Osr = sinc2osr; + clks_cal.ADCSinc3Osr = sinc3osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = adc_rate==ADCRATE_1P6MHZ?.5:1; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + static uint32_t buff[128]; + AD5940_SEQGenInit(buff, 128); + AD5940_SEQGenCtrl(bTRUE); + + AD5940_SEQGpioCtrlS(AGPIO_Pin1); + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_SINC2NOTCH, bTRUE); /* Start ADC convert */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); + //wait for first data ready + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bFALSE); /* Stop ADC convert and DFT */ + AD5940_SEQGpioCtrlS(0); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + SEQInfo_Type seqinfo; + AD5940_SEQGenFetchSeq(&seqinfo.pSeqCmd, &seqinfo.SeqLen); + seqinfo.SeqId = SEQID_0; + seqinfo.SeqRamAddr = 0; + seqinfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo); + + AGPIOCfg_Type gpio_cfg; + gpio_cfg.FuncSet = GP6_SYNC|GP5_SYNC|GP2_TRIG|GP1_SYNC|GP0_INT; + gpio_cfg.InputEnSet = AGPIO_Pin2; + gpio_cfg.OutputEnSet = AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin5|AGPIO_Pin6; + gpio_cfg.OutVal = 0; + gpio_cfg.PullEnSet = AGPIO_Pin2; + AD5940_AGPIOCfg(&gpio_cfg); +} + +uint32_t ad5940_notch_test(uint8_t adc_rate, uint8_t sinc3osr, uint8_t sinc2osr){ + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + + /* Use hardware reset */ + AD5940_HWReset(); + + /* Firstly call this function after reset to initialize AFE registers. */ + AD5940_Initialize(); + + CLKCfg_Type clk_cfg; + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = adc_rate==ADCRATE_1P6MHZ?SYSCLKDIV_2:SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = adc_rate==ADCRATE_1P6MHZ?bTRUE:bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + + /* Configure AFE power mode and bandwidth */ + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + /* Initialize ADC basic function */ + adc_base.ADCMuxP = ADCMUXP_VREF1P8DAC; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + adc_base.ADCPga = ADCPGA_1P5; + AD5940_ADCBaseCfgS(&adc_base); + AD5940_AFECtrlS(AFECTRL_DACREFPWR|AFECTRL_HSDACPWR, bTRUE); + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH */ + adc_filter.ADCSinc3Osr = sinc3osr; + adc_filter.ADCSinc2Osr = sinc2osr; + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = adc_rate; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bFALSE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + + /* Enable all interrupt at Interrupt Controller 1. So we can check the interrupt flag */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); + AD5940_INTCCfg(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH, bTRUE); + + ad5940_sequencer_init(adc_rate, sinc3osr, sinc2osr); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + AD5940_SEQCtrlS(bTRUE); + AD5940_ClrMCUIntFlag(); + AD5940_SEQMmrTrig(SEQID_0); + while(1) + { + {int32_t i = 1000000;while(i--);} + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + uint32_t fifo_count = AD5940_FIFOGetCnt(); + if(fifo_count == 1){ + int32_t rd; + AD5940_FIFORd((uint32_t*)&rd, 1); + rd &= 0xffff; + float volt = AD5940_ADCCode2Volt(rd, ADCPGA_1P5, 1.82)+1.11; + volt -= 1.82; + if(volt < 0) volt = -volt; + if(volt > 0.0005){ + printf("FAILED:CODE:rd:%d\n", rd); + return 1; + } + printf("PASS\n"); + return 0; + } + else{ + printf("FAILED:%d\n", fifo_count); + return 1; + } + } + } +} + +void AD5940_Main(void) +{ + uint32_t failed = 0; + uint8_t sinc3=0, sinc2=0; + uint8_t adc_rate=0; + for(;adc_rate<=1;adc_rate++){ + sinc3=0; + for(;sinc3<=ADCSINC3OSR_2;sinc3++){ + sinc2=0; + for(;sinc2<=ADCSINC2OSR_1333;sinc2++){ + failed |= ad5940_notch_test(adc_rate, sinc3, sinc2); + } + } + } + printf("Test Done with status: %s\n",failed?"FAILED":"SUCCEED"); + while(1); +} + +/** + * @} + * @} + * */ diff --git a/examples/AD5940_ADC/AD5940_ADCPolling.c b/examples/AD5940_ADC/AD5940_ADCPolling.c new file mode 100644 index 0000000..42def98 --- /dev/null +++ b/examples/AD5940_ADC/AD5940_ADCPolling.c @@ -0,0 +1,110 @@ +/*! + ***************************************************************************** + @file: AD5940_ADCPolling.c + @author: $Author: nxu2 $ + @brief: ADC Polling mode example + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** @addtogroup AD5940_Standard_Examples + * @{ + @defgroup ADC_Polling_Example + @{ + */ + +#include "ad5940.h" +#include + +#define ADCPGA_GAIN_SEL ADCPGA_1P5 +static void AD5940_PGA_Calibration(void){ + AD5940Err err; + ADCPGACal_Type pgacal; + pgacal.AdcClkFreq = 16e6; + pgacal.ADCSinc2Osr = ADCSINC2OSR_178; + pgacal.ADCSinc3Osr = ADCSINC3OSR_4; + pgacal.SysClkFreq = 16e6; + pgacal.TimeOut10us = 1000; + pgacal.VRef1p11 = 1.11f; + pgacal.VRef1p82 = 1.82f; + pgacal.PGACalType = PGACALTYPE_OFFSETGAIN; + pgacal.ADCPga = ADCPGA_GAIN_SEL; + err = AD5940_ADCPGACal(&pgacal); + if(err != AD5940ERR_OK){ + printf("AD5940 PGA calibration failed."); + } +} + +void AD5940_Main(void) +{ + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + + /* Use hardware reset */ + AD5940_HWReset(); + + /* Firstly call this function after reset to initialize AFE registers. */ + AD5940_Initialize(); + + AD5940_PGA_Calibration(); + /* Configure AFE power mode and bandwidth */ + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + /* Initialize ADC basic function */ + AD5940_AFECtrlS(AFECTRL_DACREFPWR|AFECTRL_HSDACPWR, bTRUE); //We are going to measure DAC 1.82V reference. + adc_base.ADCMuxP = ADCMUXP_VREF1P8DAC; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + adc_base.ADCPga = ADCPGA_GAIN_SEL; + AD5940_ADCBaseCfgS(&adc_base); + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH */ + adc_filter.ADCSinc3Osr = ADCSINC3OSR_4; + adc_filter.ADCSinc2Osr = ADCSINC2OSR_1333; + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + + //AD5940_ADCMuxCfgS(ADCMUXP_AIN2, ADCMUXN_VSET1P1); /* Optionally, you can change ADC MUX with this function */ + + /* Enable all interrupt at Interrupt Controller 1. So we can check the interrupt flag */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); + + //AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bTRUE); + //AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); + AD5940_ADCPowerCtrlS(bTRUE); + AD5940_ADCConvtCtrlS(bTRUE); + + while(1) + { + uint32_t rd; + if(AD5940_INTCTestFlag(AFEINTC_1,AFEINTSRC_SINC2RDY)) + { + static uint32_t count; + AD5940_INTCClrFlag(AFEINTSRC_SINC2RDY); + rd = AD5940_ReadAfeResult(AFERESULT_SINC2); + count ++; + /* ADC Sample rate is 800kSPS. SINC3 OSR is 4, SINC2 OSR is 1333. So the final output data rate is 800kSPS/4/1333 = 150.0375Hz */ + if(count == 150) /* Print data @1Hz */ + { + count = 0; + float diff_volt = AD5940_ADCCode2Volt(rd, ADCPGA_GAIN_SEL, 1.82); + printf("ADC Code:%d, diff-volt: %.4f, volt:%.4f\n",rd, diff_volt, diff_volt+1.11); + } + } + } +} + +/** + * @} + * @} + * */ diff --git a/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.ewd b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.ewd new file mode 100644 index 0000000..c06a10c --- /dev/null +++ b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 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Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.6.0"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + <file category="header" condition="TrustZone" name="CMSIS/Core/Include/tz_context.h"/> + <file attr="template" category="sourceC" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="Secure mode 'main' module for ARMv8-M" version="1.1.1"/> + <file attr="template" category="sourceC" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" version="1.1.1"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> + <packages useAllLatestPacks="1"/> +</configuration> + + + diff --git a/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.rteconfig b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.rteconfig new file mode 100644 index 0000000..48bddb8 --- /dev/null +++ b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.rteconfig @@ -0,0 +1,56 @@ + + + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.uvoptx b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.uvoptx new file mode 100644 index 0000000..10b4abf --- /dev/null +++ b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.uvoptx @@ -0,0 +1,282 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_ADCPolling.c + AD5940_ADCPolling.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.uvprojx b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.uvprojx new file mode 100644 index 0000000..d72ebd1 --- /dev/null +++ b/examples/AD5940_ADC/ADICUP3029/AD5940_ADC.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_ADCPolling.c + 1 + ..\AD5940_ADCPolling.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_ADC/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_ADC/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_ADC/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_ADC/ADICUP3029/main.c b/examples/AD5940_ADC/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_ADC/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_ADC/NUCLEO-F411/AD5940_ADC.uvoptx b/examples/AD5940_ADC/NUCLEO-F411/AD5940_ADC.uvoptx new file mode 100644 index 0000000..8cc987d --- /dev/null +++ b/examples/AD5940_ADC/NUCLEO-F411/AD5940_ADC.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_ADCPolling.c + AD5940_ADCPolling.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ADC/NUCLEO-F411/AD5940_ADC.uvprojx b/examples/AD5940_ADC/NUCLEO-F411/AD5940_ADC.uvprojx new file mode 100644 index 0000000..b82c0ff --- /dev/null +++ b/examples/AD5940_ADC/NUCLEO-F411/AD5940_ADC.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X, ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_ADCPolling.c + 1 + ..\AD5940_ADCPolling.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_ADC/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_ADC/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_ADC/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_ADC/NUCLEO-F411/main.c b/examples/AD5940_ADC/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_ADC/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Amperometric/AD5940Main.c b/examples/AD5940_Amperometric/AD5940Main.c new file mode 100644 index 0000000..6bc6c38 --- /dev/null +++ b/examples/AD5940_Amperometric/AD5940Main.c @@ -0,0 +1,143 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: $Author: nxu2 $ + @brief: Used to control specific application and further process data. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. +*****************************************************************************/ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "Amperometric.h" + +#define APPBUFF_SIZE 1000 +uint32_t AppBuff[APPBUFF_SIZE]; +float LFOSCFreq; +/* It's your choice here how to do with the data. Here is just an example to print them to UART */ +int32_t AMPShowResult(float *pData, uint32_t DataCount) +{ + /* Print data*/ + for(int i=0;iWuptClkFreq = LFOSCFreq; + /* Configure general parameters */ + pAMPCfg->SeqStartAddr = 0; + pAMPCfg->MaxSeqLen = 512; /* @todo add checker in function */ + pAMPCfg->RcalVal = 10000.0; + pAMPCfg->NumOfData = -1; /* Never stop until you stop it manually by AppAMPCtrl() function */ + + + /* Configure measurement parameters */ + pAMPCfg->AmpODR = 1; /* Time between samples in seconds */ + pAMPCfg->FifoThresh = 4; /* Number of measurements before alerting host microcontroller */ + + pAMPCfg->SensorBias = 0; /* Sensor bias voltage between reference and sense electrodes*/ + pAMPCfg->LptiaRtiaSel = LPTIARTIA_1K; + pAMPCfg->LpTiaRl = LPTIARLOAD_10R; + pAMPCfg->Vzero = 1100; /* Vzero voltage. Voltage on Sense electrode. Unit is mV*/ + + pAMPCfg->ADCRefVolt = 1.82; /* Measure voltage on Vref_1V8 pin */ +} + +void AD5940_Main(void) +{ + uint32_t temp; + + AD5940PlatformCfg(); + AD5940AMPStructInit(); /* Configure your parameters in this function */ + AppAMPInit(AppBuff, APPBUFF_SIZE); /* Initialize AMP application. Provide a buffer, which is used to store sequencer commands */ + AppAMPCtrl(AMPCTRL_START, 0); /* Control AMP measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppAMPISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + AMPShowResult((float*)AppBuff, temp); /* Show the results to UART */ + } + } +} diff --git a/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.ewd b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 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$PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.rteconfig b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.uvoptx b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.uvoptx new file mode 100644 index 0000000..f46970b --- /dev/null +++ b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Amperometric.c + Amperometric.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.uvprojx b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.uvprojx new file mode 100644 index 0000000..b87af45 --- /dev/null +++ b/examples/AD5940_Amperometric/ADICUP3029/AD5940_Amperometric.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Amperometric.c + 1 + ..\Amperometric.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_Amperometric/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Amperometric/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_Amperometric/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Amperometric/ADICUP3029/main.c b/examples/AD5940_Amperometric/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Amperometric/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Amperometric/Amperometric.c b/examples/AD5940_Amperometric/Amperometric.c new file mode 100644 index 0000000..4f40a47 --- /dev/null +++ b/examples/AD5940_Amperometric/Amperometric.c @@ -0,0 +1,489 @@ +/*! + ***************************************************************************** + @file: Amperometric.c + @author: $Author: mlambe $ + @brief: Amperometric measurement. + @version: $Revision: 766 $ + @date: $Date: 2018-03-21 14:09:35 +0100 (Wed, 21 Mar 2018) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "Amperometric.h" + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppAMPCfg_Type AppAMPCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + .FifoThresh = 5, /* Number of points for FIFO */ + + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .AmpODR = 1.0, /* Sample time in seconds. I.e. every 5 seconds make a measurement */ + .NumOfData = -1, + .RcalVal = 10000.0, /* RCAL = 10kOhm */ + .PwrMod = AFEPWR_LP, + .AMPInited = bFALSE, + .StopRequired = bFALSE, + + /* LPTIA Configure */ + .ExtRtia = bFALSE, /* Set to true if using external RTIA */ + .LptiaRtiaSel = LPTIARTIA_4K, /* COnfigure RTIA */ + .LpTiaRf = LPTIARF_1M, /* Configure LPF resistor */ + .LpTiaRl = LPTIARLOAD_100R, + .ReDoRtiaCal = bTRUE, + .RtiaCalValue = 0, + .ExtRtiaVal = 0, + +/*LPDAC Configure */ + .Vzero = 1100, /* Sets voltage on SE0 and LPTIA */ + .SensorBias = 500, /* Sets voltage between RE0 and SE0 */ + +/* ADC Configure*/ + .ADCPgaGain = ADCPGA_1P5, + .ADCSinc3Osr = ADCSINC3OSR_4, + .ADCSinc2Osr = ADCSINC2OSR_22, + .DataFifoSrc = FIFOSRC_SINC2NOTCH, + .ADCRefVolt = 1.8162, /* Measure voltage on ADCRefVolt pin and enter here*/ +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppAMPGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppAMPCfg_Type**)pCfg = &AppAMPCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +AD5940Err AppAMPCtrl(int32_t AmpCtrl, void *pPara) +{ + switch (AmpCtrl) + { + case AMPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + AD5940_ReadReg(REG_AFE_ADCDAT); /* Any SPI Operation can wakeup AFE */ + if(AppAMPCfg.AMPInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppAMPCfg.WuptClkFreq*AppAMPCfg.AmpODR)-4-1; + AD5940_WUPTCfg(&wupt_cfg); + + AppAMPCfg.FifoDataCount = 0; /* restart */ + break; + } + case AMPCTRL_STOPNOW: + { + AD5940_ReadReg(REG_AFE_ADCDAT); /* Any SPI Operation can wakeup AFE */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case AMPCTRL_STOPSYNC: + { + AppAMPCfg.StopRequired = bTRUE; + break; + } + case AMPCTRL_SHUTDOWN: + { + AppAMPCtrl(AMPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by sleep operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppAMPSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + DSPCfg_Type dsp_cfg; + SWMatrixCfg_Type sw_cfg; + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + //AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bTRUE; + aferef_cfg.Lp1V8BuffEn = bTRUE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + lp_loop.LpDacCfg.LpdacSel = LPDAC0; + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp_loop.LpDacCfg.DataRst = bFALSE; + lp_loop.LpDacCfg.PowerEn = bTRUE; + lp_loop.LpDacCfg.DacData6Bit = (uint32_t)((AppAMPCfg.Vzero-200)/DAC6BITVOLT_1LSB); + lp_loop.LpDacCfg.DacData12Bit =(int32_t)((AppAMPCfg.SensorBias)/DAC12BITVOLT_1LSB) + lp_loop.LpDacCfg.DacData6Bit*64; + if(lp_loop.LpDacCfg.DacData12Bit>lp_loop.LpDacCfg.DacData6Bit*64) + lp_loop.LpDacCfg.DacData12Bit--; + lp_loop.LpAmpCfg.LpAmpSel = LPAMP0; + lp_loop.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp_loop.LpAmpCfg.LpPaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaRf = AppAMPCfg.LpTiaRf; + lp_loop.LpAmpCfg.LpTiaRload = AppAMPCfg.LpTiaRl; + if(AppAMPCfg.ExtRtia == bTRUE) + { + lp_loop.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(9)|LPTIASW(2)|LPTIASW(4)|LPTIASW(5)|LPTIASW(12)|LPTIASW(13); + }else + { + lp_loop.LpAmpCfg.LpTiaRtia = AppAMPCfg.LptiaRtiaSel; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(2)|LPTIASW(4)|LPTIASW(12)|LPTIASW(13); + } + AD5940_LPLoopCfgS(&lp_loop); + + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_VZERO0; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_AIN4; + dsp_cfg.ADCBaseCfg.ADCPga = AppAMPCfg.ADCPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + memset(&dsp_cfg.DftCfg, 0, sizeof(dsp_cfg.DftCfg)); + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppAMPCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppAMPCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + sw_cfg.Dswitch = 0; + sw_cfg.Pswitch = 0; + sw_cfg.Nswitch = 0; + sw_cfg.Tswitch = 0; + AD5940_SWMatrixCfgS(&sw_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_AFECtrlS(AFECTRL_SINC2NOTCH, bFALSE); + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppAMPCfg.InitSeqInfo.SeqId = SEQID_1; + AppAMPCfg.InitSeqInfo.SeqRamAddr = AppAMPCfg.SeqStartAddr; + AppAMPCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppAMPCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppAMPCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppAMPSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_SINC2; + clks_cal.DataCount = 1; + clks_cal.ADCSinc2Osr = AppAMPCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppAMPCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppAMPCfg.SysClkFreq/AppAMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + WaitClks += 15; + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin2); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* wait 250us */ + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert*/ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_ADCCNV|AFECTRL_SINC2NOTCH, bFALSE); /* Stop ADC */ + AD5940_SEQGpioCtrlS(0); + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppAMPCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppAMPCfg.MeasureSeqInfo.SeqRamAddr = AppAMPCfg.InitSeqInfo.SeqRamAddr + AppAMPCfg.InitSeqInfo.SeqLen ; + AppAMPCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppAMPCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppAMPCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} +static AD5940Err AppAMPRtiaCal(void) +{ +fImpPol_Type RtiaCalValue; /* Calibration result */ + LPRTIACal_Type lprtia_cal; + AD5940_StructInit(&lprtia_cal, sizeof(lprtia_cal)); + + lprtia_cal.bPolarResult = bTRUE; /* Magnitude + Phase */ + lprtia_cal.AdcClkFreq = AppAMPCfg.AdcClkFreq; + lprtia_cal.SysClkFreq = AppAMPCfg.SysClkFreq; + lprtia_cal.ADCSinc3Osr = ADCSINC3OSR_4; + lprtia_cal.ADCSinc2Osr = ADCSINC2OSR_22; /* Use SINC2 data as DFT data source */ + lprtia_cal.DftCfg.DftNum = DFTNUM_2048; /* Maximum DFT number */ + lprtia_cal.DftCfg.DftSrc = DFTSRC_SINC2NOTCH; /* For frequency under 12Hz, need to optimize DFT source. Use SINC3 data as DFT source */ + lprtia_cal.DftCfg.HanWinEn = bTRUE; + lprtia_cal.fFreq = AppAMPCfg.AdcClkFreq/4/22/2048*3; /* Sample 3 period of signal, 13.317Hz here. Do not use DC method, because it needs ADC/PGA calibrated firstly(but it's faster) */ + lprtia_cal.fRcal = AppAMPCfg.RcalVal; + lprtia_cal.LpTiaRtia = AppAMPCfg.LptiaRtiaSel; + lprtia_cal.LpAmpPwrMod = LPAMPPWR_NORM; + lprtia_cal.bWithCtia = bFALSE; + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppAMPCfg.RtiaCalValue = RtiaCalValue; + + return AD5940ERR_OK; +} +/* This function provide application initialize. */ +AD5940Err AppAMPInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Do RTIA calibration */ + if(((AppAMPCfg.ReDoRtiaCal == bTRUE) || \ + AppAMPCfg.AMPInited == bFALSE) && AppAMPCfg.ExtRtia == bFALSE) /* Do calibration on the first initializaion */ + { + AppAMPRtiaCal(); + AppAMPCfg.ReDoRtiaCal = bFALSE; + }else + AppAMPCfg.RtiaCalValue.Magnitude = AppAMPCfg.ExtRtiaVal; + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(DFTSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = AppAMPCfg.DataFifoSrc; + fifo_cfg.FIFOThresh = AppAMPCfg.FifoThresh; + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppAMPCfg.AMPInited == bFALSE)||\ + (AppAMPCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppAMPSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppAMPSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppAMPCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + /* Initialization sequencer */ + AppAMPCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppAMPCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppAMPCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppAMPCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppAMPCfg.MeasureSeqInfo); + +// seq_cfg.SeqEnable = bTRUE; +// AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger. It's disabled in initialization sequence */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppAMPCfg.PwrMod, AFEBW_250KHZ); + AppAMPCfg.AMPInited = bTRUE; /* AMP application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppAMPRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppAMPCfg.NumOfData > 0) + { + AppAMPCfg.FifoDataCount += *pDataCount/4; + if(AppAMPCfg.FifoDataCount >= AppAMPCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppAMPCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppAMPDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t i, datacount; + datacount = *pDataCount; + float *pOut = (float *)pData; + for(i=0;i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); + + *pCount = 0; + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + FifoCnt = AD5940_FIFOGetCnt(); + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppAMPRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + + /* Process data */ + AppAMPDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + +/* Calculate voltage */ +float AppAMPCalcVoltage(uint32_t ADCcode) +{ + float kFactor = 1.835/1.82; + float fVolt = 0.0; + int32_t tmp = 0; + tmp = ADCcode - 32768; + switch(AppAMPCfg.ADCPgaGain) + { + case ADCPGA_1: + fVolt = ((float)(tmp)/32768)*(AppAMPCfg.ADCRefVolt/1)*kFactor; + break; + case ADCPGA_1P5: + fVolt = ((float)(tmp)/32768)*(AppAMPCfg.ADCRefVolt/1.5f)*kFactor; + break; + case ADCPGA_2: + fVolt = ((float)(tmp)/32768)*(AppAMPCfg.ADCRefVolt/2)*kFactor; + break; + case ADCPGA_4: + fVolt = ((float)(tmp)/32768)*(AppAMPCfg.ADCRefVolt/4)*kFactor; + break; + case ADCPGA_9: + fVolt = ((float)(tmp)/32768)*(AppAMPCfg.ADCRefVolt/9)*kFactor; + break; + } + return fVolt; +} +/* Calculate current in uA */ +float AppAMPCalcCurrent(uint32_t ADCcode) +{ + float fCurrent, fVoltage = 0.0; + fVoltage = AppAMPCalcVoltage(ADCcode); + fCurrent = fVoltage/AppAMPCfg.RtiaCalValue.Magnitude; + + return -fCurrent*1000000; +} diff --git a/examples/AD5940_Amperometric/Amperometric.h b/examples/AD5940_Amperometric/Amperometric.h new file mode 100644 index 0000000..f8cf5d5 --- /dev/null +++ b/examples/AD5940_Amperometric/Amperometric.h @@ -0,0 +1,94 @@ +/*! + ***************************************************************************** + @file: Amperometric.h + @author: $Author: mlambe $ + @brief: Amperometric measurement header file. + @version: $Revision: 766 $ + @date: $Date: 2018-03-21 14:09:35 +0100 (Wed, 21 Mar 2018) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _AMPEROMETRIC_H_ +#define _AMPEROMETRIC_H_ +#include "AD5940.H" +#include "stdio.h" +#include "string.h" +#include "math.h" + +#define DAC12BITVOLT_1LSB (2200.0f/4095) //mV +#define DAC6BITVOLT_1LSB (DAC12BITVOLT_1LSB*64) //mV +/* + Note: this example will use SEQID_0 as measurement sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration. +*/ + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppAMPInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; + +/* Application related parameters */ + BoolFlag ReDoRtiaCal; /* Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /* The real frequency of system clock */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ + float AmpODR; /* in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically.*/ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float RcalVal; /* Rcal value in Ohm */ + float ADCRefVolt; /* Measured 1.82 V reference*/ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + uint32_t ADCPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /* SINC3 OSR selection. ADCSINC3OSR_2, ADCSINC3OSR_4 */ + uint8_t ADCSinc2Osr; /* SINC2 OSR selection. ADCSINC2OSR_22...ADCSINC2OSR_1333 */ + uint32_t DataFifoSrc; /* DataFIFO source. FIFOSRC_SINC3, FIFOSRC_DFT, FIFOSRC_SINC2NOTCH, FIFOSRC_VAR, FIFOSRC_MEAN*/ + uint32_t LptiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t LpTiaRf; /* Rfilter select */ + uint32_t LpTiaRl; /* SE0 Rload select */ + fImpPol_Type RtiaCalValue; /* Calibrated Rtia value */ + float Vzero; /* Voltage on SE0 pin and Vzero, optimumly 1100mV*/ + float SensorBias; /* Sensor bias voltage = VRE0 - VSE0 */ + BoolFlag ExtRtia; /* Use internal or external Rtia */ + float ExtRtiaVal; /* External Rtia value if using one */ + BoolFlag AMPInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ +/* End */ +}AppAMPCfg_Type; + +/** + * int32_t type Impedance result in Cartesian coordinate +*/ +typedef struct +{ + float Current; + float Voltage; +}fAmpRes_Type; + + + +#define AMPCTRL_START 0 +#define AMPCTRL_STOPNOW 1 +#define AMPCTRL_STOPSYNC 2 +#define AMPCTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + +AD5940Err AppAMPGetCfg(void *pCfg); +AD5940Err AppAMPInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppAMPISR(void *pBuff, uint32_t *pCount); +AD5940Err AppAMPCtrl(int32_t AmpCtrl, void *pPara); +float AppAMPCalcVoltage(uint32_t ADCcode); +float AppAMPCalcCurrent(uint32_t ADCcode); + +#endif diff --git a/examples/AD5940_Amperometric/NUCLEO-F411/AD5940_Amperometric.uvoptx b/examples/AD5940_Amperometric/NUCLEO-F411/AD5940_Amperometric.uvoptx new file mode 100644 index 0000000..2ef9177 --- /dev/null +++ b/examples/AD5940_Amperometric/NUCLEO-F411/AD5940_Amperometric.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Amperometric.c + Amperometric.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Amperometric/NUCLEO-F411/AD5940_Amperometric.uvprojx b/examples/AD5940_Amperometric/NUCLEO-F411/AD5940_Amperometric.uvprojx new file mode 100644 index 0000000..06947bf --- /dev/null +++ b/examples/AD5940_Amperometric/NUCLEO-F411/AD5940_Amperometric.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Amperometric.c + 1 + ..\Amperometric.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Amperometric/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Amperometric/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Amperometric/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Amperometric/NUCLEO-F411/main.c b/examples/AD5940_Amperometric/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Amperometric/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_BATImpedance/AD5940Main.c b/examples/AD5940_BATImpedance/AD5940Main.c new file mode 100644 index 0000000..eccc17f --- /dev/null +++ b/examples/AD5940_BATImpedance/AD5940Main.c @@ -0,0 +1,138 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Used to control specific application and process data. + ----------------------------------------------------------------------------- +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** + * @addtogroup AD5940_System_Examples + * @{ + * @defgroup Battery_Example + * @{ + */ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "BATImpedance.h" + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +/* It's your choice here how to do with the data. Here is just an example to print them to UART */ +int32_t BATShowResult(uint32_t *pData, uint32_t DataCount) +{ + fImpCar_Type *pImp = (fImpCar_Type*)pData; + float freq; + AppBATCtrl(BATCTRL_GETFREQ, &freq); + /*Process data*/ + for(int i=0;iSeqStartAddr = 0; + pBATCfg->MaxSeqLen = 512; + pBATCfg->RcalVal = 50.0; /* Value of RCAL on EVAL-AD5941BATZ board is 50mOhm */ + pBATCfg->ACVoltPP = 300.0f; /* Pk-pk amplitude is 300mV */ + pBATCfg->DCVolt = 1200.0f; /* Offset voltage of 1.2V*/ + pBATCfg->DftNum = DFTNUM_8192; + + pBATCfg->FifoThresh = 2; /* 2 results in FIFO, real and imaginary part. */ + + pBATCfg->SinFreq = 200; /* Sin wave frequency. THis value has no effect if sweep is enabled */ + + pBATCfg->SweepCfg.SweepEn = bTRUE; /* Set to bTRUE to enable sweep function */ + pBATCfg->SweepCfg.SweepStart = 1.0f; /* Start sweep at 1Hz */ + pBATCfg->SweepCfg.SweepStop = 50000.0f; /* Finish sweep at 1000Hz */ + pBATCfg->SweepCfg.SweepPoints = 50; /* 100 frequencies in the sweep */ + pBATCfg->SweepCfg.SweepLog = bTRUE; /* Set to bTRUE to use LOG scale. Set bFALSE to use linear scale */ + +} + +void AD5940_Main(void) +{ + uint32_t temp; + AD5940PlatformCfg(); + + AD5940BATStructInit(); /* Configure your parameters in this function */ + + AppBATInit(AppBuff, APPBUFF_SIZE); /* Initialize BAT application. Provide a buffer, which is used to store sequencer commands */ + AppBATCtrl(BATCTRL_MRCAL, 0); /* Measur RCAL each point in sweep */ + AppBATCtrl(BATCTRL_START, 0); + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppBATISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + AD5940_Delay10us(100000); + BATShowResult(AppBuff, temp); /* Print measurement results over UART */ + AD5940_SEQMmrTrig(SEQID_0); /* Trigger next measurement ussing MMR write*/ + } + } +} + +/** + * @} + * @} + * */ diff --git a/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.ewd b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.ewd new file mode 100644 index 0000000..d9e97ce --- /dev/null +++ b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.ewd @@ -0,0 +1,2834 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 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Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.rteconfig b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.rteconfig new file mode 100644 index 0000000..06593ae --- /dev/null +++ b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.rteconfig @@ -0,0 +1,56 @@ + + + + + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.uvoptx b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.uvoptx new file mode 100644 index 0000000..8b7311f --- /dev/null +++ b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.uvoptx @@ -0,0 +1,312 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + AppBATCfg + + + 1 + 1 + FifoCnt + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + System Viewer\GPIO0 + 35905 + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BATImpedance.c + BATImpedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.uvprojx b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.uvprojx new file mode 100644 index 0000000..5c876c5 --- /dev/null +++ b/examples/AD5940_BATImpedance/ADICUP3029/AD5940_BATImpedance.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BATImpedance.c + 1 + ..\BATImpedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_BATImpedance/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_BATImpedance/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..814d3bf --- /dev/null +++ b/examples/AD5940_BATImpedance/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,171 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* This function is used to set Dn on Arduino shield(and set it to output) */ +void Arduino_WriteDn(uint32_t Dn, BoolFlag bHigh) +{ + if(Dn&(1<<3)) //set D3, P0.13 + { + pADI_GPIO0->OEN |= 1<<13; + if(bHigh) + pADI_GPIO0->SET = 1<<13; + else + pADI_GPIO0->CLR = 1<<13; + } + if(Dn&(1<<4))//Set D4, P0.9 + { + pADI_GPIO0->OEN |= 1<<9; + if(bHigh) + pADI_GPIO0->SET = 1<<9; + else + pADI_GPIO0->CLR = 1<<9; + } +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_BATImpedance/ADICUP3029/main.c b/examples/AD5940_BATImpedance/ADICUP3029/main.c new file mode 100644 index 0000000..6fadc26 --- /dev/null +++ b/examples/AD5940_BATImpedance/ADICUP3029/main.c @@ -0,0 +1,141 @@ +/* +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_BATImpedance/BATImpedance.c b/examples/AD5940_BATImpedance/BATImpedance.c new file mode 100644 index 0000000..5187bc8 --- /dev/null +++ b/examples/AD5940_BATImpedance/BATImpedance.c @@ -0,0 +1,662 @@ +/*! + ***************************************************************************** + @file: BATImpedance.c + @author: Neo Xu + @brief: Battery impedance measurement sequences. + ----------------------------------------------------------------------------- +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "BATImpedance.h" + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppBATCfg_Type AppBATCfg = +{ + .state = STATE_IDLE, + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .BatODR = 20.0, /* 20.0 Hz*/ + .NumOfData = -1, + + .PwrMod = AFEPWR_LP, + .ACVoltPP = 800.0, + .DCVolt = 1100.0f, + .SinFreq = 50000.0, /* 50kHz */ + .RcalVal = 50.0, /* 50mOhm */ + + .ADCSinc3Osr = ADCSINC3OSR_4, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .DftNum = DFTNUM_16384, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .FifoThresh = 4, + .BATInited = bFALSE, + .StopRequired = bFALSE, + .MeasSeqCycleCount = 0, + + .SweepCfg.SweepEn = bTRUE, + .SweepCfg.SweepStart = 1000, + .SweepCfg.SweepStop = 100000.0, + .SweepCfg.SweepPoints = 101, + .SweepCfg.SweepLog = bFALSE, + .SweepCfg.SweepIndex = 0, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppBATGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppBATCfg_Type**)pCfg = &AppBATCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + + +static void PreCharge(unsigned char channel) +{ + void Arduino_WriteDn(uint32_t Dn, BoolFlag bHigh); + switch(channel) + { + case PRECHARGE_CH1: //00 + Arduino_WriteDn(1<<3, bFALSE); //d3 + Arduino_WriteDn(1<<4, bFALSE); //d4 + break; + case PRECHARGE_CH2: //01 + Arduino_WriteDn(1<<3, bTRUE); + Arduino_WriteDn(1<<4, bFALSE); + break; + case PRECHARGE_CH3://10 + Arduino_WriteDn(1<<3, bFALSE); + Arduino_WriteDn(1<<4, bTRUE); + break; + default: + break; + } + AD5940_Delay10us(PRECHARGE_WAIT_MS*100); + Arduino_WriteDn(1<<3, bTRUE); //d3 + Arduino_WriteDn(1<<4, bTRUE); //d4 +} + +AD5940Err AppBATCtrl(int32_t BatCtrl, void *pPara) +{ + switch (BatCtrl) + { + case BATCTRL_START: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppBATCfg.BATInited == bFALSE) + return AD5940ERR_APPERROR; + AD5940_WriteReg(REG_AFE_SWMUX, 1<<0); /* control ADG636 to measure battery */ + AD5940_WriteReg(REG_AFE_SYNCEXTDEVICE, 0x0); + PreCharge(PRECHARGE_BAT); + PreCharge(PRECHARGE_AMP); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); + AD5940_FIFOThrshSet(AppBATCfg.FifoThresh); /* DFT result contains both real and image. */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bTRUE); + AppBATCfg.state = STATE_BATTERY; + /* Trigger sequence using MMR write */ + AD5940_SEQMmrTrig(SEQID_0); + AppBATCfg.FifoDataCount = 0; /* restart */ + + break; + } + case BATCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case BATCTRL_STOPSYNC: + { + AppBATCfg.StopRequired = bTRUE; + break; + } + case BATCTRL_GETFREQ: + if(pPara) + { + if(AppBATCfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppBATCfg.FreqofData; + else + *(float*)pPara = AppBATCfg.SinFreq; + } + break; + case BATCTRL_SHUTDOWN: + { + AppBATCtrl(BATCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by sleep operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + case BATCTRL_MRCAL: + if(AD5940_WakeUp(10) > 10) + return AD5940ERR_WAKEUP; + //Settle input RC filter. + AD5940_WriteReg(REG_AFE_SWMUX, 0); //control ADG636 to measure rcal + AD5940_WriteReg(REG_AFE_SYNCEXTDEVICE, 0x4); + PreCharge(PRECHARGE_RCAL); + PreCharge(PRECHARGE_AMP); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); + AD5940_FIFOThrshSet(2); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bTRUE); //enable FIFO + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + AD5940_Delay10us(10000); + AppBATMeasureRCAL(); + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppBATSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type hs_loop; + LPLoopCfg_Type lp_loop; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Disable all firstly. */ + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control, Use LP loop to provide DC Bias voltage. */ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + /* Determine buffer gain according to ACVoltPP */ + hs_loop.HsDacCfg.ExcitBufGain = EXCITBUFGAIN_2; + hs_loop.HsDacCfg.HsDacGain = HSDACGAIN_1; + hs_loop.HsDacCfg.HsDacUpdateRate = 0x1B; //the maximum update rate is 16MHz/7 + + hs_loop.HsTiaCfg.DiodeClose = bFALSE; + hs_loop.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hs_loop.HsTiaCfg.HstiaCtia = 31; //HSTIA is not used. + hs_loop.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_10K; + + hs_loop.SWMatCfg.Dswitch = SWD_CE0; + hs_loop.SWMatCfg.Pswitch = SWP_AIN1; + hs_loop.SWMatCfg.Nswitch = SWN_AIN0; //AIN0 is connected to AIN4 externally by JP3. + hs_loop.SWMatCfg.Tswitch = 0; //T switch is not used. + + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bFALSE; + hs_loop.WgCfg.OffsetCalEn = bFALSE; + if(AppBATCfg.SweepCfg.SweepEn == bTRUE) + { + AppBATCfg.FreqofData = AppBATCfg.SweepCfg.SweepStart; + AppBATCfg.SweepCurrFreq = AppBATCfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppBATCfg.SweepCfg, &AppBATCfg.SweepNextFreq); + sin_freq = AppBATCfg.SweepCurrFreq; + } + else + { + sin_freq = AppBATCfg.SinFreq; + AppBATCfg.FreqofData = sin_freq; + } + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppBATCfg.SysClkFreq); + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppBATCfg.ACVoltPP/800.0f*2047 + 0.5f); + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&hs_loop); + //Use LP loop to output bias voltage on AIN4 pin, which provides voltage on AIN0(N switch). + lp_loop.LpDacCfg.LpdacSel = LPDAC0; + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_12BIT; + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_6BIT; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp_loop.LpDacCfg.DataRst = bFALSE; + lp_loop.LpDacCfg.PowerEn = bTRUE; + lp_loop.LpDacCfg.DacData12Bit = (uint32_t)((AppBATCfg.DCVolt-200)/2200.0f*4095); + lp_loop.LpDacCfg.DacData6Bit = 31; //not used. Set it to middle value. + + lp_loop.LpAmpCfg.LpAmpSel = LPAMP0; + lp_loop.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp_loop.LpAmpCfg.LpPaPwrEn = bFALSE; + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaRf = LPTIARF_20K; //External cap is 1uF. + lp_loop.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lp_loop.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(7)|LPTIASW(5)|LPTIASW(9); + AD5940_LPLoopCfgS(&lp_loop); + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_AIN2; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_AIN3; + dsp_cfg.ADCBaseCfg.ADCPga = ADCPGA_1P5; + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppBATCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppBATCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppBATCfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppBATCfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppBATCfg.HanWinEn; + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one external command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppBATCfg.InitSeqInfo.SeqId = SEQID_1; + AppBATCfg.InitSeqInfo.SeqRamAddr = AppBATCfg.SeqStartAddr; + AppBATCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppBATCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBATCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +//the sequence used to measure battery response voltage. +static AD5940Err AppBATSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppBATCfg.DftSrc; + clks_cal.DataCount = 1L<<(AppBATCfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppBATCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppBATCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBATCfg.SysClkFreq/AppBATCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* wait 250us for reference power up from hibernate mode. */ + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50000)); /* Wait for ADC ready. */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT/*|AFECTRL_WG*/|AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bFALSE); /* Stop ADC convert and DFT */ + //AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + AppBATCfg.MeasSeqCycleCount = AD5940_SEQCycleTime(); + AppBATCfg.MaxODR = 1/(((AppBATCfg.MeasSeqCycleCount + 10) / 16.0)* 1E-6) ; + if(AppBATCfg.BatODR > AppBATCfg.MaxODR) + { + /* We have requested a sampling rate that cannot be achieved with the time it + takes to acquire a sample. + */ + AppBATCfg.BatODR = AppBATCfg.MaxODR; + } + + if(error == AD5940ERR_OK) + { + AppBATCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppBATCfg.MeasureSeqInfo.SeqRamAddr = AppBATCfg.InitSeqInfo.SeqRamAddr + AppBATCfg.InitSeqInfo.SeqLen ; + AppBATCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppBATCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBATCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/* This function provide application initialize. */ +AD5940Err AppBATInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppBATCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppBATCfg.BATInited == bFALSE)||\ + (AppBATCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + /* Generate initialize sequence */ + error = AppBATSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + /* Generate measurement sequence */ + error = AppBATSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + AppBATCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + /* Initialization sequencer */ + AppBATCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBATCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppBATCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + if(AppBATCfg.SweepCfg.SweepEn == bTRUE) + AppBATCheckFreq(AppBATCfg.SweepCfg.SweepStart); + else + AppBATCheckFreq(AppBATCfg.SinFreq); + /* Measurement sequence */ + AppBATCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBATCfg.MeasureSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + AD5940_AFEPwrBW(AppBATCfg.PwrMod, AFEBW_250KHZ); + AD5940_WriteReg(REG_AFE_SWMUX, 1<<1); + AppBATCfg.BATInited = bTRUE; /* BAT application has been initialized. */ + return AD5940ERR_OK; +} + +/* Depending on frequency of Sin wave set optimum filter settings */ +AD5940Err AppBATCheckFreq(float freq) +{ + DSPCfg_Type dsp_cfg; + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + uint32_t SeqCmdBuff[2]; + uint32_t SRAMAddr = 0;; + /* Step 1: Check Frequency */ + if(freq < 0.51) + { + AppBATCfg.ADCSinc2Osr = ADCSINC2OSR_1067; + AppBATCfg.ADCSinc3Osr = ADCSINC3OSR_4; + AppBATCfg.DftSrc = DFTSRC_SINC2NOTCH; + }else if(freq < 5 ) + { + AppBATCfg.ADCSinc2Osr = ADCSINC2OSR_640; + AppBATCfg.ADCSinc3Osr= ADCSINC3OSR_4; + AppBATCfg.DftSrc = DFTSRC_SINC2NOTCH; + }else if(freq <450) + { + AppBATCfg.ADCSinc2Osr = ADCSINC2OSR_178; + AppBATCfg.ADCSinc3Osr = ADCSINC3OSR_4; + AppBATCfg.DftSrc = DFTSRC_SINC2NOTCH; + }else if(freq < 80000) + { + AppBATCfg.ADCSinc3Osr = ADCSINC3OSR_4; + AppBATCfg.ADCSinc2Osr = ADCSINC2OSR_178; + AppBATCfg.DftSrc = DFTSRC_SINC3; + } + /* Step 2: Adjust ADCFILTERCON */ + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_AIN2; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_AIN3; + dsp_cfg.ADCBaseCfg.ADCPga = ADCPGA_1P5; + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppBATCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppBATCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppBATCfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppBATCfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppBATCfg.HanWinEn; + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Step 3: Calculate clocks needed to get result to FIFO and update sequencer wait command */ + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppBATCfg.DftSrc; + clks_cal.DataCount = 1L<<(AppBATCfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppBATCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppBATCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBATCfg.SysClkFreq/AppBATCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Find start address of sequence in SRAM + Update WaitClks */ + SRAMAddr = AppBATCfg.MeasureSeqInfo.SeqRamAddr; + SeqCmdBuff[0] = SEQ_WAIT(WaitClks); + AD5940_SEQCmdWrite(SRAMAddr+4, SeqCmdBuff, 1); + + + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppBATRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppBATCfg.NumOfData > 0) + { + AppBATCfg.FifoDataCount += *pDataCount/4; + if(AppBATCfg.FifoDataCount >= AppBATCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppBATCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppBATCfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AD5940_WGFreqCtrlS(AppBATCfg.SweepNextFreq, AppBATCfg.SysClkFreq); + AppBATCheckFreq(AppBATCfg.SweepNextFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppBATDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t DftResCount = DataCount/2; + + fImpCar_Type * const pOut = (fImpCar_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + DataCount = (DataCount/2)*2; /* We expect both Real and imaginary result. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal; + BatVolt.Image = pSrcData->Image; + pSrcData ++; + BatImp = AD5940_ComplexDivFloat(&BatVolt, &AppBATCfg.RcalVolt); //ratio measurement, Zbat = Vbat/Vrcal * Rcal; + BatImp.Image *= AppBATCfg.RcalVal; + BatImp.Real *= AppBATCfg.RcalVal; + pOut[i] = BatImp; + // printf("i: %d , %.2f , %.2f , %.2f , %.2f , %.2f , %.2f , %.2f\n",AppBATCfg.SweepCfg.SweepIndex, AppBATCfg.SweepCurrFreq, BatImp.Real, BatImp.Image, AppBATCfg.RcalVolt.Real, AppBATCfg.RcalVolt.Image, AppBATCfg.RcalVoltTable[AppBATCfg.SweepCfg.SweepIndex][0], AppBATCfg.RcalVoltTable[AppBATCfg.SweepCfg.SweepIndex][1]); + } + *pDataCount = DftResCount; + } + /* Calculate next frequency point */ + if(AppBATCfg.SweepCfg.SweepEn == bTRUE) + { + AppBATCfg.FreqofData = AppBATCfg.SweepCurrFreq; + AppBATCfg.SweepCurrFreq = AppBATCfg.SweepNextFreq; + if(AppBATCfg.state == STATE_BATTERY) + { + AppBATCfg.RcalVolt.Real = AppBATCfg.RcalVoltTable[AppBATCfg.SweepCfg.SweepIndex][0]; + AppBATCfg.RcalVolt.Image = AppBATCfg.RcalVoltTable[AppBATCfg.SweepCfg.SweepIndex][1]; + } + AD5940_SweepNext(&AppBATCfg.SweepCfg, &AppBATCfg.SweepNextFreq); + } + return AD5940ERR_OK; +} + +/** +*/ +AD5940Err AppBATISR(void *pBuff, uint32_t *pCount) +{ + uint32_t FifoCnt; + if(AppBATCfg.BATInited == bFALSE) + return AD5940ERR_APPERROR; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Don't enter hibernate */ + *pCount = 0; + + if(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 2 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/2)*2; + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppBATRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter hibernate mode */ + /* Process data */ + AppBATDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + +AD5940Err AppBATMeasureRCAL(void) +{ + uint32_t buff[100]; + uint32_t temp; + AD5940_INTCCfg(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH, bFALSE); /* Disable INT0 interrupt for RCAL measurement. */ + AppBATCfg.state = STATE_RCAL; + if(AppBATCfg.SweepCfg.SweepEn) + { + uint32_t i; + for(i=0;i + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BATImpedance.c + BATImpedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BATImpedance/NUCLEO-F411/AD5940_BATImpedance.uvprojx b/examples/AD5940_BATImpedance/NUCLEO-F411/AD5940_BATImpedance.uvprojx new file mode 100644 index 0000000..4309293 --- /dev/null +++ b/examples/AD5940_BATImpedance/NUCLEO-F411/AD5940_BATImpedance.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X, ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BATImpedance.c + 1 + ..\BATImpedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_BATImpedance/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_BATImpedance/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..2ba36d5 --- /dev/null +++ b/examples/AD5940_BATImpedance/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,230 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define ARDUINO_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define ARDUINO_D4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +#define ARDUINO_D3_PIN GPIO_PIN_3 +#define ARDUINO_D3_PORT GPIOB +#define ARDUINO_D4_PIN GPIO_PIN_5 +#define ARDUINO_D4_PORT GPIOB + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +/* This function is used to set Dn on Arduino shield(and set it to output) */ +void Arduino_WriteDn(uint32_t Dn, BoolFlag bHigh) +{ + if(Dn&(1<<3)) //set D3, P0.13 + { + if(bHigh) + HAL_GPIO_WritePin(ARDUINO_D3_PORT, ARDUINO_D3_PIN, GPIO_PIN_SET); + else + HAL_GPIO_WritePin(ARDUINO_D3_PORT, ARDUINO_D3_PIN, GPIO_PIN_RESET); + } + if(Dn&(1<<4))//Set D4, P0.9 + { + if(bHigh) + HAL_GPIO_WritePin(ARDUINO_D4_PORT, ARDUINO_D4_PIN, GPIO_PIN_SET); + else + HAL_GPIO_WritePin(ARDUINO_D4_PORT, ARDUINO_D4_PIN, GPIO_PIN_RESET); + } +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + + //D3 D4 GPIO + ARDUINO_D3_GPIO_CLK_ENABLE(); + ARDUINO_D4_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = ARDUINO_D3_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(ARDUINO_D3_PORT, &GPIO_InitStruct); + GPIO_InitStruct.Pin = ARDUINO_D4_PIN; + HAL_GPIO_Init(ARDUINO_D4_PORT, &GPIO_InitStruct); + + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_BATImpedance/NUCLEO-F411/main.c b/examples/AD5940_BATImpedance/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_BATImpedance/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_BATImpedance/ad5940.c b/examples/AD5940_BATImpedance/ad5940.c new file mode 100644 index 0000000..65621a6 --- /dev/null +++ b/examples/AD5940_BATImpedance/ad5940.c @@ -0,0 +1,4392 @@ +/** + * @file ad5940.c + * @brief AD5940 library. This file contains all AD5940 library functions. + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" + +/*! \mainpage AD5940 Library Introduction + * + * ![AD5940 EVAL Board](https://www.analog.com/-/media/analog/en/evaluation-board-images/images/eval-ad5940elcztop-web.gif?h=500&thn=1&hash=1F38F7CC1002894616F74D316365C0A2631C432B "ADI logo") + * + * # Introduction + * + * The documentation is for AD594x library and examples. + * + * # Manual Structure + * + * @ref AD5940_Library + * - @ref AD5940_Functions + * - @ref TypeDefinitions + * @ref AD5940_Standard_Examples + * @ref AD5940_System_Examples + * + * # How to Use It + * We provide examples that can directly run out of box. + * The files can generally be separated to three parts: + * - AD5940 Library files. ad5940.c and ad5940.h specifically. These two files are shared among all examples. + * - AD5940 System Examples. The system examples mean system level application like measuring impedance. + * - Standard examples. These include basic block level examples like ADC. It shows how to setup and use one specific block. + * + * ## Requirements to run these examples + * ### Hardware + * - Use EVAL_AD5940 or EVAL_AD5941. The default MCU board we used is ADICUP3029. We also provide project for ST NUCLEO board. + * - Or use EVAL_ADuCM355 + * ### Software + * - Pull all the source file from [GitHub](https://github.com/analogdevicesinc/ad5940-examples.git) + * - CMSIS pack that related to specific MCU. This normally is done by IDE you use. + * + * ## Materials + * Please use this library together with following materials. + * - [AD5940 Data Sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5940.pdf) + * - [AD5940 Eval Board](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/EVAL-AD5940.html) + * + */ + +/* Remove below variables after AD594x is released. */ +static BoolFlag bIsS2silicon = bFALSE; + +/* Declare of SPI functions used to read/write registers */ +#ifndef CHIPSEL_M355 +static uint32_t AD5940_SPIReadReg(uint16_t RegAddr); +static void AD5940_SPIWriteReg(uint16_t RegAddr, uint32_t RegData); +#else +static uint32_t AD5940_D2DReadReg(uint16_t RegAddr); +static void AD5940_D2DWriteReg(uint16_t RegAddr, uint32_t RegData); +#endif + +/** + * @addtogroup AD5940_Library + * The library functions, structures and constants. + * @{ + * @defgroup AD5940_Functions + * @{ + * @defgroup Function_Helpers + * @brief The functions with no hardware access. They are helpers. + * @{ + * @defgroup Sequencer_Generator_Functions + * @brief The set of function used to track all register read and write once it's enabled. It can translate register write operation to sequencer commands. + * @{ +*/ + +#define SEQUENCE_GENERATOR /*!< Build sequence generator part in to lib. Comment this line to remove this feature */ + +#ifdef SEQUENCE_GENERATOR +/** + * Structure used to store register information(address and its data) + * */ +typedef struct +{ + uint32_t RegAddr :8; /**< 8bit address is enough for sequencer */ + uint32_t RegValue :24; /**< Reg data is limited to 24bit by sequencer */ +}SEQGenRegInfo_Type; + +/** + * Sequencer generator data base. +*/ +struct +{ + BoolFlag EngineStart; /**< Flag to mark start of the generator */ + uint32_t BufferSize; /**< Total buffer size */ + + uint32_t *pSeqBuff; /**< The buffer for sequence generator(both sequences and RegInfo) */ + uint32_t SeqLen; /**< Generated sequence length till now */ + SEQGenRegInfo_Type *pRegInfo; /**< Pointer to buffer where stores register info */ + uint32_t RegCount; /**< The count of register info available in buffer *pRegInfo. */ + AD5940Err LastError; /**< The last error message. */ +}SeqGenDB; /* Data base of Seq Generator */ + +/** + * @brief Manually input a command to sequencer generator. + * @param CmdWord: The 32-bit width sequencer command word. @ref Sequencer_Helper can be used to generate commands. + * @return None; +*/ +void AD5940_SEQGenInsert(uint32_t CmdWord) +{ + uint32_t temp; + temp = SeqGenDB.RegCount + SeqGenDB.SeqLen; + /* Generate Sequence command */ + if(temp < SeqGenDB.BufferSize) + { + SeqGenDB.pSeqBuff[SeqGenDB.SeqLen] = CmdWord; + SeqGenDB.SeqLen ++; + } + else /* There is no buffer */ + SeqGenDB.LastError = AD5940ERR_BUFF; +} + +/** + * @brief Search data-base to get current register value. + * @param RegAddr: The register address. + * @param pIndex: Pointer to a variable that used to store index of found register-info. + * @return Return AD5940ERR_OK if register found in data-base. Otherwise return AD5940ERR_SEQREG. +*/ +static AD5940Err AD5940_SEQGenSearchReg(uint32_t RegAddr, uint32_t *pIndex) +{ + uint32_t i; + + RegAddr = (RegAddr>>2)&0xff; + for(i=0;i>2)&0xff; + SeqGenDB.pRegInfo[0].RegValue = RegData&0x00ffffff; + SeqGenDB.RegCount ++; + } + else /* There is no more buffer */ + { + SeqGenDB.LastError = AD5940ERR_BUFF; + } +} + +/** + * @brief Get current register value. If we have record in data-base, read it. Otherwise, return the register default value. + * @param RegAddr: The register address. + * @return Return register value. +*/ +static uint32_t AD5940_SEQReadReg(uint16_t RegAddr) +{ + uint32_t RegIndex, RegData; + + if(AD5940_SEQGenSearchReg(RegAddr, &RegIndex) != AD5940ERR_OK) + { + /* There is no record in data-base, read the default value. */ + AD5940_SEQGenGetRegDefault(RegAddr, &RegData); + AD5940_SEQRegInfoInsert(RegAddr, RegData); + } + else + { + /* return the current register value stored in data-base */ + RegData = SeqGenDB.pRegInfo[RegIndex].RegValue; + } + + return RegData; +} + +/** + * @brief Generate a sequencer command to write register. If the register address is out of range, it won't generate a command. + * This function will also update the register-info in data-base to record current register value. + * @param RegAddr: The register address. + * @param RegData: The register value. + * @return Return None. +*/ +static void AD5940_SEQWriteReg(uint16_t RegAddr, uint32_t RegData) +{ + uint32_t RegIndex; + + if(RegAddr > 0x21ff) + { + SeqGenDB.LastError = AD5940ERR_ADDROR; /* address out of range */ + return; + } + + if(AD5940_SEQGenSearchReg(RegAddr, &RegIndex) == AD5940ERR_OK) + { + /* Store register value */ + SeqGenDB.pRegInfo[RegIndex].RegValue = RegData; + /* Generate Sequence command */ + AD5940_SEQGenInsert(SEQ_WR(RegAddr, RegData)); + } + else + { + AD5940_SEQRegInfoInsert(RegAddr, RegData); + /* Generate Sequence command */ + AD5940_SEQGenInsert(SEQ_WR(RegAddr, RegData)); + } +} + +/** + * @brief Initialize sequencer generator with specified buffer. + * The buffer is used to store sequencer generated and record register value changes. + * The command is stored from start address of buffer while register value is stored from end of buffer. + * Buffer[0] : First sequencer command; + * Buffer[1] : Second Sequencer command; + * ... + * Buffer[Last-1]: The second register value record. + * Buffer[Last]: The first register value record. + * @param pBuffer: Pointer to the buffer. + * @param BufferSize: The buffer length. + * @return Return None. +*/ +void AD5940_SEQGenInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + if(BufferSize < 2) return; + SeqGenDB.BufferSize = BufferSize; + SeqGenDB.pSeqBuff = pBuffer; + SeqGenDB.pRegInfo = (SEQGenRegInfo_Type*)pBuffer + BufferSize - 1; /* Point to the last element in buffer */ + SeqGenDB.SeqLen = 0; + + SeqGenDB.RegCount = 0; + SeqGenDB.LastError = AD5940ERR_OK; + SeqGenDB.EngineStart = bFALSE; +} + +/** + * @brief Get sequencer command generated. + * @param ppSeqCmd: Pointer to a variable(pointer) used to store the pointer to generated sequencer command. + * @param pSeqLen: Pointer to a variable that used to store how many commands available in buffer. + * @return Return lasterror. +*/ +AD5940Err AD5940_SEQGenFetchSeq(const uint32_t **ppSeqCmd, uint32_t *pSeqLen) +{ + AD5940Err lasterror; + + if(ppSeqCmd) + *ppSeqCmd = SeqGenDB.pSeqBuff; + if(pSeqLen) + *pSeqLen = SeqGenDB.SeqLen; + + //SeqGenDB.SeqLen = 0; /* Start a new sequence */ + lasterror = SeqGenDB.LastError; + //SeqGenDB.LastError = AD5940ERR_OK; /* Clear error message */ + return lasterror; +} + +/** + * @brief Start or stop the sequencer generator. Once started, the register write will be recorded to sequencer generator. + * Once it's disabled, the register write is written to AD5940 directly by SPI bus. + * @param bFlag: Enable or disable sequencer generator. + * @return Return None. +*/ +void AD5940_SEQGenCtrl(BoolFlag bFlag) +{ + if(bFlag == bFALSE) /* Disable sequence generator */ + { + SeqGenDB.EngineStart = bFALSE; + } + else + { + SeqGenDB.SeqLen = 0; + SeqGenDB.LastError = AD5940ERR_OK; /* Clear error message */ + SeqGenDB.EngineStart = bTRUE; + } +} + +/** + * @brief Calculate the number of cycles in the sequence + * @return Return Number of ACLK Cycles that a generated sequence will take. +*/ +uint32_t AD5940_SEQCycleTime(void) +{ + uint32_t i, Cycles, Cmd; + Cycles = 0; + for(i=0;i> 30) & 0x3; + if (Cmd & 0x2) + { + /* A write command */ + Cycles += 1; + } + else + { + if (Cmd & 0x1) + { + /* Timeout Command */ + Cycles += 1; + } + else + { + /* Wait command */ + Cycles += SeqGenDB.pSeqBuff[i] & 0x3FFFFFFF; + } + } + } + return Cycles; +} +#endif +/** + * @} Sequencer_Generator_Functions +*/ + +/** + * Check if an uint8_t value exist in table. +*/ +static int32_t _is_value_in_table(uint8_t value, const uint8_t *table, uint8_t len, uint8_t *index) +{ + for(int i=0; iADCRate == ADCRATE_800KHZ && pFilterInfo->ADCSinc3Osr == ADCSINC3OSR_2)||\ + (pFilterInfo->ADCRate == ADCRATE_1P6MHZ && pFilterInfo->ADCSinc3Osr != ADCSINC3OSR_2)) + { + //this combination suits for filter: + //SINC3 OSR2, for 800kSPS + //and SINC3 OSR4 and OSR5 for 1.6MSPS, + const uint8_t available_sinc2_osr[] = {ADCSINC2OSR_533, ADCSINC2OSR_667,ADCSINC2OSR_800, ADCSINC2OSR_889, ADCSINC2OSR_1333}; + const uint8_t dl_50Hz[] = {15,12,10,9,6}; + uint8_t index; + if(_is_value_in_table(pFilterInfo->ADCSinc2Osr, available_sinc2_osr, sizeof(available_sinc2_osr), &index)) + { + *dl = dl_50Hz[index]; + return bTRUE; + } + } + else if(pFilterInfo->ADCRate == ADCRATE_1P6MHZ && pFilterInfo->ADCSinc3Osr == ADCSINC3OSR_2) + { + //this combination suits for filter: + //SINC3 OSR2 for 1.6MSPS + const uint8_t available_sinc2_osr[] = {ADCSINC2OSR_889, ADCSINC2OSR_1067, ADCSINC2OSR_1333}; + const uint8_t dl_50Hz[] = {18,15,12}; + uint8_t index; + if(_is_value_in_table(pFilterInfo->ADCSinc2Osr, available_sinc2_osr, sizeof(available_sinc2_osr), &index)) + { + *dl = dl_50Hz[index]; + return bTRUE; + } + } + else if(pFilterInfo->ADCRate == ADCRATE_800KHZ && pFilterInfo->ADCSinc3Osr != ADCSINC3OSR_2) + { + //this combination suits for filter: + //SINC3 OSR4 and OSR5 for 800kSPS, + const uint8_t available_sinc2_osr[] = {ADCSINC2OSR_178, ADCSINC2OSR_267, ADCSINC2OSR_533, ADCSINC2OSR_640,\ + ADCSINC2OSR_800, ADCSINC2OSR_1067}; + const uint8_t dl_50Hz[] = {18,12,6,5,4,3}; + uint8_t index; + if(_is_value_in_table(pFilterInfo->ADCSinc2Osr, available_sinc2_osr, sizeof(available_sinc2_osr), &index)) + { + *dl = dl_50Hz[index]; + return bTRUE; + } + } + *dl = 0; + return bFALSE; +} + +/** + * @brief return if the SINC3/SINC2 combination is available for notch 60Hz filter. + * If it's not availabe, hardware automatically bypass Notch even if it's enabled. + * @param pFilterInfo the filter configuration, need sinc2/sinc3 osr and adc data rate information. + * @return return bTRUE if notch 60Hz filter is available. +*/ +BoolFlag AD5940_Notch60HzAvailable(ADCFilterCfg_Type *pFilterInfo, uint8_t *dl) +{ + if((pFilterInfo->ADCRate == ADCRATE_800KHZ && pFilterInfo->ADCSinc3Osr == ADCSINC3OSR_2)||\ + (pFilterInfo->ADCRate == ADCRATE_1P6MHZ && pFilterInfo->ADCSinc3Osr != ADCSINC3OSR_2)) + { + //this combination suits for filter: + //SINC3 OSR2, for 800kSPS + //and SINC3 OSR4 and OSR5 for 1.6MSPS, + const uint8_t available_sinc2_osr[] = {ADCSINC2OSR_667, ADCSINC2OSR_1333}; + const uint8_t dl_60Hz[] = {10,5}; + uint8_t index; + if(_is_value_in_table(pFilterInfo->ADCSinc2Osr, available_sinc2_osr, sizeof(available_sinc2_osr), &index)) + { + *dl = dl_60Hz[index]; + return bTRUE; + } + } + else if(pFilterInfo->ADCRate == ADCRATE_1P6MHZ && pFilterInfo->ADCSinc3Osr == ADCSINC3OSR_2) + { + //this combination suits for filter: + //SINC3 OSR2 for 1.6MSPS + const uint8_t available_sinc2_osr[] = {ADCSINC2OSR_889, ADCSINC2OSR_1333}; + const uint8_t dl_60Hz[] = {15,10}; + uint8_t index; + if(_is_value_in_table(pFilterInfo->ADCSinc2Osr, available_sinc2_osr, sizeof(available_sinc2_osr), &index)) + { + *dl = dl_60Hz[index]; + return bTRUE; + } + } + else if(pFilterInfo->ADCRate == ADCRATE_800KHZ && pFilterInfo->ADCSinc3Osr != ADCSINC3OSR_2) + { + //this combination suits for filter: + //SINC3 OSR4 and OSR5 for 800kSPS, + const uint8_t available_sinc2_osr[] = {ADCSINC2OSR_178, ADCSINC2OSR_267, ADCSINC2OSR_533, ADCSINC2OSR_667,\ + ADCSINC2OSR_889, ADCSINC2OSR_1333}; + const uint8_t dl_60Hz[] = {15,10,5,4,3,2}; + uint8_t index; + if(_is_value_in_table(pFilterInfo->ADCSinc2Osr, available_sinc2_osr, sizeof(available_sinc2_osr), &index)) + { + *dl = dl_60Hz[index]; + return bTRUE; + } + } + *dl = 0; + return bFALSE; +} + +/** + * @brief Calculate how many clocks are needed in sequencer wait command to generate required number of data from filter output. + * @note When measurement is done, it's recommend to disable blocks like ADCPWR, ADCCNV, SINC2, DFT etc. If blocks remain powered up, + * they may need less clocks to generate required number of output. Use function @ref AD5940_AFECtrlS to control these blocks. + * @param pFilterInfo: Pointer to configuration structure. + * @param pClocks: pointer used to store results. + * @return return none. +*/ +void AD5940_ClksCalculate(ClksCalInfo_Type *pFilterInfo, uint32_t *pClocks) +{ + uint32_t temp = 0; + const uint32_t sinc2osr_table[] = {22,44,89,178,267,533,640,667,800,889,1067,1333,0}; + const uint32_t sinc3osr_table[] = {5,4,2,0}; + + *pClocks = 0; + if(pFilterInfo == NULL) return; + if(pClocks == NULL) return; + if(pFilterInfo->ADCSinc2Osr > ADCSINC2OSR_1333) return; + if(pFilterInfo->ADCSinc3Osr > 2) return; /* 0: OSR5, 1:OSR4, 2:OSR2 */ + if(pFilterInfo->ADCAvgNum > ADCAVGNUM_16) return; /* Average number index:0,1,2,3 */ + switch(pFilterInfo->DataType) + { + case DATATYPE_ADCRAW: + temp = (uint32_t)(20*pFilterInfo->DataCount*pFilterInfo->RatioSys2AdcClk); + break; + case DATATYPE_SINC3: + temp = (uint32_t)(((pFilterInfo->DataCount+2)*sinc3osr_table[pFilterInfo->ADCSinc3Osr]+1)*20*pFilterInfo->RatioSys2AdcClk + 0.5f); + break; + case DATATYPE_SINC2: + temp = (pFilterInfo->DataCount+1)*sinc2osr_table[pFilterInfo->ADCSinc2Osr] + 1; + pFilterInfo->DataType = DATATYPE_SINC3; + pFilterInfo->DataCount = temp; + AD5940_ClksCalculate(pFilterInfo, &temp); + pFilterInfo->DataType = DATATYPE_SINC2; + temp += 15; /* Need extra 15 clocks for FIFO etc. Just to be safe. */ + break; + case DATATYPE_NOTCH: + { + ADCFilterCfg_Type filter; + filter.ADCRate = pFilterInfo->ADCRate; + filter.ADCSinc3Osr = pFilterInfo->ADCSinc3Osr; + filter.ADCSinc2Osr = pFilterInfo->ADCSinc2Osr; + uint8_t dl=0, dl_50, dl_60; + if(AD5940_Notch50HzAvailable(&filter, &dl_50)){ + dl += dl_50 - 1; + } + if(AD5940_Notch60HzAvailable(&filter, &dl_60)){ + dl += dl_60 - 1; + } + pFilterInfo->DataType = DATATYPE_SINC2; + pFilterInfo->DataCount += dl; //DL is the extra data input needed for filter to output first data. + AD5940_ClksCalculate(pFilterInfo,&temp); + //restore the filter info. + pFilterInfo->DataType = DATATYPE_NOTCH; + pFilterInfo->DataCount -= dl; + break; + } + case DATATYPE_DFT: + switch(pFilterInfo->DftSrc) + { + case DFTSRC_ADCRAW: + pFilterInfo->DataType = DATATYPE_ADCRAW; + AD5940_ClksCalculate(pFilterInfo, &temp); + break; + case DFTSRC_SINC3: + pFilterInfo->DataType = DATATYPE_SINC3; + AD5940_ClksCalculate(pFilterInfo, &temp); + break; + case DFTSRC_SINC2NOTCH: + if(pFilterInfo->BpNotch) + pFilterInfo->DataType = DATATYPE_SINC2; + else + pFilterInfo->DataType = DATATYPE_NOTCH; + AD5940_ClksCalculate(pFilterInfo, &temp); + break; + case DFTSRC_AVG: + pFilterInfo->DataType = DATATYPE_SINC3; + pFilterInfo->DataCount *= 1L<<(pFilterInfo->ADCAvgNum+1); /* 0: average2, 1: average4, 2: average8, 3: average16 */ + AD5940_ClksCalculate(pFilterInfo, &temp); + break; + default: + break; + } + pFilterInfo->DataType = DATATYPE_DFT; + temp += 25; /* add margin */ + break; + default: + break; + } + *pClocks = temp; +} + +/** + @brief void AD5940_SweepNext(SoftSweepCfg_Type *pSweepCfg, float *pNextFreq) + For sweep function, calculate next frequency point according to pSweepCfg info. + @return Return next frequency point in Hz. +*/ +void AD5940_SweepNext(SoftSweepCfg_Type *pSweepCfg, float *pNextFreq) +{ + float frequency; + + if(pSweepCfg->SweepLog)/* Log step */ + { + if(pSweepCfg->SweepStartSweepStop) /* Normal */ + { + if(++pSweepCfg->SweepIndex == pSweepCfg->SweepPoints) + pSweepCfg->SweepIndex = 0; + frequency = pSweepCfg->SweepStart*pow(10,pSweepCfg->SweepIndex*log10(pSweepCfg->SweepStop/pSweepCfg->SweepStart)/(pSweepCfg->SweepPoints-1)); + } + else + { + pSweepCfg->SweepIndex --; + if(pSweepCfg->SweepIndex >= pSweepCfg->SweepPoints) + pSweepCfg->SweepIndex = pSweepCfg->SweepPoints-1; + frequency = pSweepCfg->SweepStop*pow(10,pSweepCfg->SweepIndex* + (log10(pSweepCfg->SweepStart/pSweepCfg->SweepStop)/(pSweepCfg->SweepPoints-1))); + } + } + else/* Linear step */ + { + if(pSweepCfg->SweepStartSweepStop) /* Normal */ + { + if(++pSweepCfg->SweepIndex == pSweepCfg->SweepPoints) + pSweepCfg->SweepIndex = 0; + frequency = pSweepCfg->SweepStart + pSweepCfg->SweepIndex*(double)(pSweepCfg->SweepStop-pSweepCfg->SweepStart)/(pSweepCfg->SweepPoints-1); + } + else + { + pSweepCfg->SweepIndex --; + if(pSweepCfg->SweepIndex >= pSweepCfg->SweepPoints) + pSweepCfg->SweepIndex = pSweepCfg->SweepPoints-1; + frequency = pSweepCfg->SweepStop + pSweepCfg->SweepIndex*(double)(pSweepCfg->SweepStart - pSweepCfg->SweepStop)/(pSweepCfg->SweepPoints-1); + } + } + + *pNextFreq = frequency; +} + +/** + @brief Initialize Structure members to zero + @param pStruct: Pointer to the structure. + @param StructSize: The structure size in Byte. + @return Return None. +**/ +void AD5940_StructInit(void *pStruct, uint32_t StructSize) +{ + memset(pStruct, 0, StructSize); +} + +/** + @brief Convert ADC Code to voltage. + @param ADCPga: The ADC PGA used for this result. + @param code: ADC code. + @param VRef1p82: the actual 1.82V reference voltage. + @return Voltage in volt. +**/ +float AD5940_ADCCode2Volt(uint32_t code, uint32_t ADCPga, float VRef1p82) +{ + float kFactor = 1.835/1.82; + float fVolt = 0.0; + float tmp = 0; + tmp = (int32_t)code - 32768; + switch(ADCPga) + { + case ADCPGA_1: + break; + case ADCPGA_1P5: + tmp /= 1.5f; + break; + case ADCPGA_2: + tmp /= 2.0f; + break; + case ADCPGA_4: + tmp /= 4.0f; + break; + case ADCPGA_9: + tmp /= 9.0f; + break; + default:break; + } + fVolt = tmp*VRef1p82/32768*kFactor; + return fVolt; +} + +/** + * @brief Do complex number division. + * @param a: The dividend. + * @param b: The divisor. + * @return Return result. +**/ +fImpCar_Type AD5940_ComplexDivFloat(fImpCar_Type *a, fImpCar_Type *b) +{ + fImpCar_Type res; + float temp; + temp = b->Real*b->Real + b->Image*b->Image; + res.Real = a->Real*b->Real + a->Image*b->Image; + res.Real /= temp; + res.Image = a->Image*b->Real - a->Real*b->Image; + res.Image /= temp; + return res; +} + +/** + * @brief Do complex number multiplication. + * @param a: The multiplicand. + * @param b: The multiplier . + * @return Return result. +**/ +fImpCar_Type AD5940_ComplexMulFloat(fImpCar_Type *a, fImpCar_Type *b) +{ + fImpCar_Type res; + + res.Real = a->Real*b->Real - a->Image*b->Image; + res.Image = a->Image*b->Real + a->Real*b->Image; + + return res; +} +/** + * @brief Do complex number addition. + * @param a: The addend. + * @param b: The addend . + * @return Return result. +**/ +fImpCar_Type AD5940_ComplexAddFloat(fImpCar_Type *a, fImpCar_Type *b) +{ + fImpCar_Type res; + + res.Real = a->Real + b->Real; + res.Image = a->Image + b->Image; + + return res; +} + +/** + * @brief Do complex number subtraction. + * @param a: The minuend. + * @param b: The subtrahend . + * @return Return result. +**/ +fImpCar_Type AD5940_ComplexSubFloat(fImpCar_Type *a, fImpCar_Type *b) +{ + fImpCar_Type res; + + res.Real = a->Real - b->Real; + res.Image = a->Image - b->Image; + + return res; +} + +/** + * @brief Do complex number division. + * @param a: The dividend. + * @param b: The divisor. + * @return Return result. +**/ +fImpCar_Type AD5940_ComplexDivInt(iImpCar_Type *a, iImpCar_Type *b) +{ + fImpCar_Type res; + float temp; + temp = (float)b->Real*b->Real + (float)b->Image*b->Image; + res.Real = (float)a->Real*b->Real + (float)a->Image*b->Image; + res.Real /= temp; + res.Image = (float)a->Image*b->Real - (float)a->Real*b->Image; + res.Image /= temp; + return res; +} + +/** + * @brief Do complex number multiplication. + * @param a: The multiplicand. + * @param b: The multiplier . + * @return Return result. +**/ +fImpCar_Type AD5940_ComplexMulInt(iImpCar_Type *a, iImpCar_Type *b) +{ + fImpCar_Type res; + + res.Real = (float)a->Real*b->Real - (float)a->Image*b->Image; + res.Image = (float)a->Image*b->Real + (float)a->Real*b->Image; + + return res; +} + +/** + * @brief Calculate the complex number magnitude. + * @param a: The complex number. + * @return Return magnitude. +**/ +float AD5940_ComplexMag(fImpCar_Type *a) +{ + return sqrt(a->Real*a->Real + a->Image*a->Image); +} + +/** + * @brief Calculate the complex number phase. + * @param a: The complex number. + * @return Return phase. +**/ +float AD5940_ComplexPhase(fImpCar_Type *a) +{ + return atan2(a->Image, a->Real); +} + +/** + * @brief Calculate the optimum filter settings based on signal frequency. + * @param freq: Frequency of signalr. + * @return Return FreqParams. +**/ +FreqParams_Type AD5940_GetFreqParameters(float freq) +{ + const uint32_t dft_table[] = {4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384}; + const uint32_t sinc2osr_table[] = {1, 22,44,89,178,267,533,640,667,800,889,1067,1333}; + const uint32_t sinc3osr_table[] = {2, 4, 5}; + float AdcRate = 800000; + uint32_t n1 = 0; // Sample rate after ADC filters + uint32_t n2 = 0; // Sample rate after DFT block + uint32_t iCycle = 0; + FreqParams_Type freq_params; + /* High power mode */ + if(freq >= 20000) + { + freq_params. DftSrc = DFTSRC_SINC3; + freq_params.ADCSinc2Osr = 0; + freq_params.ADCSinc3Osr = 2; + freq_params.DftNum = DFTNUM_8192; + freq_params.NumClks = 0; + freq_params.HighPwrMode = bTRUE; + return freq_params; + } + + if(freq < 0.51) + { + freq_params. DftSrc = DFTSRC_SINC2NOTCH; + freq_params.ADCSinc2Osr = 6; + freq_params.ADCSinc3Osr = 1; + freq_params.DftNum = DFTNUM_8192; + freq_params.NumClks = 0; + freq_params.HighPwrMode = bTRUE; + return freq_params; + } + + /* Start with SINC2 setting */ + for(uint8_t i = 0; i=0x1000)&&(RegAddr<=0x3014))) /* 32bit register */ + *(volatile uint32_t *)(RegAddr+0x400c0000) = RegData; + else /* 16bit register */ + *(volatile uint16_t *)(RegAddr+0x400c0000) = RegData; +} + +static uint32_t AD5940_D2DReadReg(uint16_t RegAddr) +{ + if(((RegAddr>=0x1000)&&(RegAddr<=0x3014))) /* 32bit register */ + return *(volatile uint32_t *)(RegAddr+0x400c0000); + else /* 16bit register */ + return *(volatile uint16_t *)(RegAddr+0x400c0000); +} + +void AD5940_FIFORd(uint32_t *pBuffer, uint32_t uiReadCount) +{ + while(uiReadCount--) + *pBuffer++ = *(volatile uint32_t *)(0x400c206C); +} +#else +/** + * @defgroup SPI_Block + * @brief Functions to communicate with AD5940 registers following AD5940 SPI protocols + * @{ + * + * @defgroup SPI_Block_Functions + * @brief The basic SPI protocols. All functions are basic on AD5940_ReadWriteNBytes which + * provided by user. + * + * ##SPI basic protocol + * All SPI protocol starts with one-byte command word. Following are data(16B or 32B) + * There are four SPI commands available @ref SPI_Block_Const. + * @{ +*/ + +/** + @brief Using SPI to transmit one byte and return the received byte. + @param data: The 8-bit data SPI will transmit. + @return received data. +**/ +static unsigned char AD5940_ReadWrite8B(unsigned char data) +{ + uint8_t tx[1], rx[1]; + tx[0] = data; + AD5940_ReadWriteNBytes(tx,rx,1); + return rx[0]; +} + +/** + @brief Using SPI to transmit two bytes and return the received bytes. + @param data: The 16-bit data SPI will transmit. + @return received data. +**/ +static uint16_t AD5940_ReadWrite16B(uint16_t data) +{ + uint8_t SendBuffer[2]; + uint8_t RecvBuffer[2]; + SendBuffer[0] = data>>8; + SendBuffer[1] = data&0xff; + AD5940_ReadWriteNBytes(SendBuffer,RecvBuffer,2); + return (((uint16_t)RecvBuffer[0])<<8)|RecvBuffer[1]; +} + +/** + * @brief Using SPI to transmit four bytes and return the received bytes. + * @param data: The 32-bit data SPI will transmit. + * @return received data. +**/ +static uint32_t AD5940_ReadWrite32B(uint32_t data) +{ + uint8_t SendBuffer[4]; + uint8_t RecvBuffer[4]; + + SendBuffer[0] = (data>>24)&0xff; + SendBuffer[1] = (data>>16)&0xff; + SendBuffer[2] = (data>> 8)&0xff; + SendBuffer[3] = (data )&0xff; + AD5940_ReadWriteNBytes(SendBuffer,RecvBuffer,4); + return (((uint32_t)RecvBuffer[0])<<24)|(((uint32_t)RecvBuffer[1])<<16)|(((uint32_t)RecvBuffer[2])<<8)|RecvBuffer[3]; +} + +/** + * @brief Write register through SPI. + * @param RegAddr: The register address. + * @param RegData: The register data. + * @return Return None. +**/ +static void AD5940_SPIWriteReg(uint16_t RegAddr, uint32_t RegData) +{ + /* Set register address */ + AD5940_CsClr(); + AD5940_ReadWrite8B(SPICMD_SETADDR); + AD5940_ReadWrite16B(RegAddr); + AD5940_CsSet(); + /* Add delay here to meet the SPI timing. */ + AD5940_CsClr(); + AD5940_ReadWrite8B(SPICMD_WRITEREG); + if(((RegAddr>=0x1000)&&(RegAddr<=0x3014))) + AD5940_ReadWrite32B(RegData); + else + AD5940_ReadWrite16B(RegData); + AD5940_CsSet(); +} + +/** + * @brief Read register through SPI. + * @param RegAddr: The register address. + * @return Return register data. +**/ +static uint32_t AD5940_SPIReadReg(uint16_t RegAddr) +{ + uint32_t Data = 0; + /* Set register address that we want to read */ + AD5940_CsClr(); + AD5940_ReadWrite8B(SPICMD_SETADDR); + AD5940_ReadWrite16B(RegAddr); + AD5940_CsSet(); + /* Read it */ + AD5940_CsClr(); + AD5940_ReadWrite8B(SPICMD_READREG); + AD5940_ReadWrite8B(0); //Dummy read + /* The real data is coming */ + if((RegAddr>=0x1000)&&(RegAddr<=0x3014)) + Data = AD5940_ReadWrite32B(0); + else + Data = AD5940_ReadWrite16B(0); + AD5940_CsSet(); + return Data; +} + +/** + @brief Read specific number of data from FIFO with optimized SPI access. + @param pBuffer: Pointer to a buffer that used to store data read back. + @param uiReadCount: How much data to be read. + @return none. +**/ +void AD5940_FIFORd(uint32_t *pBuffer, uint32_t uiReadCount) +{ + /* Use function AD5940_SPIReadReg to read REG_AFE_DATAFIFORD is also one method. */ + uint32_t i; + + if(uiReadCount < 3) + { + /* This method is more efficient when readcount < 3 */ + uint32_t i; + AD5940_CsClr(); + AD5940_ReadWrite8B(SPICMD_SETADDR); + AD5940_ReadWrite16B(REG_AFE_DATAFIFORD); + AD5940_CsSet(); + for(i=0;iHpBandgapEn == bFALSE) + tempreg |= BITM_AFE_AFECON_HPREFDIS; + AD5940_WriteReg(REG_AFE_AFECON, tempreg); + /* Reference buffer configure */ + tempreg = AD5940_ReadReg(REG_AFE_BUFSENCON); + if(pBufCfg->Hp1V8BuffEn == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P8HPADCEN; + if(pBufCfg->Hp1V1BuffEn == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P1HPADCEN; + if(pBufCfg->Lp1V8BuffEn == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P8LPADCEN; + if(pBufCfg->Lp1V1BuffEn == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P1LPADCEN; + if(pBufCfg->Hp1V8ThemBuff == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P8THERMSTEN; + if(pBufCfg->Hp1V8Ilimit == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P8HPADCILIMITEN; + if(pBufCfg->Disc1V8Cap == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P8HPADCCHGDIS; + if(pBufCfg->Disc1V1Cap == bTRUE) + tempreg |= BITM_AFE_BUFSENCON_V1P1LPADCCHGDIS; + AD5940_WriteReg(REG_AFE_BUFSENCON, tempreg); + + /* LPREFBUFCON */ + tempreg = 0; + if(pBufCfg->LpRefBufEn == bFALSE) + tempreg |= BITM_AFE_LPREFBUFCON_LPBUF2P5DIS; + if(pBufCfg->LpBandgapEn == bFALSE) + tempreg |= BITM_AFE_LPREFBUFCON_LPREFDIS; + if(pBufCfg->LpRefBoostEn == bTRUE) + tempreg |= BITM_AFE_LPREFBUFCON_BOOSTCURRENT; + AD5940_WriteReg(REG_AFE_LPREFBUFCON, tempreg); +} +/** + * @} End of AFE_Control_Functions + * @} End of AFE_Control + * */ + +/** + * @defgroup High_Speed_Loop + * @brief The high speed loop + * @{ + * @defgroup High_Speed_Loop_Functions + * @{ +*/ + +/** + @brief Configure High speed loop(high bandwidth loop or + called excitation loop). This configuration includes HSDAC, HSTIA and Switch matrix. + @param pHsLoopCfg : Pointer to configure structure; + @return return none. +*/ +void AD5940_HSLoopCfgS(HSLoopCfg_Type *pHsLoopCfg) +{ + AD5940_HSDacCfgS(&pHsLoopCfg->HsDacCfg); + AD5940_HSTIACfgS(&pHsLoopCfg->HsTiaCfg); + AD5940_SWMatrixCfgS(&pHsLoopCfg->SWMatCfg); + AD5940_WGCfgS(&pHsLoopCfg->WgCfg); +} + +/** + @brief Initialize switch matrix + @param pSwMatrix: Pointer to configuration structure + @return return none. +*/ +void AD5940_SWMatrixCfgS(SWMatrixCfg_Type *pSwMatrix) +{ + AD5940_WriteReg(REG_AFE_DSWFULLCON, pSwMatrix->Dswitch); + AD5940_WriteReg(REG_AFE_PSWFULLCON, pSwMatrix->Pswitch); + AD5940_WriteReg(REG_AFE_NSWFULLCON, pSwMatrix->Nswitch); + AD5940_WriteReg(REG_AFE_TSWFULLCON, pSwMatrix->Tswitch); + AD5940_WriteReg(REG_AFE_SWCON, BITM_AFE_SWCON_SWSOURCESEL); /* Update switch configuration */ +} + +/** + @brief Initialize HSDAC + @param pHsDacCfg: Pointer to configuration structure + @return return none. +*/ +void AD5940_HSDacCfgS(HSDACCfg_Type *pHsDacCfg) +{ + uint32_t tempreg; + //Check parameters + tempreg = 0; + if(pHsDacCfg->ExcitBufGain == EXCITBUFGAIN_0P25) + tempreg |= BITM_AFE_HSDACCON_INAMPGNMDE; /* Enable attenuator */ + if(pHsDacCfg->HsDacGain == HSDACGAIN_0P2) + tempreg |= BITM_AFE_HSDACCON_ATTENEN; /* Enable attenuator */ + tempreg |= (pHsDacCfg->HsDacUpdateRate&0xff)<= HSTIADERTIA_OPEN) + tempreg = 0x1f << 3; /* bit field HPTIRES03CON[7:3] */ + else if(DeRtia >= HSTIADERTIA_1K) + { + tempreg = (DeRtia - 3 + 11) << 3; + } + else /* DERTIA 50/100/200Ohm */ + { + const uint8_t DeRtiaTable[3][5] = + { +//Rload 0 10 30 50 100 + {0x00, 0x01, 0x02, 0x03, 0x06}, /* RTIA 50Ohm */ + {0x03, 0x04, 0x05, 0x06, 0x07}, /* RTIA 100Ohm */ + {0x07, 0x07, 0x09, 0x09, 0x0a}, /* RTIA 200Ohm */ + }; + if(DeRload < HSTIADERLOAD_OPEN) + tempreg = (uint32_t)(DeRtiaTable[DeRtia][DeRload])<<3; + else + tempreg = (0x1f)<<3; /* Set it to HSTIADERTIA_OPEN. This setting is illegal */ + } + /* deal with HSTIA Rload */ + tempreg |= DeRload; + if(DExPin) //DE1 + AD5940_WriteReg(REG_AFE_DE1RESCON, tempreg); + else //DE0 + AD5940_WriteReg(REG_AFE_DE0RESCON, tempreg); +} + +/** + @brief Initialize High speed TIA amplifier + @param pHsTiaCfg: Pointer to configuration structure + @return return none. +*/ +AD5940Err AD5940_HSTIACfgS(HSTIACfg_Type *pHsTiaCfg) +{ + uint32_t tempreg; + //Check parameters + if(pHsTiaCfg == NULL) return AD5940ERR_NULLP; + /* Available parameter is 1k, 5k,...,160k, short, OPEN */ + if(pHsTiaCfg->HstiaDeRtia < HSTIADERTIA_1K) + return AD5940ERR_PARA; + if(pHsTiaCfg->HstiaDeRtia > HSTIADERTIA_OPEN) + return AD5940ERR_PARA; /* Parameter is invalid */ + + if(pHsTiaCfg->HstiaDeRload > HSTIADERLOAD_OPEN) + return AD5940ERR_PARA; /* Available parameter is OPEN, 0R,..., 100R */ + + tempreg = 0; + tempreg |= pHsTiaCfg->HstiaBias; + AD5940_WriteReg(REG_AFE_HSTIACON, tempreg); + /* HSRTIACON */ + /* Calculate CTIA value */ + tempreg = pHsTiaCfg->HstiaCtia << BITP_AFE_HSRTIACON_CTIACON; + tempreg |= pHsTiaCfg->HstiaRtiaSel; + if(pHsTiaCfg->DiodeClose == bTRUE) + tempreg |= BITM_AFE_HSRTIACON_TIASW6CON; /* Close switch 6 */ + AD5940_WriteReg(REG_AFE_HSRTIACON, tempreg); + /* DExRESCON */ + __AD5940_SetDExRTIA(0, pHsTiaCfg->HstiaDeRtia, pHsTiaCfg->HstiaDeRload); +#ifdef CHIPSEL_M355 + __AD5940_SetDExRTIA(1, pHsTiaCfg->HstiaDe1Rtia, pHsTiaCfg->HstiaDe1Rload); +#endif + + /* Done */ + return AD5940ERR_OK; +} +/** + * @brief Configure HSTIA RTIA resistor and keep other parameters unchanged. + * @param HSTIARtia: The RTIA setting, select it from @ref HSTIARTIA_Const + * @return return none. +*/ +void AD5940_HSRTIACfgS(uint32_t HSTIARtia) +{ + uint32_t tempreg; + tempreg = AD5940_ReadReg(REG_AFE_HSRTIACON); + tempreg &= ~BITM_AFE_HSRTIACON_RTIACON; + HSTIARtia &= BITM_AFE_HSRTIACON_RTIACON; + tempreg |= HSTIARtia<WgType == WGTYPE_SIN) + { + /* Configure Sine wave Generator */ + AD5940_WriteReg(REG_AFE_WGFCW, pWGInit->SinCfg.SinFreqWord); + AD5940_WriteReg(REG_AFE_WGAMPLITUDE, pWGInit->SinCfg.SinAmplitudeWord); + AD5940_WriteReg(REG_AFE_WGOFFSET, pWGInit->SinCfg.SinOffsetWord); + AD5940_WriteReg(REG_AFE_WGPHASE, pWGInit->SinCfg.SinPhaseWord); + } + else if(pWGInit->WgType == WGTYPE_TRAPZ) + { + /* Configure Trapezoid Generator */ + AD5940_WriteReg(REG_AFE_WGDCLEVEL1, pWGInit->TrapzCfg.WGTrapzDCLevel1); + AD5940_WriteReg(REG_AFE_WGDCLEVEL2, pWGInit->TrapzCfg.WGTrapzDCLevel2); + AD5940_WriteReg(REG_AFE_WGDELAY1, pWGInit->TrapzCfg.WGTrapzDelay1); + AD5940_WriteReg(REG_AFE_WGDELAY2, pWGInit->TrapzCfg.WGTrapzDelay2); + AD5940_WriteReg(REG_AFE_WGSLOPE1, pWGInit->TrapzCfg.WGTrapzSlope1); + AD5940_WriteReg(REG_AFE_WGSLOPE2, pWGInit->TrapzCfg.WGTrapzSlope2); + } + else + { + /* Write DAC data. It's only have effect when WgType set to WGTYPE_MMR */ + AD5940_WriteReg(REG_AFE_HSDACDAT, pWGInit->WgCode); + } + tempreg = 0; + + if(pWGInit->GainCalEn == bTRUE) + tempreg |= BITM_AFE_WGCON_DACGAINCAL; + if(pWGInit->OffsetCalEn == bTRUE) + tempreg |= BITM_AFE_WGCON_DACOFFSETCAL; + tempreg |= (pWGInit->WgType) << BITP_AFE_WGCON_TYPESEL; + AD5940_WriteReg(REG_AFE_WGCON, tempreg); +} + +/** + * @brief Write HSDAC code directly when WG configured to MMR type + * @param code: The 12-bit HSDAC code. + * @return return none. +*/ +AD5940Err AD5940_WGDACCodeS(uint32_t code) +{ + code &= 0xfff; + AD5940_WriteReg(REG_AFE_HSDACDAT, code); + return AD5940ERR_OK; +} + +/** + * @brief Update WG SIN wave frequency in Hz. + * @param SinFreqHz: The desired frequency in Hz. + * @param WGClock: The clock for WG. It's same as system clock and the default value is internal 16MHz HSOSC. + * @return return none. +*/ +void AD5940_WGFreqCtrlS(float SinFreqHz, float WGClock) +{ + uint32_t freq_word; + freq_word = AD5940_WGFreqWordCal(SinFreqHz, WGClock); + AD5940_WriteReg(REG_AFE_WGFCW, freq_word); +} + +/** + @brief Calculate sine wave generator frequency word. The maxim frequency is 250kHz-1LSB + @param SinFreqHz : Target frequency in Hz unit. + @param WGClock: Waveform generator clock frequency in Hz unit. The clock is sourced from system clock, default value is 16MHz HFOSC. + @return return none. +*/ +uint32_t AD5940_WGFreqWordCal(float SinFreqHz, float WGClock) +{ + uint32_t temp; + uint32_t __BITWIDTH_WGFCW = 26; + if(bIsS2silicon == bTRUE) + __BITWIDTH_WGFCW = 30; + if(WGClock == 0) return 0; + temp = (uint32_t)(SinFreqHz*(1LL<<__BITWIDTH_WGFCW)/WGClock + 0.5f); + if(temp > ((__BITWIDTH_WGFCW == 26)?0xfffff:0xffffff)) + temp = (__BITWIDTH_WGFCW == 26)?0xfffff:0xffffff; + + return temp; +} + +/** + * @} Waveform_Generator_Functions + * @} High_Speed_Loop_Functions + * @} High_Speed_Loop +*/ + + +/** + * @defgroup Low_Power_Loop + * @brief The low power loop. + * @{ + * @defgroup Low_Power_Loop_Functions + * @{ +*/ + +/** + @brief Configure low power loop include LPDAC LPAmp(PA and TIA) + @param pLpLoopCfg: Pointer to configure structure; + @return return none. +*/ +void AD5940_LPLoopCfgS(LPLoopCfg_Type *pLpLoopCfg) +{ + AD5940_LPDACCfgS(&pLpLoopCfg->LpDacCfg); + AD5940_LPAMPCfgS(&pLpLoopCfg->LpAmpCfg); +} + +/** + @brief Initialize LPDAC + @param pLpDacCfg: Pointer to configuration structure + @return return none. +*/ +void AD5940_LPDACCfgS(LPDACCfg_Type *pLpDacCfg) +{ + uint32_t tempreg; + tempreg = 0; + tempreg = (pLpDacCfg->LpDacSrc)<LpDacVzeroMux)<LpDacVbiasMux)<LpDacRef)<DataRst == bFALSE) + tempreg |= BITM_AFE_LPDACCON0_RSTEN; + if(pLpDacCfg->PowerEn == bFALSE) + tempreg |= BITM_AFE_LPDACCON0_PWDEN; + if(pLpDacCfg->LpdacSel == LPDAC0) + { + AD5940_WriteReg(REG_AFE_LPDACCON0, tempreg); + AD5940_LPDAC0WriteS(pLpDacCfg->DacData12Bit, pLpDacCfg->DacData6Bit); + AD5940_WriteReg(REG_AFE_LPDACSW0, pLpDacCfg->LpDacSW|BITM_AFE_LPDACSW0_LPMODEDIS); /* Overwrite LPDACSW settings. On Si1, this register is not accessible. */ + } + else + { + AD5940_WriteReg(REG_AFE_LPDACCON1, tempreg); + AD5940_LPDAC1WriteS(pLpDacCfg->DacData12Bit, pLpDacCfg->DacData6Bit); + AD5940_WriteReg(REG_AFE_LPDACSW1, pLpDacCfg->LpDacSW|BITM_AFE_LPDACSW0_LPMODEDIS); /* Overwrite LPDACSW settings. On Si1, this register is not accessible. */ + } +} + +/** + @brief Write LPDAC data + @param Data12Bit: 12Bit DAC data + @param Data6Bit: 6Bit DAC data + @return return none. +*/ +void AD5940_LPDACWriteS(uint16_t Data12Bit, uint8_t Data6Bit) +{ + /* Check parameter */ + Data6Bit &= 0x3f; + Data12Bit &= 0xfff; + AD5940_WriteReg(REG_AFE_LPDACDAT0, ((uint32_t)Data6Bit<<12)|Data12Bit); +} + +/** + @brief Write LPDAC0 data + @param Data12Bit: 12Bit DAC data + @param Data6Bit: 6Bit DAC data + @return return none. +*/ +void AD5940_LPDAC0WriteS(uint16_t Data12Bit, uint8_t Data6Bit) +{ + /* Check parameter */ + Data6Bit &= 0x3f; + Data12Bit &= 0xfff; + AD5940_WriteReg(REG_AFE_LPDACDAT0, ((uint32_t)Data6Bit<<12)|Data12Bit); +} + +/** + @brief Write LPDAC1 data + @param Data12Bit: 12Bit DAC data + @param Data6Bit: 6Bit DAC data + @return return none. +*/ +void AD5940_LPDAC1WriteS(uint16_t Data12Bit, uint8_t Data6Bit) +{ + /* Check parameter */ + Data6Bit &= 0x3f; + Data12Bit &= 0xfff; + AD5940_WriteReg(REG_AFE_LPDACDAT1, ((uint32_t)Data6Bit<<12)|Data12Bit); +} + +/** + @brief Initialize LP TIA and PA + @param pLpAmpCfg: Pointer to configuration structure + @return return none. +*/ +void AD5940_LPAMPCfgS(LPAmpCfg_Type *pLpAmpCfg) +{ + //check parameters + uint32_t tempreg; + + tempreg = 0; + if(pLpAmpCfg->LpPaPwrEn == bFALSE) + tempreg |= BITM_AFE_LPTIACON0_PAPDEN; + if(pLpAmpCfg->LpTiaPwrEn == bFALSE) + tempreg |= BITM_AFE_LPTIACON0_TIAPDEN; + if(pLpAmpCfg->LpAmpPwrMod == LPAMPPWR_HALF) + tempreg |= BITM_AFE_LPTIACON0_HALFPWR; + else + { + tempreg |= pLpAmpCfg->LpAmpPwrMod<LpTiaRtia<LpTiaRload<LpTiaRf<LpAmpSel == LPAMP0) + { + AD5940_WriteReg(REG_AFE_LPTIACON0, tempreg); + AD5940_WriteReg(REG_AFE_LPTIASW0, pLpAmpCfg->LpTiaSW); + } + else + { + AD5940_WriteReg(REG_AFE_LPTIACON1, tempreg); + AD5940_WriteReg(REG_AFE_LPTIASW1, pLpAmpCfg->LpTiaSW); + } +} +/** + * @} Low_Power_Loop_Functions + * @} Low_Power_Loop +*/ + + +/** + * @defgroup DSP_Block + * @brief DSP block includes ADC, filters, DFT and statistic functions. + * @{ + * @defgroup DSP_Block_Functions + * @{ + * */ + +/** + @brief Configure low power loop include LPDAC LPAmp(PA and TIA) + @param pDSPCfg: Pointer to configure structure; + @return return none. +*/ +void AD5940_DSPCfgS(DSPCfg_Type *pDSPCfg) +{ + AD5940_ADCBaseCfgS(&pDSPCfg->ADCBaseCfg); + AD5940_ADCFilterCfgS(&pDSPCfg->ADCFilterCfg); + AD5940_ADCDigCompCfgS(&pDSPCfg->ADCDigCompCfg); + AD5940_DFTCfgS(&pDSPCfg->DftCfg); + AD5940_StatisticCfgS(&pDSPCfg->StatCfg); +} + +/** + @brief Read AD5940 generated data like ADC and DFT etc. + @param AfeResultSel: available parameters are @ref AFERESULT_Const + - AFERESULT_SINC3: Read SINC3 filter data result + - AFERESULT_SINC2: Read SINC2+NOTCH filter result, when Notch filter is bypassed, the result is SINC2 + - AFERESULT_STATSVAR: Statistic variance result + @return return data read back. +*/ +uint32_t AD5940_ReadAfeResult(uint32_t AfeResultSel) +{ + uint32_t rd = 0; + //PARA_CHECK((AfeResultSel)); + switch (AfeResultSel) + { + case AFERESULT_SINC3: + rd = AD5940_ReadReg(REG_AFE_ADCDAT); + break; + case AFERESULT_SINC2: + rd = AD5940_ReadReg(REG_AFE_SINC2DAT); + break; + case AFERESULT_TEMPSENSOR: + rd = AD5940_ReadReg(REG_AFE_TEMPSENSDAT); + break; + case AFERESULT_DFTREAL: + rd = AD5940_ReadReg(REG_AFE_DFTREAL); + break; + case AFERESULT_DFTIMAGE: + rd = AD5940_ReadReg(REG_AFE_DFTIMAG); + break; + case AFERESULT_STATSMEAN: + rd = AD5940_ReadReg(REG_AFE_STATSMEAN); + break; + case AFERESULT_STATSVAR: + rd = AD5940_ReadReg(REG_AFE_STATSVAR); + break; + } + + return rd; +} + +/** + * @defgroup ADC_Block_Functions + * @{ +*/ + +/** + @brief Initializes ADC peripheral according to the specified parameters in the pADCInit. + @param pADCInit: Pointer to ADC initialize structure. + @return return none. +*/ +void AD5940_ADCBaseCfgS(ADCBaseCfg_Type *pADCInit) +{ + uint32_t tempreg = 0; + //PARA_CHECK(IS_ADCMUXP(pADCInit->ADCMuxP)); + //PARA_CHECK(IS_ADCMUXN(pADCInit->ADCMuxN)); + PARA_CHECK(IS_ADCPGA(pADCInit->ADCPga)); + PARA_CHECK(IS_ADCAAF(pADCInit->ADCAAF)); + + tempreg = pADCInit->ADCMuxP; + tempreg |= (uint32_t)(pADCInit->ADCMuxN)<OffCancEnable == bTRUE) + // tempreg |= BITM_AFE_ADCCON_GNOFSELPGA; + tempreg |= (uint32_t)(pADCInit->ADCPga)<ADCSinc3Osr)); + PARA_CHECK(IS_ADCSINC2OSR(pFiltCfg->ADCSinc2Osr)); + PARA_CHECK(IS_ADCAVGNUM(pFiltCfg->ADCAvgNum)); + PARA_CHECK(IS_ADCRATE(pFiltCfg->ADCRate)); + + tempreg = AD5940_ReadReg(REG_AFE_ADCFILTERCON); + tempreg &= BITM_AFE_ADCFILTERCON_AVRGEN; /* Keep this bit setting. */ + + tempreg |= pFiltCfg->ADCRate; + if(pFiltCfg->BpNotch == bTRUE) + tempreg |= BITM_AFE_ADCFILTERCON_LPFBYPEN; + if(pFiltCfg->BpSinc3 == bTRUE) + tempreg |= BITM_AFE_ADCFILTERCON_SINC3BYP; + /** + * Average filter is enabled when DFT source is @ref DFTSRC_AVG in function @ref AD5940_DFTCfgS. + * Once average function is enabled, it's automatically set as DFT source, register DFTCON.DFTINSEL is ignored. + */ + //if(pFiltCfg->AverageEnable == bTRUE) + // tempreg |= BITM_AFE_ADCFILTERCON_AVRGEN; + tempreg |= (uint32_t)(pFiltCfg->ADCSinc2Osr)<ADCSinc3Osr)<ADCAvgNum)<Sinc2NotchEnable) + { + AD5940_AFECtrlS(AFECTRL_SINC2NOTCH,bTRUE); + } +} + +/** + @brief Power up or power down ADC block(including ADC PGA and FRONTBUF). + @param State : {bTRUE, bFALSE} + - bTRUE: Power up ADC + - bFALSE: Power down ADC + @return return none. +*/ +void AD5940_ADCPowerCtrlS(BoolFlag State) +{ + uint32_t tempreg; + tempreg = AD5940_ReadReg(REG_AFE_AFECON); + if(State == bTRUE) + { + tempreg |= BITM_AFE_AFECON_ADCEN; + } + else + { + tempreg &= ~BITM_AFE_AFECON_ADCEN; + } + AD5940_WriteReg(REG_AFE_AFECON,tempreg); +} + +/** + @brief Start or stop ADC convert. + @param State : {bTRUE, bFALSE} + - bTRUE: Start ADC convert + - bFALSE: Stop ADC convert + @return return none. +*/ +void AD5940_ADCConvtCtrlS(BoolFlag State) +{ + uint32_t tempreg; + tempreg = AD5940_ReadReg(REG_AFE_AFECON); + if(State == bTRUE) + { + tempreg |= BITM_AFE_AFECON_ADCCONVEN; + } + else + { + tempreg &= ~BITM_AFE_AFECON_ADCCONVEN; + } + AD5940_WriteReg(REG_AFE_AFECON,tempreg); +} + +/** + @brief Configure ADC input MUX + @param ADCMuxP : {ADCMUXP_FLOAT, ADCMUXP_HSTIA_P, ,,, ,ADCMUXP_P_NODE} + - ADCMUXP_FLOAT: float ADC MUX positive input + - ADCMUXP_HSTIA_P: High speed TIA output sense terminal + - ADCMUXP_P_NODE: Excitation loop P node + @param ADCMuxN : {ADCMUXP_FLOAT, ADCMUXP_HSTIA_P, ,,, ,ADCMUXP_P_NODE} + - ADCMUXP_FLOAT: float ADC MUX positive input + - ADCMUXP_HSTIA_P: High speed TIA output sense terminal + - ADCMUXP_P_NODE: Excitation loop P node + + @return return none. +*/ +void AD5940_ADCMuxCfgS(uint32_t ADCMuxP, uint32_t ADCMuxN) +{ + uint32_t tempreg; + //PARA_CHECK(IS_ADCMUXP(ADCMuxP)); + //PARA_CHECK(IS_ADCMUXN(ADCMuxN)); + + tempreg = AD5940_ReadReg(REG_AFE_ADCCON); + tempreg &= ~(BITM_AFE_ADCCON_MUXSELN|BITM_AFE_ADCCON_MUXSELP); + tempreg |= ADCMuxP<ADCMin); + AD5940_WriteReg(REG_AFE_ADCMINSM, pCompCfg->ADCMinHys); + AD5940_WriteReg(REG_AFE_ADCMAX, pCompCfg->ADCMax); + AD5940_WriteReg(REG_AFE_ADCMAXSMEN, pCompCfg->ADCMaxHys); +} +/** @} ADC_Block_Functions */ + +/** + @brief Configure statistic functions + @param pStatCfg: Pointer to configuration structure + @return return none. +*/ +void AD5940_StatisticCfgS(StatCfg_Type *pStatCfg) +{ + uint32_t tempreg; + //check parameters + tempreg = 0; + if(pStatCfg->StatEnable == bTRUE) + tempreg |= BITM_AFE_STATSCON_STATSEN; + tempreg |= (pStatCfg->StatSample) << BITP_AFE_STATSCON_SAMPLENUM; + tempreg |= (pStatCfg->StatDev) << BITP_AFE_STATSCON_STDDEV; + AD5940_WriteReg(REG_AFE_STATSCON, tempreg); +} + +/** + * @brief Set ADC Repeat convert function number. Turn off ADC automatically after Number samples of ADC raw data are ready + * @param Number: Specify after how much ADC raw data need to sample before shutdown ADC + * @return return none. +*/ +void AD5940_ADCRepeatCfgS(uint32_t Number) +{ + //check parameter if(number<255) + AD5940_WriteReg(REG_AFE_REPEATADCCNV, Number<DftSrc == DFTSRC_AVG) + { + reg_adcfilter |= BITM_AFE_ADCFILTERCON_AVRGEN; + AD5940_WriteReg(REG_AFE_ADCFILTERCON, reg_adcfilter); + } + else + { + /* Disable Average function and set correct DFT source */ + reg_adcfilter &= ~BITM_AFE_ADCFILTERCON_AVRGEN; + AD5940_WriteReg(REG_AFE_ADCFILTERCON, reg_adcfilter); + + /* Set new DFT source */ + reg_dftcon |= (pDftCfg->DftSrc) << BITP_AFE_DFTCON_DFTINSEL; + } + /* Set DFT number */ + reg_dftcon |= (pDftCfg->DftNum) << BITP_AFE_DFTCON_DFTNUM; + + if(pDftCfg->HanWinEn == bTRUE) + reg_dftcon |= BITM_AFE_DFTCON_HANNINGEN; + AD5940_WriteReg(REG_AFE_DFTCON, reg_dftcon); +} + +/** + * @} DSP_Block_Functions + * @} DSP_Block +*/ + +/** + * @defgroup Sequencer_FIFO + * @brief Sequencer and FIFO. + * @{ + * @defgroup Sequencer_FIFO_Functions + * @{ +*/ + +/** + @brief Configure AD5940 FIFO + @param pFifoCfg: Pointer to configuration structure. + @return return none. +*/ +void AD5940_FIFOCfg(FIFOCfg_Type *pFifoCfg) +{ + uint32_t tempreg; + //check parameters + AD5940_WriteReg(REG_AFE_FIFOCON, 0); /* Disable FIFO firstly! */ + /* CMDDATACON register. Configure this firstly */ + tempreg = AD5940_ReadReg(REG_AFE_CMDDATACON); + tempreg &= BITM_AFE_CMDDATACON_CMD_MEM_SEL|BITM_AFE_CMDDATACON_CMDMEMMDE; /* Keep sequencer memory settings */ + tempreg |= pFifoCfg->FIFOMode << BITP_AFE_CMDDATACON_DATAMEMMDE; /* Data FIFO mode: stream or FIFO */ + tempreg |= pFifoCfg->FIFOSize << BITP_AFE_CMDDATACON_DATA_MEM_SEL; /* Data FIFO memory size */ + /* The reset memory can be used for sequencer, configure it by function AD5940_SEQCfg() */ + AD5940_WriteReg(REG_AFE_CMDDATACON, tempreg); + + /* FIFO Threshold */ + AD5940_WriteReg(REG_AFE_DATAFIFOTHRES, pFifoCfg->FIFOThresh << BITP_AFE_DATAFIFOTHRES_HIGHTHRES); + /* FIFOCON register. Final step is to enable FIFO */ + tempreg = 0; + if(pFifoCfg->FIFOEn == bTRUE) + tempreg |= BITM_AFE_FIFOCON_DATAFIFOEN; /* Enable FIFO after everything set. */ + tempreg |= pFifoCfg->FIFOSrc << BITP_AFE_FIFOCON_DATAFIFOSRCSEL; + AD5940_WriteReg(REG_AFE_FIFOCON, tempreg); +} + +/** + @brief Read current FIFO configuration. + @param pFifoCfg: Pointer to a buffer that used to store FIFO configuration. + @return return AD5940ERR_OK if succeed. +*/ +AD5940Err AD5940_FIFOGetCfg(FIFOCfg_Type *pFifoCfg) +{ + uint32_t tempreg; + //check parameters + if(pFifoCfg == NULL) return AD5940ERR_NULLP; + /* CMDDATACON register. */ + tempreg = AD5940_ReadReg(REG_AFE_CMDDATACON); + pFifoCfg->FIFOMode = (tempreg&BITM_AFE_CMDDATACON_DATAMEMMDE)>>BITP_AFE_CMDDATACON_DATAMEMMDE; + pFifoCfg->FIFOSize = (tempreg&BITM_AFE_CMDDATACON_DATA_MEM_SEL)>>BITP_AFE_CMDDATACON_DATA_MEM_SEL; + + /* FIFO Threshold */ + tempreg = AD5940_ReadReg(REG_AFE_DATAFIFOTHRES); + pFifoCfg->FIFOThresh = (tempreg&BITM_AFE_DATAFIFOTHRES_HIGHTHRES)>>BITP_AFE_DATAFIFOTHRES_HIGHTHRES; + /* FIFOCON register. */ + tempreg = AD5940_ReadReg(REG_AFE_FIFOCON); + pFifoCfg->FIFOEn = (tempreg&BITM_AFE_FIFOCON_DATAFIFOEN)?bTRUE:bFALSE; + pFifoCfg->FIFOSrc = (tempreg&BITM_AFE_FIFOCON_DATAFIFOSRCSEL)>>BITP_AFE_FIFOCON_DATAFIFOSRCSEL; + + return AD5940ERR_OK; +} + +/** + * @brief Configure AD5940 FIFO Source and enable or disable FIFO. + * @param FifoSrc : available choices are @ref FIFOSRC_Const + * - FIFOSRC_SINC3 SINC3 data + * - FIFOSRC_DFT DFT real and imaginary part + * - FIFOSRC_SINC2NOTCH SINC2+NOTCH block. Notch can be bypassed, so SINC2 data can be feed to FIFO + * - FIFOSRC_VAR Statistic variance output + * - FIFOSRC_MEAN Statistic mean output + * @param FifoEn: enable or disable the FIFO. + * @return return none. +*/ +void AD5940_FIFOCtrlS(uint32_t FifoSrc, BoolFlag FifoEn) +{ + uint32_t tempreg; + + tempreg = 0; + if(FifoEn == bTRUE) + tempreg |= BITM_AFE_FIFOCON_DATAFIFOEN; + tempreg |= FifoSrc << BITP_AFE_FIFOCON_DATAFIFOSRCSEL; + AD5940_WriteReg(REG_AFE_FIFOCON, tempreg); +} + +/** + * @brief Configure AD5940 Data FIFO threshold value + @param FIFOThresh: FIFO threshold value + @return return none. +*/ +void AD5940_FIFOThrshSet(uint32_t FIFOThresh) +{ + /* FIFO Threshold */ + AD5940_WriteReg(REG_AFE_DATAFIFOTHRES, FIFOThresh << BITP_AFE_DATAFIFOTHRES_HIGHTHRES); +} + +/** + * @brief Get Data count in FIFO + * @return return none. +*/ +uint32_t AD5940_FIFOGetCnt(void) +{ + return AD5940_ReadReg(REG_AFE_FIFOCNTSTA) >> BITP_AFE_FIFOCNTSTA_DATAFIFOCNTSTA; +} + + +/* Sequencer */ +/** + * @brief Initialize Sequencer + * @param pSeqCfg: Pointer to configuration structure + @return return none. +*/ +void AD5940_SEQCfg(SEQCfg_Type *pSeqCfg) +{ + /* check parameters */ + uint32_t tempreg, fifocon; + + fifocon = AD5940_ReadReg(REG_AFE_FIFOCON); + AD5940_WriteReg(REG_AFE_FIFOCON, 0); /* Disable FIFO before changing memory configuration */ + /* Configure CMDDATACON register */ + tempreg = AD5940_ReadReg(REG_AFE_CMDDATACON); + tempreg &= ~(BITM_AFE_CMDDATACON_CMDMEMMDE|BITM_AFE_CMDDATACON_CMD_MEM_SEL); /* Clear settings for sequencer memory */ + tempreg |= (1L) << BITP_AFE_CMDDATACON_CMDMEMMDE; /* Sequencer is always in memory mode */ + tempreg |= (pSeqCfg->SeqMemSize) << BITP_AFE_CMDDATACON_CMD_MEM_SEL; + AD5940_WriteReg(REG_AFE_CMDDATACON, tempreg); + + if(pSeqCfg->SeqCntCRCClr) + { + AD5940_WriteReg(REG_AFE_SEQCON, 0); /* Disable sequencer firstly */ + AD5940_WriteReg(REG_AFE_SEQCNT, 0); /* When sequencer is disabled, any write to SEQCNT will clear CNT and CRC register */ + } + tempreg = 0; + if(pSeqCfg->SeqEnable == bTRUE) + tempreg |= BITM_AFE_SEQCON_SEQEN; + tempreg |= (pSeqCfg->SeqWrTimer) << BITP_AFE_SEQCON_SEQWRTMR; + AD5940_WriteReg(REG_AFE_SEQCON, tempreg); + AD5940_WriteReg(REG_AFE_FIFOCON, fifocon); /* restore FIFO configuration */ + + // tempreg = 0; + // if(pSeqCfg->SeqBreakEn) + // tempreg |= 0x01; // add register definition? bitm_afe_ + // if(pSeqCfg->SeqIgnoreEn) + // tempreg |= 0x02; + // AD5940_WriteReg(0x21dc, tempreg); +} +/** + * @brief Read back current sequencer configuration and store it to pSeqCfg + * @param pSeqCfg: Pointer to structure + * @return return AD5940ERR_OK if succeed. +*/ +AD5940Err AD5940_SEQGetCfg(SEQCfg_Type *pSeqCfg) +{ + /* check parameters */ + uint32_t tempreg; + if(pSeqCfg == NULL) + return AD5940ERR_NULLP; + /* Read CMDDATACON register */ + tempreg = AD5940_ReadReg(REG_AFE_CMDDATACON); + pSeqCfg->SeqMemSize = (tempreg&BITM_AFE_CMDDATACON_CMD_MEM_SEL) >> BITP_AFE_CMDDATACON_CMD_MEM_SEL; + pSeqCfg->SeqCntCRCClr = bFALSE; /* Has no meaning */ + /* SEQCON register */ + tempreg = AD5940_ReadReg(REG_AFE_SEQCON); + pSeqCfg->SeqEnable = (tempreg&BITM_AFE_SEQCON_SEQEN)?bTRUE:bFALSE; + pSeqCfg->SeqWrTimer = (tempreg&BITM_AFE_SEQCON_SEQWRTMR) >> BITP_AFE_SEQCON_SEQWRTMR; + return AD5940ERR_OK; +} + +/** + * @brief Enable or Disable sequencer. + * @note Only after valid trigger signal, sequencer can run. + * @return return none. +*/ +void AD5940_SEQCtrlS(BoolFlag SeqEn) +{ + uint32_t tempreg = AD5940_ReadReg(REG_AFE_SEQCON); + if(SeqEn == bTRUE) + tempreg |= BITM_AFE_SEQCON_SEQEN; + else + tempreg &= ~BITM_AFE_SEQCON_SEQEN; + + AD5940_WriteReg(REG_AFE_SEQCON, tempreg); +} + +/** + * @brief Halt sequencer immediately. Use this to debug. In normal application, there is no situation that can use this function. + * @return return none. +*/ +void AD5940_SEQHaltS(void) +{ + AD5940_WriteReg(REG_AFE_SEQCON, BITM_AFE_SEQCON_SEQHALT|BITM_AFE_SEQCON_SEQEN); +} + +/** + * @brief Trigger sequencer by register write. + * @return return none. +**/ +void AD5940_SEQMmrTrig(uint32_t SeqId) +{ + if(SeqId > SEQID_3) + return; + AD5940_WriteReg(REG_AFECON_TRIGSEQ, 1L<SeqId) + { + case SEQID_0: + /* Configure SEQINFO register */ + AD5940_WriteReg(REG_AFE_SEQ0INFO, (pSeq->SeqLen<< 16) | pSeq->SeqRamAddr); + break; + case SEQID_1: + AD5940_WriteReg(REG_AFE_SEQ1INFO, (pSeq->SeqLen<< 16) | pSeq->SeqRamAddr); + break; + case SEQID_2: + AD5940_WriteReg(REG_AFE_SEQ2INFO, (pSeq->SeqLen<< 16) | pSeq->SeqRamAddr); + break; + case SEQID_3: + AD5940_WriteReg(REG_AFE_SEQ3INFO, (pSeq->SeqLen<< 16) | pSeq->SeqRamAddr); + break; + default: + break; + } + if(pSeq->WriteSRAM == bTRUE) + { + AD5940_SEQCmdWrite(pSeq->SeqRamAddr, pSeq->pSeqCmd, pSeq->SeqLen); + } +} + +/** + * @brief Get sequence info: start address and sequence length. + * @param SeqId: Select from {SEQID_0, SEQID_1, SEQID_2, SEQID_3} + - Select which sequence we want to get the information. + @param pSeqInfo: Pointer to sequence info structure. + @return return AD5940ERR_OK when succeed. +*/ +AD5940Err AD5940_SEQInfoGet(uint32_t SeqId, SEQInfo_Type *pSeqInfo) +{ + uint32_t tempreg; + if(pSeqInfo == NULL) return AD5940ERR_NULLP; + switch(SeqId) + { + case SEQID_0: + tempreg = AD5940_ReadReg(REG_AFE_SEQ0INFO); + break; + case SEQID_1: + tempreg = AD5940_ReadReg(REG_AFE_SEQ1INFO); + break; + case SEQID_2: + tempreg = AD5940_ReadReg(REG_AFE_SEQ2INFO); + break; + case SEQID_3: + tempreg = AD5940_ReadReg(REG_AFE_SEQ3INFO); + break; + default: + return AD5940ERR_PARA; + } + pSeqInfo->pSeqCmd = 0; /* We don't know where you store the sequence in MCU SRAM */ + pSeqInfo->SeqId = SeqId; + pSeqInfo->SeqLen = (tempreg>>16)&0x7ff; + pSeqInfo->SeqRamAddr = tempreg&0x7ff; + pSeqInfo->WriteSRAM = bFALSE; /* Don't care */ + + return AD5940ERR_OK; +} + + +/** + @brief Control GPIO with register SYNCEXTDEVICE. Because sequencer have no ability to access register GPIOOUT, + so we use this register for sequencer. + @param Gpio : Select from {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + - The combination of GPIO pins. The selected pins will be set to High. Others will be pulled low. + @return return None. + +**/ +void AD5940_SEQGpioCtrlS(uint32_t Gpio) +{ + AD5940_WriteReg(REG_AFE_SYNCEXTDEVICE, Gpio); +} + +/** + * @brief Read back current count down timer value for Sequencer Timer Out command. + * @return return register value of Sequencer Timer out value. +**/ +uint32_t AD5940_SEQTimeOutRd(void) +{ + return AD5940_ReadReg(REG_AFE_SEQTIMEOUT); +} + +/** + * @brief Configure GPIO to allow it to trigger corresponding sequence(SEQ0/1/2/3). + * @details There are four sequences. We can use GPIO to trigger each sequence. For example, + * GP0 or GP4 can be used to trigger sequence0 and GP3 or GP7 to trigger sequence3. + * There are five mode available to detect pin action: Rising edge, falling edge, both rising and falling + * edge, low level or high level. + * Be careful to use level detection. The trigger signal is always available if the pin level is matched. + * Once the sequence is done, it will immediately run again if the pin level is still matched. + * @return return AD5940ERR_OK if succeed. +**/ +AD5940Err AD5940_SEQGpioTrigCfg(SeqGpioTrig_Cfg *pSeqGpioTrigCfg) +{ + uint32_t reg_ei0con, reg_ei1con; + uint32_t pin_count, pin_mask; + uint32_t mode, en; + if(pSeqGpioTrigCfg == NULL) + return AD5940ERR_NULLP; + reg_ei0con = AD5940_ReadReg(REG_ALLON_EI0CON); + reg_ei1con = AD5940_ReadReg(REG_ALLON_EI1CON); + + pin_count = 0; /* Start from pin0 */ + pin_mask = 0x01; /* start from pin0, mask 0x01 */ + pSeqGpioTrigCfg->SeqPinTrigMode &= 0x07; /* 3bit width */ + + mode = pSeqGpioTrigCfg->SeqPinTrigMode; + en = pSeqGpioTrigCfg->bEnable?1:0; + for(;;) + { + uint32_t bit_position; + if(pSeqGpioTrigCfg->PinSel&pin_mask) + { + if(pin_count < 4) /* EI0CON register */ + { + bit_position = pin_count*4; + reg_ei1con &= ~(0xfL<SeqxWakeupTime[0] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ0WUPH, (pWuptCfg->SeqxWakeupTime[0] & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ0SLEEPL, (pWuptCfg->SeqxSleepTime[0] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ0SLEEPH, (pWuptCfg->SeqxSleepTime[0] & 0xF0000)>>16); + + AD5940_WriteReg(REG_WUPTMR_SEQ1WUPL, (pWuptCfg->SeqxWakeupTime[1] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ1WUPH, (pWuptCfg->SeqxWakeupTime[1] & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ1SLEEPL, (pWuptCfg->SeqxSleepTime[1] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ1SLEEPH, (pWuptCfg->SeqxSleepTime[1] & 0xF0000)>>16); + + AD5940_WriteReg(REG_WUPTMR_SEQ2WUPL, (pWuptCfg->SeqxWakeupTime[2] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ2WUPH, (pWuptCfg->SeqxWakeupTime[2] & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ2SLEEPL, (pWuptCfg->SeqxSleepTime[2] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ2SLEEPH, (pWuptCfg->SeqxSleepTime[2] & 0xF0000)>>16); + + AD5940_WriteReg(REG_WUPTMR_SEQ3WUPL, (pWuptCfg->SeqxWakeupTime[3] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ3WUPH, (pWuptCfg->SeqxWakeupTime[3] & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ3SLEEPL, (pWuptCfg->SeqxSleepTime[3] & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ3SLEEPH, (pWuptCfg->SeqxSleepTime[3] & 0xF0000)>>16); + + /* TMRCON register */ + //if(pWuptCfg->WakeupEn == bTRUE) /* enable use Wupt to wakeup AFE */ + /* We always allow Wupt to wakeup AFE automatically. */ + AD5940_WriteReg(REG_ALLON_TMRCON, BITM_ALLON_TMRCON_TMRINTEN); + /* Wupt order */ + tempreg = 0; + tempreg |= (pWuptCfg->WuptOrder[0]&0x03) << BITP_WUPTMR_SEQORDER_SEQA; /* position A */ + tempreg |= (pWuptCfg->WuptOrder[1]&0x03) << BITP_WUPTMR_SEQORDER_SEQB; /* position B */ + tempreg |= (pWuptCfg->WuptOrder[2]&0x03) << BITP_WUPTMR_SEQORDER_SEQC; /* position C */ + tempreg |= (pWuptCfg->WuptOrder[3]&0x03) << BITP_WUPTMR_SEQORDER_SEQD; /* position D */ + tempreg |= (pWuptCfg->WuptOrder[4]&0x03) << BITP_WUPTMR_SEQORDER_SEQE; /* position E */ + tempreg |= (pWuptCfg->WuptOrder[5]&0x03) << BITP_WUPTMR_SEQORDER_SEQF; /* position F */ + tempreg |= (pWuptCfg->WuptOrder[6]&0x03) << BITP_WUPTMR_SEQORDER_SEQG; /* position G */ + tempreg |= (pWuptCfg->WuptOrder[7]&0x03) << BITP_WUPTMR_SEQORDER_SEQH; /* position H */ + AD5940_WriteReg(REG_WUPTMR_SEQORDER, tempreg); + + tempreg = 0; + if(pWuptCfg->WuptEn == bTRUE) + tempreg |= BITM_WUPTMR_CON_EN; + /* We always allow Wupt to trigger sequencer */ + tempreg |= pWuptCfg->WuptEndSeq << BITP_WUPTMR_CON_ENDSEQ; + //tempreg |= 1L<<4; + AD5940_WriteReg(REG_WUPTMR_CON, tempreg); +} + +/** + * @brief Enable or disable wakeup timer + * @param Enable : {bTRUE, bFALSE} + * - bTRUE: enable wakeup timer + * - bFALSE: Disable wakeup timer + * @return return none. +*/ +void AD5940_WUPTCtrl(BoolFlag Enable) +{ + uint16_t tempreg; + tempreg = AD5940_ReadReg(REG_WUPTMR_CON); + tempreg &= ~BITM_WUPTMR_CON_EN; + + if(Enable == bTRUE) + tempreg |= BITM_WUPTMR_CON_EN; + + AD5940_WriteReg(REG_WUPTMR_CON, tempreg); +} + +/** + * @brief Configure WakeupTimer. + * @param SeqId: Select from SEQID_0/1/2/3. The wakeup timer will load corresponding value from four sets of registers. + * @param SleepTime: After how much time, AFE will try to enter hibernate. We disabled this feature in AD59840_Initialize. After this timer expired, nothing will happen. + * @param WakeupTime: After how much time, AFE will wakeup and trigger corresponding sequencer. + * @note By SleepTime and WakeupTime, the sequencer is triggered periodically and period is (SleepTime+WakeupTime) + * @return return none. +*/ +AD5940Err AD5940_WUPTTime(uint32_t SeqId, uint32_t SleepTime, uint32_t WakeupTime) +{ + switch (SeqId) + { + case SEQID_0: + { + AD5940_WriteReg(REG_WUPTMR_SEQ0WUPL, (WakeupTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ0WUPH, (WakeupTime & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ0SLEEPL, (SleepTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ0SLEEPH, (SleepTime & 0xF0000)>>16); + break; + } + case SEQID_1: + { + AD5940_WriteReg(REG_WUPTMR_SEQ1WUPL, (WakeupTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ1WUPH, (WakeupTime & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ1SLEEPL, (SleepTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ1SLEEPH, (SleepTime & 0xF0000)>>16); + break; + } + case SEQID_2: + { + AD5940_WriteReg(REG_WUPTMR_SEQ2WUPL, (WakeupTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ2WUPH, (WakeupTime & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ2SLEEPL, (SleepTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ2SLEEPH, (SleepTime & 0xF0000)>>16); + break; + } + case SEQID_3: + { + AD5940_WriteReg(REG_WUPTMR_SEQ3WUPL, (WakeupTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ3WUPH, (WakeupTime & 0xF0000)>>16); + AD5940_WriteReg(REG_WUPTMR_SEQ3SLEEPL, (SleepTime & 0xFFFF)); + AD5940_WriteReg(REG_WUPTMR_SEQ3SLEEPH, (SleepTime & 0xF0000)>>16); + break; + } + default: + return AD5940ERR_PARA; + } + return AD5940ERR_OK; +} + +/** + * @} end-of Sequencer_FIFO_Functions + * @} end-of Sequencer_FIFO +*/ + +/** + * @defgroup MISC_Block + * @brief Other functions not included in above blocks. Clock, GPIO, INTC etc. + * @{ + * @defgroup MISC_Block_Functions + * @{ +*/ + +/** + * @brief Configure AD5940 clock + * @param pClkCfg: Pointer to configuration structure. + * @return return none. +*/ +void AD5940_CLKCfg(CLKCfg_Type *pClkCfg) +{ + uint32_t tempreg, reg_osccon; + + reg_osccon = AD5940_ReadReg(REG_ALLON_OSCCON); + /* Enable clocks */ + if(pClkCfg->HFXTALEn == bTRUE) + { + reg_osccon |= BITM_ALLON_OSCCON_HFXTALEN; + AD5940_WriteReg(REG_ALLON_OSCKEY,KEY_OSCCON); /* Write Key */ + AD5940_WriteReg(REG_ALLON_OSCCON, reg_osccon); /* Enable HFXTAL */ + while((AD5940_ReadReg(REG_ALLON_OSCCON)&BITM_ALLON_OSCCON_HFXTALOK) == 0); /* Wait for clock ready */ + } + + if(pClkCfg->HFOSCEn == bTRUE) + { + reg_osccon |= BITM_ALLON_OSCCON_HFOSCEN; + AD5940_WriteReg(REG_ALLON_OSCKEY,KEY_OSCCON); /* Write Key */ + AD5940_WriteReg(REG_ALLON_OSCCON, reg_osccon); /* Enable HFOSC */ + while((AD5940_ReadReg(REG_ALLON_OSCCON)&BITM_ALLON_OSCCON_HFOSCOK) == 0); /* Wait for clock ready */ + /* Configure HFOSC mode if it's enabled. */ + if(pClkCfg->HfOSC32MHzMode == bTRUE) + AD5940_HFOSC32MHzCtrl(bTRUE); + else + AD5940_HFOSC32MHzCtrl(bFALSE); + } + + if(pClkCfg->LFOSCEn == bTRUE) + { + reg_osccon |= BITM_ALLON_OSCCON_LFOSCEN; + AD5940_WriteReg(REG_ALLON_OSCKEY,KEY_OSCCON); /* Write Key */ + AD5940_WriteReg(REG_ALLON_OSCCON, reg_osccon); /* Enable LFOSC */ + while((AD5940_ReadReg(REG_ALLON_OSCCON)&BITM_ALLON_OSCCON_LFOSCOK) == 0); /* Wait for clock ready */ + } + + /* Switch clocks */ + /* step1. Set clock divider */ + tempreg = pClkCfg->SysClkDiv&0x3f; + tempreg |= (pClkCfg->SysClkDiv&0x3f) << BITP_AFECON_CLKCON0_SYSCLKDIV; + tempreg |= (pClkCfg->ADCClkDiv&0xf) << BITP_AFECON_CLKCON0_ADCCLKDIV; + AD5940_WriteReg(REG_AFECON_CLKCON0, tempreg); + AD5940_Delay10us(10); + /* Step2. set clock source */ + tempreg = pClkCfg->SysClkSrc; + tempreg |= pClkCfg->ADCCLkSrc << BITP_AFECON_CLKSEL_ADCCLKSEL; + AD5940_WriteReg(REG_AFECON_CLKSEL, tempreg); + + /* Disable clocks */ + if(pClkCfg->HFXTALEn == bFALSE) + reg_osccon &= ~BITM_ALLON_OSCCON_HFXTALEN; + if(pClkCfg->HFOSCEn == bFALSE) + reg_osccon &= ~BITM_ALLON_OSCCON_HFOSCEN; + if(pClkCfg->LFOSCEn == bFALSE) + reg_osccon &= ~BITM_ALLON_OSCCON_LFOSCEN; + AD5940_WriteReg(REG_ALLON_OSCKEY, KEY_OSCCON); /* Write Key */ + AD5940_WriteReg(REG_ALLON_OSCCON, reg_osccon); +} + +/** + * @brief Configure Internal HFOSC to output 32MHz or 16MHz. + * @param Mode32MHz : {bTRUE, bFALSE} + * - bTRUE: HFOSC 32MHz mode. + * - bFALSE: HFOSC 16MHz mode. + * @return return none. +*/ +void AD5940_HFOSC32MHzCtrl(BoolFlag Mode32MHz) +{ + uint32_t RdCLKEN1; + uint32_t RdHPOSCCON; + + uint32_t bit8,bit9; + + RdCLKEN1 = AD5940_ReadReg(REG_AFECON_CLKEN1); + bit8 = (RdCLKEN1>>9)&0x01; + bit9 = (RdCLKEN1>>8)&0x01; /* Fix bug in silicon, bit8 and bit9 is swapped when read back. */ + RdCLKEN1 = RdCLKEN1&0xff; + RdCLKEN1 |= (bit8<<8)|(bit9<<9); + AD5940_WriteReg(REG_AFECON_CLKEN1,RdCLKEN1|BITM_AFECON_CLKEN1_ACLKDIS); /* Disable ACLK during clock changing */ + + RdHPOSCCON = AD5940_ReadReg(REG_AFE_HPOSCCON); + if(Mode32MHz == bTRUE) + { + AD5940_WriteReg(REG_AFE_HPOSCCON,RdHPOSCCON&(~BITM_AFE_HPOSCCON_CLK32MHZEN)); /* Enable 32MHz output(bit definition-0: 32MHz, 1: 16MHz) */ + while((AD5940_ReadReg(REG_ALLON_OSCCON)&BITM_ALLON_OSCCON_HFOSCOK) == 0); /* Wait for clock ready */ + } + else + { + AD5940_WriteReg(REG_AFE_HPOSCCON,RdHPOSCCON|BITM_AFE_HPOSCCON_CLK32MHZEN); /* Enable 16MHz output(bit definition-0: 32MHz, 1: 16MHz) */ + while((AD5940_ReadReg(REG_ALLON_OSCCON)&BITM_ALLON_OSCCON_HFOSCOK) == 0); /* Wait for clock ready */ + } + + AD5940_WriteReg(REG_AFECON_CLKEN1,RdCLKEN1&(~BITM_AFECON_CLKEN1_ACLKDIS)); /* Enable ACLK */ +} +/** + * @brief Enable high power mode for high frequency EIS + * @param Mode32MHz : {bTRUE, bFALSE} + * - bTRUE: HFOSC 32MHz mode. + * - bFALSE: HFOSC 16MHz mode. + * @return return none. +*/ +void AD5940_HPModeEn(BoolFlag Enable) +{ + CLKCfg_Type clk_cfg; + uint32_t temp_reg = 0; + + /* Check what the system clock is */ + temp_reg = AD5940_ReadReg(REG_AFECON_CLKSEL); + clk_cfg.ADCCLkSrc = (temp_reg>>2)&0x3; + clk_cfg.SysClkSrc = temp_reg & 0x3; + if(Enable == bTRUE) + { + clk_cfg.SysClkDiv = SYSCLKDIV_2; + clk_cfg.HfOSC32MHzMode = bTRUE; + AD5940_AFEPwrBW(AFEPWR_HP, AFEBW_250KHZ); + } + else + { + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.HfOSC32MHzMode = bFALSE; + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_100KHZ); + } + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.HFOSCEn = (temp_reg & 0x3) == 0x1? bFALSE : bTRUE;; + clk_cfg.HFXTALEn = (temp_reg & 0x3) == 0x1? bTRUE : bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); +} + +/** + * @defgroup Interrupt_Controller_Functions + * @{ +*/ +/* AFE Interrupt Controller */ +/** + * @brief Enable or Disable selected interrupt source(s) + * @param AfeIntcSel : {AFEINTC_0, AFEINTC_1} + * - AFEINTC_0: Configure Interrupt Controller 0 + * - AFEINTC_1: Configure Interrupt Controller 1 + * @param AFEIntSrc: select from @ref AFEINTC_SRC_Const + * - AFEINTSRC_ADCRDY : Bit0 ADC Result Ready Status + * - AFEINTSRC_DFTRDY : Bit1 DFT Result Ready Status + * - AFEINTSRC_SUPPLYFILTRDY : Bit2 Low Pass Filter Result Status + * - AFEINTSRC_TEMPRDY : Bit3, Temp Sensor Result Ready + * - AFEINTSRC_ADCMINERR : Bit4, ADC Minimum Value + * - AFEINTSRC_ADCMAXERR : Bit5, ADC Maximum Value + * - AFEINTSRC_ADCDIFFERR : Bit6, ADC Delta Ready + * - AFEINTSRC_MEANRDY : Bit7, Mean Result Ready + * - AFEINTSRC_VARRDY : Bit8, Variance Result Ready + * - AFEINTSRC_DLYCMDDONE : Bit9, User controlled interrupt by writing AFEGENINTSTA. Provides an Early Indication for the End of the Test _Block. + * - AFEINTSRC_HWSETUPDONE : Bit10, User controlled interrupt by writing AFEGENINTSTA. Indicates the MMR Setup for the Measurement Step Finished + * - AFEINTSRC_BRKSEQ : Bit11, User controlled interrupt by writing AFEGENINTSTA. + * - AFEINTSRC_CUSTOMINS : Bit12, User controlled interrupt by writing AFEGENINTSTA. General Purpose Custom Interrupt. + * - AFEINTSRC_BOOTLDDONE : Bit13, OTP Boot Loading Done + * - AFEINTSRC_WAKEUP : Bit14, AFE Woken up + * - AFEINTSRC_ENDSEQ : Bit15, End of Sequence Interrupt. + * - AFEINTSRC_SEQTIMEOUT : Bit16, Sequencer Timeout Command Finished. + * - AFEINTSRC_SEQTIMEOUTERR : Bit17, Sequencer Timeout Command Error. + * - AFEINTSRC_CMDFIFOFULL : Bit18, Command FIFO Full Interrupt. + * - AFEINTSRC_CMDFIFOEMPTY : Bit19, Command FIFO Empty + * - AFEINTSRC_CMDFIFOTHRESH: Bit20, Command FIFO Threshold Interrupt. + * - AFEINTSRC_CMDFIFOOF : Bit21, Command FIFO Overflow Interrupt. + * - AFEINTSRC_CMDFIFOUF : Bit22, Command FIFO Underflow Interrupt. + * - AFEINTSRC_DATAFIFOFULL : Bit23, Data FIFO Full Interrupt. + * - AFEINTSRC_DATAFIFOEMPTY: Bit24, Data FIFO Empty + * - AFEINTSRC_DATAFIFOTHRESH: Bit25, Data FIFO Threshold Interrupt. + * - AFEINTSRC_DATAFIFOOF : Bit26, Data FIFO Overflow Interrupt. + * - AFEINTSRC_DATAFIFOUF : Bit27, Data FIFO Underflow Interrupt. + * - AFEINTSRC_WDTIRQ : Bit28, WDT Timeout Interrupt. + * - AFEINTSRC_CRC_OUTLIER : Bit29, CRC interrupt for M355, Outliers Int for AD5940 + * - AFEINTSRC_GPT0INT_SLPWUT: Bit30, General Purpose Timer0 IRQ for M355. Sleep or Wakeup Timer timeout for AD5940 + * - AFEINTSRC_GPT1INT_TRYBRK: Bit31, General Purpose Timer1 IRQ for M355. Tried to Break IRQ for AD5940 + * - AFE_INTC_ALLINT : All interrupts + * @param State : {bTRUE, bFALSE} + * - bTRUE: Enable these interrupt source(s) + * - bFALSE: Disable interrupt source(s) + * @return return none. +*/ +void AD5940_INTCCfg(uint32_t AfeIntcSel, uint32_t AFEIntSrc, BoolFlag State) +{ + uint32_t tempreg; + uint32_t regaddr = REG_INTC_INTCSEL0; + + if(AfeIntcSel == AFEINTC_1) + regaddr = REG_INTC_INTCSEL1; + + tempreg = AD5940_ReadReg(regaddr); + if(State == bTRUE) + tempreg |= AFEIntSrc; /* Enable this interrupt */ + else + tempreg &= ~(AFEIntSrc); /* Disable this interrupt */ + AD5940_WriteReg(regaddr,tempreg); +} + +/** + * @brief Check if current interrupt configuration. + * @param AfeIntcSel : {AFEINTC_0, AFEINTC_1} + * - AFEINTC_0: Configure Interrupt Controller 0 + * - AFEINTC_1: Configure Interrupt Controller 1 +*/ +uint32_t AD5940_INTCGetCfg(uint32_t AfeIntcSel) +{ + uint32_t tempreg; + if(AfeIntcSel == AFEINTC_0) + tempreg = AD5940_ReadReg(REG_INTC_INTCSEL0); + else + tempreg = AD5940_ReadReg(REG_INTC_INTCSEL1); + return tempreg; +} + +/** + * @brief Clear selected interrupt(s) flag(INTC0Flag and INTC1Flag are both cleared). + * @param AfeIntSrcSel: Select from @ref AFEINTC_SRC_Const + * @return return none. +**/ +void AD5940_INTCClrFlag(uint32_t AfeIntSrcSel) +{ + AD5940_WriteReg(REG_INTC_INTCCLR,AfeIntSrcSel); +} + +/** + * @brief Test if selected interrupt source(s) is(are) bTRUE. + * @param AfeIntcSel : {AFEINTC_0, AFEINTC_1} + * - AFEINTC_0: Read Interrupt Controller 0 flag + * - AFEINTC_1: Read Interrupt Controller 1 flag + * @param AfeIntSrcSel: Select from @ref AFEINTC_SRC_Const + * @return If selected interrupt source(s) are all cleared, return bFALSE. Otherwise return bTRUE. +**/ +BoolFlag AD5940_INTCTestFlag(uint32_t AfeIntcSel, uint32_t AfeIntSrcSel) +{ + uint32_t tempreg; + uint32_t regaddr = (AfeIntcSel == AFEINTC_0)? REG_INTC_INTCFLAG0: REG_INTC_INTCFLAG1; + + tempreg = AD5940_ReadReg(regaddr); + if(tempreg & AfeIntSrcSel) + return bTRUE; + else + return bFALSE; +} + +/** + * @brief return register value of REG_INTC_INTCFLAGx + * @param AfeIntcSel : {AFEINTC_0, AFEINTC_1} + * - AFEINTC_0: Read Interrupt Controller 0 flag + * - AFEINTC_1: Read Interrupt Controller 1 flag + * @return register value of REG_INTC_INTCFLAGx. +**/ +uint32_t AD5940_INTCGetFlag(uint32_t AfeIntcSel) +{ + uint32_t tempreg; + uint32_t regaddr = (AfeIntcSel == AFEINTC_0)? REG_INTC_INTCFLAG0: REG_INTC_INTCFLAG1; + + tempreg = AD5940_ReadReg(regaddr); + return tempreg; +} + +/** + * @} Interrupt_Controller_Functions +*/ + +/** + * @defgroup GPIO_Block_Functions + * @{ +*/ + +/** + * @brief Initialize AFE GPIO + * @param pAgpioCfg: Pointer to configuration structure + * @return return none. +*/ +void AD5940_AGPIOCfg(AGPIOCfg_Type *pAgpioCfg) +{ + AD5940_AGPIOFuncCfg(pAgpioCfg->FuncSet); + AD5940_AGPIOOen(pAgpioCfg->OutputEnSet); + AD5940_AGPIOIen(pAgpioCfg->InputEnSet); + AD5940_AGPIOPen(pAgpioCfg->PullEnSet); + AD5940_WriteReg(REG_AGPIO_GP0OUT, pAgpioCfg->OutVal); +} + +/** + * @brief Configure the function of GP0 to GP7. + * @param uiCfgSet :{GP0_INT,GP0_TRIG,GP0_SYNC,GP0_GPIO| + * GP1_GPIO,GP1_TRIG,GP1_SYNC,GP1_SLEEP| + * GP2_PORB,GP2_TRIG,GP2_SYNC,GP2_EXTCLK| + * GP3_GPIO,GP3_TRIG,GP3_SYNC,GP3_INT0|\ + * GP4_GPIO,GP4_TRIG,GP4_SYNC,GP4_INT1| + * GP5_GPIO,GP5_TRIG,GP5_SYNC,GP5_EXTCLK| + * GP6_GPIO,GP6_TRIG,GP6_SYNC,GP6_INT0| + * GP7_GPIO,GP7_TRIG,GP7_SYNC,GP7_INT} + * @return return none. +**/ +void AD5940_AGPIOFuncCfg(uint32_t uiCfgSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0CON,uiCfgSet); +} + +/** + * @brief Enable GPIO output mode on selected pins. Disable output on non-selected pins. + * @param uiPinSet :Select from {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + * @return return none +**/ +void AD5940_AGPIOOen(uint32_t uiPinSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0OEN,uiPinSet); +} + +/** + * @brief Enable input on selected pins while disable others. + * @param uiPinSet: Select from {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + * @return return none +**/ +void AD5940_AGPIOIen(uint32_t uiPinSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0IEN,uiPinSet); +} + +/** + * @brief Read the GPIO status. + * @return return GP0IN register which is the GPIO status. +**/ +uint32_t AD5940_AGPIOIn(void) +{ + return AD5940_ReadReg(REG_AGPIO_GP0IN); +} + +/** + * @brief Enable pull-up or down on selected pins while disable other pins. + * @param uiPinSet: Select from: {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + * @return return none +**/ +void AD5940_AGPIOPen(uint32_t uiPinSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0PE,uiPinSet); +} + +/** + * @brief Put selected GPIOs to high level. + * @param uiPinSet: Select from: {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + * @return return none +**/ +void AD5940_AGPIOSet(uint32_t uiPinSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0SET,uiPinSet); +} + +/** + * @brief Put selected GPIOs to low level. + * @param uiPinSet: Select from: {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + * @return return none +**/ +void AD5940_AGPIOClr(uint32_t uiPinSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0CLR,uiPinSet); +} + +/** + * @brief Toggle selected GPIOs. + * @param uiPinSet: Select from: {AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin3|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6|AGPIO_Pin7} + * @return return none +**/ +void AD5940_AGPIOToggle(uint32_t uiPinSet) +{ + AD5940_WriteReg(REG_AGPIO_GP0TGL,uiPinSet); +} + +/** + * @} GPIO_Block_Functions +*/ + +/** + * @defgroup LPMode_Block_Functions + * @{ +*/ +/** + * @brief Enter or leave LPMODE. + * @details Once enter this mode, some registers are collected together to a new register so we can + * Control most blocks with in one register. The so called LPMODE has nothing to do with AD5940 power. + * @return return AD5940ERR_OK +**/ +AD5940Err AD5940_LPModeEnS(BoolFlag LPModeEn) +{ + if(LPModeEn == bTRUE) + AD5940_WriteReg(REG_AFE_LPMODEKEY, KEY_LPMODEKEY); /* Enter LP mode by right key. */ + else + AD5940_WriteReg(REG_AFE_LPMODEKEY, 0); /* Write wrong key to exit LP mode */ + return AD5940ERR_OK; +} + +/** + * @brief Select system clock source for LPMODE. + * @note Only in LP Mode, this operation takes effect. Enter LPMODE by function @ref AD5940_LPModeEnS. + * @param LPModeClk: Select from @ref LPMODECLK_Const + * - LPMODECLK_LFOSC: Select LFOSC 32kHz for system clock + * - LPMODECLK_HFOSC: Select HFOSC 16MHz/32MHz for system clock + * @return none. +*/ +void AD5940_LPModeClkS(uint32_t LPModeClk) +{ + AD5940_WriteReg(REG_AFE_LPMODECLKSEL, LPModeClk); +} + +/** + * @} LPMode_Block_Functions +*/ + +/** + * @brief Enter sleep mode key to unlock it or enter incorrect key to lock it. \ + * Once key is unlocked, it will always be effect until manually lock it + * @param SlpKey : {SLPKEY_UNLOCK, SLPKEY_LOCK} + - SLPKEY_UNLOCK Unlock Key so we can enter sleep(or called hibernate) mode. + - SLPKEY_LOCK Lock key so AD5940 is prohibited to enter sleep mode. + @return return none. +*/ +void AD5940_SleepKeyCtrlS(uint32_t SlpKey) +{ + AD5940_WriteReg(REG_AFE_SEQSLPLOCK, SlpKey); +} + +/** + * @brief Put AFE to hibernate. + * @details This will only take effect when SLP_KEY has been unlocked. Use function @ref AD5940_SleepKeyCtrlS to enter correct key. + * @return return none. +*/ +void AD5940_EnterSleepS(void) +{ + AD5940_WriteReg(REG_AFE_SEQTRGSLP, 0); + AD5940_WriteReg(REG_AFE_SEQTRGSLP, 1); +} + +/** + * @brief Turn off LP-Loop and put AFE to hibernate mode; + * @details By function @ref AD5940_EnterSleepS, we can put most blocks to hibernate mode except LP block. + * This function will shut down LP block and then enter sleep mode. + * @return return none. +*/ +void AD5940_ShutDownS(void) +{ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + /* Turn off LP-loop manually because it's not affected by sleep/hibernate mode */ + AD5940_StructInit(&aferef_cfg, sizeof(aferef_cfg)); + AD5940_StructInit(&lp_loop, sizeof(lp_loop)); + AD5940_REFCfgS(&aferef_cfg); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Unlock the key */ + AD5940_EnterSleepS(); /* Enter Hibernate */ +} + +/** + * @brief Try to wakeup AD5940 by read register. + * @details Any SPI operation can wakeup AD5940. AD5940_Initialize must be called to enable this function. + * @param TryCount Specify how many times we will read register. Zero or negative number means always waiting here. + * @return How many times register is read. If returned value is bigger than TryCount, it means wakeup failed. +*/ +uint32_t AD5940_WakeUp(int32_t TryCount) +{ + uint32_t count = 0; + while(1) + { + count++; + if(AD5940_ReadReg(REG_AFECON_ADIID) == AD5940_ADIID) + break; /* Succeed */ + if(TryCount<=0) + continue; /* Always try to wakeup AFE */ + + if(count > TryCount) + break; /* Failed */ + } + return count; +} + +/** + * @brief Read ADIID register, the value for current version is @ref AD5940_ADIID + * @return return none. +*/ +uint32_t AD5940_GetADIID(void) +{ + return AD5940_ReadReg(REG_AFECON_ADIID); +} + +/** + * @brief Read CHIPID register, the value for current version is 0x5501. + * @return return none. +*/ +uint32_t AD5940_GetChipID(void) +{ + return AD5940_ReadReg(REG_AFECON_CHIPID); +} +/** + * @brief Reset AD5940 by register. + * @note AD5940 must be in active state so we can access registers. + * If AD5940 system clock is too low, we consider to use hardware reset, or + * we need to make sure register write is successfully. + * @return return none. +*/ +AD5940Err AD5940_SoftRst(void) +{ + AD5940_WriteReg(REG_AFECON_SWRSTCON, AD5940_SWRST); + AD5940_Delay10us(20); /* AD5940 need some time to exit reset status. 200us looks good. */ + /* We can check RSTSTA register to make sure software reset happened. */ + return AD5940ERR_OK; +} + +/** + * @brief Reset AD5940 with RESET pin. + * @note This will call function AD5940_RstClr which locates in file XXXPort.C + * @return return none. +*/ +void AD5940_HWReset(void) +{ +#ifndef CHIPSEL_M355 + AD5940_RstClr(); + AD5940_Delay10us(200); /* Delay some time */ + AD5940_RstSet(); + AD5940_Delay10us(500); /* AD5940 need some time to exit reset status. 200us looks good. */ +#else + //There is no method to reset AFE only for M355. +#endif +} + +/** + * @} MISC_Block_Functions + * @} MISC_Block +*/ + +/** + * @defgroup Calibration_Block + * @brief The non-factory calibration routines. + * @{ + * @defgroup Calibration_Functions + * @{ + * + * + */ +/** + * @brief Turn on High power 1.8V/1.1V reference and 2.5V LP reference. + * @return return none. +*/ +static void __AD5940_ReferenceON(void) +{ + AFERefCfg_Type ref_cfg; + /* Turn ON ADC/DAC and LPDAC reference */ + ref_cfg.Hp1V1BuffEn = bTRUE; + ref_cfg.Hp1V8BuffEn = bTRUE; + ref_cfg.HpBandgapEn = bTRUE; + ref_cfg.HSDACRefEn = bTRUE; + ref_cfg.LpBandgapEn = bTRUE; + ref_cfg.LpRefBufEn = bTRUE; + + ref_cfg.Disc1V1Cap = bFALSE; + ref_cfg.Disc1V8Cap = bFALSE; + ref_cfg.Hp1V8Ilimit = bFALSE; + ref_cfg.Hp1V8ThemBuff = bFALSE; + ref_cfg.Lp1V1BuffEn = bFALSE; + ref_cfg.Lp1V8BuffEn = bFALSE; + ref_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&ref_cfg); +} + +/** + * @brief Turn on ADC to sample one SINC2 data. + * @return return ADCCode. +*/ +static uint32_t __AD5940_TakeMeasurement(int32_t *time_out) +{ + uint32_t ADCCode = 0; + AD5940_INTCClrFlag(AFEINTSRC_SINC2RDY); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_SINC2NOTCH, bTRUE);/* Start conversion */ + do + { + AD5940_Delay10us(1); /* Delay 10us */ + if(AD5940_INTCTestFlag(AFEINTC_1,AFEINTSRC_SINC2RDY)) + { + ADCCode = AD5940_ReadAfeResult(AFERESULT_SINC2); + break; + } + if(*time_out != -1) + (*time_out)--; + }while(*time_out != 0); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_SINC2NOTCH, bFALSE);/* Stop conversion */ + return ADCCode; +} + +/** + @brief Calibrate ADC PGA + @param pADCPGACal: PGA calibration parameters include filter setup and PGA gain. + @return AD5940ERR_OK. +**/ +AD5940Err AD5940_ADCPGACal(ADCPGACal_Type *pADCPGACal) +{ + const float kFactor = 1.835f/1.82f; + ADCBaseCfg_Type adc_base; + + int32_t time_out; + uint32_t INTCCfg; + int32_t ADCCode; + BoolFlag bADCClk32MHzMode; + + uint32_t regaddr_gain, regaddr_offset; + + if(pADCPGACal == NULL) return AD5940ERR_NULLP; + if(pADCPGACal->ADCPga > ADCPGA_9) return AD5940ERR_PARA; /* Parameter Error */ + + if(pADCPGACal->AdcClkFreq > (32000000*0.8)) + bADCClk32MHzMode = bTRUE; + + /** + * Determine Gain calibration method according to different gain value... + * and calibration register + * */ + static const struct _cal_registers + { + uint16_t gain_reg; + uint16_t offset_reg; + }cal_registers[] = { + {REG_AFE_ADCGAINGN1,REG_AFE_ADCOFFSETGN1}, + {REG_AFE_ADCGAINGN1P5,REG_AFE_ADCOFFSETGN1P5}, + {REG_AFE_ADCGAINGN2,REG_AFE_ADCOFFSETGN2}, + {REG_AFE_ADCGAINGN4,REG_AFE_ADCOFFSETGN4}, + {REG_AFE_ADCGAINGN9,REG_AFE_ADCOFFSETGN9}, + }; + regaddr_gain = cal_registers[pADCPGACal->ADCPga].gain_reg; + regaddr_offset = cal_registers[pADCPGACal->ADCPga].offset_reg; + + /* Do initialization */ + __AD5940_ReferenceON(); + ADCFilterCfg_Type adc_filter; + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH. Use SIN2 data for calibration-->Lower noise */ + adc_filter.ADCSinc3Osr = pADCPGACal->ADCSinc3Osr; + adc_filter.ADCSinc2Osr = pADCPGACal->ADCSinc2Osr; /* 800KSPS/4/1333 = 150SPS */ + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = bADCClk32MHzMode?ADCRATE_1P6MHZ:ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + /* Turn ON reference and ADC power, and DAC reference. We use DAC 1.8V reference to calibrate ADC because of the ADC reference bug. */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Disable all */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_HPREFPWR|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_Delay10us(25); /* Wait 250us for reference power up */ + /* INTC configure and open calibration lock */ + INTCCfg = AD5940_INTCGetCfg(AFEINTC_1); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bTRUE); /* Enable SINC2 Interrupt in INTC1 */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, KEY_CALDATLOCK); /* Unlock KEY */ + + /* Do offset calibration. */ + if(pADCPGACal->PGACalType != PGACALTYPE_GAIN){ /* Need offset calibration */ + int32_t ExpectedCode = 0x8000; /* Ideal ADC output */ + AD5940_WriteReg(regaddr_offset, 0); /* Reset offset register */ + + adc_base.ADCMuxP = ADCMUXP_VSET1P1; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; /* Short input with common voltage set to 1.11v */ + adc_base.ADCPga = pADCPGACal->ADCPga; /* Set correct Gain value. */ + AD5940_ADCBaseCfgS(&adc_base); + AD5940_Delay10us(5); /* Wait for sometime */ + ADCCode = 0; + for(int i=0; i<8; i++) + { /* ADC offset calibration register has resolution of 0.25LSB. take full use of it. */ + time_out = pADCPGACal->TimeOut10us; /* Reset time out counter */ + ADCCode += __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) goto ADCPGACALERROR_TIMEOUT; /* Time out error. */ + } + /* Calculate and write the result to registers before gain calibration */ + ADCCode = (ExpectedCode<<3) - ADCCode; /* We will shift back 1bit below */ + /** + * AD5940 use formular Output = gain*(input + offset) for calibration. + * So, the measured results should be divided by gain to get value for offset register. + */ + uint32_t gain = AD5940_ReadReg(regaddr_gain); + ADCCode = (ADCCode*0x4000)/gain; + ADCCode = ((ADCCode+1)>>1)&0x7fff; /* Round 0.5 */ + AD5940_WriteReg(regaddr_offset, ADCCode); + } + + /* Do gain calibration */ + if(pADCPGACal->PGACalType != PGACALTYPE_OFFSET) /* Need gain calibration */ + { + int32_t ExpectedGainCode; + static const float ideal_pga_gain[]={1,1.5,2,4,9}; + AD5940_WriteReg(regaddr_gain, 0x4000); /* Reset gain register */ + if(pADCPGACal->ADCPga <= ADCPGA_2) + { + //gain1,1.5,2 could use reference directly + adc_base.ADCMuxP = ADCMUXP_VREF1P8DAC; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + ExpectedGainCode = (int32_t)((pADCPGACal->VRef1p82 - pADCPGACal->VRef1p11)*ideal_pga_gain[pADCPGACal->ADCPga]/\ + pADCPGACal->VRef1p82*32768/kFactor)\ + + 0x8000; + } + else + { + //gain4,9 use DAC generated voltage + adc_base.ADCMuxP = ADCMUXP_P_NODE; + adc_base.ADCMuxN = ADCMUXN_N_NODE; + /* Setup HSLOOP to generate voltage for GAIN4/9 calibration. */ + AD5940_AFECtrlS(AFECTRL_EXTBUFPWR|AFECTRL_INAMPPWR|AFECTRL_HSTIAPWR|AFECTRL_WG, bTRUE); + HSLoopCfg_Type hsloop_cfg; + hsloop_cfg.HsDacCfg.ExcitBufGain = EXCITBUFGAIN_2; + hsloop_cfg.HsDacCfg.HsDacGain = HSDACGAIN_1; + hsloop_cfg.HsDacCfg.HsDacUpdateRate = 7; + hsloop_cfg.HsTiaCfg.DiodeClose = bFALSE; + hsloop_cfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hsloop_cfg.HsTiaCfg.HstiaCtia = 31; + hsloop_cfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hsloop_cfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hsloop_cfg.HsTiaCfg.HstiaDe1Rload = HSTIADERLOAD_OPEN; + hsloop_cfg.HsTiaCfg.HstiaDe1Rtia = HSTIADERTIA_OPEN; + hsloop_cfg.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_200; + hsloop_cfg.SWMatCfg.Dswitch = SWD_OPEN; + hsloop_cfg.SWMatCfg.Pswitch = SWP_PL; + hsloop_cfg.SWMatCfg.Nswitch = SWN_NL; + hsloop_cfg.SWMatCfg.Tswitch = SWT_TRTIA; + hsloop_cfg.WgCfg.GainCalEn = bTRUE; + hsloop_cfg.WgCfg.OffsetCalEn = bTRUE; + hsloop_cfg.WgCfg.WgType = WGTYPE_MMR; + uint32_t HSDACCode; + if(pADCPGACal->ADCPga == ADCPGA_4) + HSDACCode = 0x800 + 0x300; /* 0x300--> 0x300/0x1000*0.8*BUFFERGAIN2 = 0.3V. */ + else if(pADCPGACal->ADCPga == ADCPGA_9) + HSDACCode = 0x800 + 0x155; /* 0x155--> 0x155/0x1000*0.8*BUFFERGAIN2 = 0.133V. */ + hsloop_cfg.WgCfg.WgCode = HSDACCode; + AD5940_HSLoopCfgS(&hsloop_cfg); + + //measure expected code + adc_base.ADCPga = ADCPGA_1P5; + AD5940_ADCBaseCfgS(&adc_base); + AD5940_Delay10us(5); + time_out = pADCPGACal->TimeOut10us; /* Reset time out counter */ + ExpectedGainCode = 0x8000 + (int32_t)((__AD5940_TakeMeasurement(&time_out) - 0x8000)/1.5f\ + *ideal_pga_gain[pADCPGACal->ADCPga]); + if(time_out == 0) goto ADCPGACALERROR_TIMEOUT; + } + adc_base.ADCPga = pADCPGACal->ADCPga; /* Set to gain under calibration */ + AD5940_ADCBaseCfgS(&adc_base); + AD5940_Delay10us(5); + time_out = pADCPGACal->TimeOut10us; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); + if(time_out == 0) goto ADCPGACALERROR_TIMEOUT; + /* Calculate and write the result to registers */ + ADCCode = (ExpectedGainCode - 0x8000)*0x4000/(ADCCode-0x8000); + ADCCode &= 0x7fff; + AD5940_WriteReg(regaddr_gain, ADCCode); + } + + /* Restore INTC1 SINC2 configure */ + if(INTCCfg&AFEINTSRC_SINC2RDY); + else + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bFALSE); /* Disable SINC2 Interrupt */ + + AD5940_WriteReg(REG_AFE_CALDATLOCK, 0); /* Lock KEY */ + /* Done */ + return AD5940ERR_OK; + +ADCPGACALERROR_TIMEOUT: + AD5940_ADCConvtCtrlS(bFALSE); /* Stop conversion */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, 0); /* Lock KEY */ + return AD5940ERR_TIMEOUT; +} + +/** + * @brief Calibrate LPTIA offset + * @param pLPTIAOffsetCal Pointer to LPTIA offset calibration settings. + * @return AD5940ERR_OK. +**/ +AD5940Err AD5940_LPTIAOffsetCal(LPTIAOffsetCal_Type *pLPTIAOffsetCal) +{ + AD5940Err error = AD5940ERR_OK; + LPLoopCfg_Type lploop_cfg; + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + + int32_t time_out; + uint32_t INTCCfg; + int32_t ADCCode; + BoolFlag bADCClk32MHzMode; + + if(pLPTIAOffsetCal == NULL) return AD5940ERR_NULLP; + if(pLPTIAOffsetCal->AdcClkFreq > (32000000*0.8)) + bADCClk32MHzMode = bTRUE; + + /* Step0: Do initialization */ + /* Turn on AD5940 references in case it's disabled. */ + __AD5940_ReferenceON(); + lploop_cfg.LpAmpCfg.LpAmpSel = pLPTIAOffsetCal->LpAmpSel; + lploop_cfg.LpAmpCfg.LpAmpPwrMod = pLPTIAOffsetCal->LpAmpPwrMod; /* Power mode will affect amp offset. */ + lploop_cfg.LpAmpCfg.LpPaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaRf = LPTIARF_OPEN; + lploop_cfg.LpAmpCfg.LpTiaRload = LPTIARLOAD_100R; + lploop_cfg.LpAmpCfg.LpTiaRtia = pLPTIAOffsetCal->LpTiaRtia; + lploop_cfg.LpAmpCfg.LpTiaSW = pLPTIAOffsetCal->LpTiaSW; /* Disconnect capacitors so it settles quickly */ + lploop_cfg.LpDacCfg.LpdacSel = (pLPTIAOffsetCal->LpAmpSel == LPAMP0)?LPDAC0:LPDAC1; + lploop_cfg.LpDacCfg.DacData12Bit = pLPTIAOffsetCal->DacData12Bit; + lploop_cfg.LpDacCfg.DacData6Bit = pLPTIAOffsetCal->DacData6Bit; + lploop_cfg.LpDacCfg.DataRst = bFALSE; + lploop_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; + lploop_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lploop_cfg.LpDacCfg.LpDacVzeroMux = pLPTIAOffsetCal->LpDacVzeroMux; + lploop_cfg.LpDacCfg.LpDacSW = LPDACSW_VZERO2LPTIA; + lploop_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lploop_cfg.LpDacCfg.PowerEn = bTRUE; + AD5940_LPLoopCfgS(&lploop_cfg); + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH. Use SIN2 data for calibration-->Lower noise */ + adc_filter.ADCSinc3Osr = pLPTIAOffsetCal->ADCSinc3Osr; + adc_filter.ADCSinc2Osr = pLPTIAOffsetCal->ADCSinc2Osr; /* 800KSPS/4/1333 = 150SPS */ + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = bADCClk32MHzMode?ADCRATE_1P6MHZ:ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + /* Initialize ADC MUx and PGA */ + if(pLPTIAOffsetCal->LpAmpSel == LPAMP0) + { + adc_base.ADCMuxP = ADCMUXP_LPTIA0_P; + adc_base.ADCMuxN = ADCMUXN_LPTIA0_N; + } + else + { + adc_base.ADCMuxP = ADCMUXP_LPTIA1_P; + adc_base.ADCMuxN = ADCMUXN_LPTIA1_N; + } + adc_base.ADCPga = pLPTIAOffsetCal->ADCPga; /* Set correct Gain value. */ + AD5940_ADCBaseCfgS(&adc_base); + /* Turn ON ADC and its reference. And SINC2. */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Disable all firstly, we only enable things we use */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_HPREFPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_Delay10us(25); /* Wait 250us for reference power up */ + /* INTC configure and open calibration lock */ + INTCCfg = AD5940_INTCGetCfg(AFEINTC_1); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bTRUE); /* Enable SINC2 Interrupt in INTC1 */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, KEY_CALDATLOCK); /* Unlock KEY */ + + /* Do offset calibration. */ + { + int32_t ExpectedCode = 0x8000; /* Ideal ADC output */ + AD5940_WriteReg(REG_AFE_ADCOFFSETLPTIA0, 0); /* Reset offset register */ + + if(pLPTIAOffsetCal->SettleTime10us > 0) + AD5940_Delay10us(pLPTIAOffsetCal->SettleTime10us); /* Delay 10us */ + time_out = pLPTIAOffsetCal->TimeOut10us; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) + { + error = AD5940ERR_TIMEOUT; + goto LPTIAOFFSETCALERROR; + } /* Time out error. */ + /* Calculate and write the result to registers before gain calibration */ + ADCCode = ((ExpectedCode - ADCCode)<<3); /* We will shift back 1bit below */ + ADCCode = ((ADCCode+1)>>1); /* Round 0.5 */ + if((ADCCode > 0x3fff) || + (ADCCode < -0x4000)) /* The register used for offset calibration is limited to -0x4000 to 0x3fff */ + { + error = AD5940ERR_CALOR; + goto LPTIAOFFSETCALERROR; + } + ADCCode &= 0x7fff; + if(pLPTIAOffsetCal->LpAmpSel == LPAMP0) + AD5940_WriteReg(REG_AFE_ADCOFFSETLPTIA0, ADCCode); + else + AD5940_WriteReg(REG_AFE_ADCOFFSETLPTIA1, ADCCode); + } + /* Restore INTC1 SINC2 configure */ + if(INTCCfg&AFEINTSRC_SINC2RDY); + else + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bFALSE); /* Disable SINC2 Interrupt */ + + AD5940_WriteReg(REG_AFE_CALDATLOCK, 0); /* Lock KEY */ + /* Done */ + return AD5940ERR_OK; + +LPTIAOFFSETCALERROR: + AD5940_ADCConvtCtrlS(bFALSE); /* Stop conversion */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, 0); /* Lock KEY */ + return error; +} + +/** + * @brief Calibrate HSTIA offset-ongoing. + * @param pHSTIAOffsetCal: pointer to configuration. + * @return AD5940ERR_OK. +**/ +AD5940Err AD5940_HSTIAOffsetCal(LPTIAOffsetCal_Type *pHSTIAOffsetCal) +{ + return AD5940ERR_OK; +} + +/** + * @brief Measure HSTIA internal RTIA impedance. + * @param pCalCfg: pointer to calibration structure. + * @param pResult: Pointer to a variable that used to store result. + * If bPolarResult in structure is set, then use type fImpPol_Type otherwise use fImpCar_Type. + * @return AD5940ERR_OK if succeed. +**/ +AD5940Err AD5940_HSRtiaCal(HSRTIACal_Type *pCalCfg, void *pResult) +{ + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type hs_loop; + DSPCfg_Type dsp_cfg; + uint32_t INTCCfg; + + BoolFlag bADCClk32MHzMode = bFALSE; + uint32_t ExcitBuffGain = EXCITBUFGAIN_2; + uint32_t HsDacGain = HSDACGAIN_1; + + float ExcitVolt; /* Excitation voltage, unit is mV */ + uint32_t RtiaVal; + uint32_t const HpRtiaTable[]={200,1000,5000,10000,20000,40000,80000,160000,0}; + uint32_t WgAmpWord; + + iImpCar_Type DftRcal, DftRtia; + + if(pCalCfg == NULL) return AD5940ERR_NULLP; + if(pCalCfg->fRcal == 0) + return AD5940ERR_PARA; + if(pCalCfg->HsTiaCfg.HstiaRtiaSel > HSTIARTIA_160K) + return AD5940ERR_PARA; + if(pCalCfg->HsTiaCfg.HstiaRtiaSel == HSTIARTIA_OPEN) + return AD5940ERR_PARA; /* Do not support calibrating DE0-RTIA */ + if(pResult == NULL) + return AD5940ERR_NULLP; + + if(pCalCfg->AdcClkFreq > (32000000*0.8)) + bADCClk32MHzMode = bTRUE; + + /* Calculate the excitation voltage we should use based on RCAL/Rtia */ + RtiaVal = HpRtiaTable[pCalCfg->HsTiaCfg.HstiaRtiaSel]; + /* + DAC output voltage calculation + Note: RCAL value should be similar to RTIA so the accuracy is best. + HSTIA output voltage should be limited to 0.2V to AVDD-0.2V, with 1.1V bias. We use 80% of this range for safe. + Because the bias voltage is fixed to 1.1V, so for AC signal maximum amplitude is 1.1V-0.2V = 0.9Vp. That's 1.8Vpp. + Formula is: ExcitVolt(in mVpp) = (1800mVpp*80% / RTIA) * RCAL + ADC input range is +-1.5V which is enough for calibration. + + */ + ExcitVolt = 1800*0.8*pCalCfg->fRcal/RtiaVal; + + if(ExcitVolt <= 800*0.05) /* Voltage is so small that we can enable the attenuator of DAC(1/5) and Excitation buffer(1/4). 800mVpp is the DAC output voltage */ + { + ExcitBuffGain = EXCITBUFGAIN_0P25; + HsDacGain = HSDACGAIN_0P2; + /* Excitation buffer voltage full range is 800mVpp*0.05 = 40mVpp */ + WgAmpWord = ((uint32_t)(ExcitVolt/40*2047*2)+1)>>1; /* Assign value with rounding (0.5 LSB error) */ + } + else if(ExcitVolt <= 800*0.25) /* Enable Excitation buffer attenuator */ + { + ExcitBuffGain = EXCITBUFGAIN_0P25; + HsDacGain = HSDACGAIN_1; + /* Excitation buffer voltage full range is 800mVpp*0.25 = 200mVpp */ + WgAmpWord = ((uint32_t)(ExcitVolt/200*2047*2)+1)>>1; /* Assign value with rounding (0.5 LSB error) */ + } + else if(ExcitVolt <= 800*0.4) /* Enable DAC attenuator */ + { + ExcitBuffGain = EXCITBUFGAIN_2; + HsDacGain = HSDACGAIN_0P2; + /* Excitation buffer voltage full range is 800mVpp*0.4 = 320mV */ + WgAmpWord = ((uint32_t)(ExcitVolt/320*2047*2)+1)>>1; /* Assign value with rounding (0.5 LSB error) */ + } + else /* No attenuator is needed. This is the best condition which means RTIA is close to RCAL */ + { + ExcitBuffGain = EXCITBUFGAIN_2; + HsDacGain = HSDACGAIN_1; + /* Excitation buffer voltage full range is 800mVpp*2=1600mVpp */ + WgAmpWord = ((uint32_t)(ExcitVolt/1600*2047*2)+1)>>1; /* Assign value with rounding (0.5 LSB error) */ + } + + if(WgAmpWord > 0x7ff) + WgAmpWord = 0x7ff; + + /*INTC configuration */ + INTCCfg = AD5940_INTCGetCfg(AFEINTC_1); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_DFTRDY, bTRUE); /* Enable SINC2 Interrupt in INTC1 */ + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + /* Configure reference system */ + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + aferef_cfg.LpBandgapEn = bFALSE; + aferef_cfg.LpRefBufEn = bFALSE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + /* Configure HP Loop */ + hs_loop.HsDacCfg.ExcitBufGain = ExcitBuffGain; + hs_loop.HsDacCfg.HsDacGain = HsDacGain; + hs_loop.HsDacCfg.HsDacUpdateRate = 7; /* Set it to highest update rate */ + memcpy(&hs_loop.HsTiaCfg, &pCalCfg->HsTiaCfg, sizeof(pCalCfg->HsTiaCfg)); + hs_loop.SWMatCfg.Dswitch = SWD_RCAL0; + hs_loop.SWMatCfg.Pswitch = SWP_RCAL0; + hs_loop.SWMatCfg.Nswitch = SWN_RCAL1; + hs_loop.SWMatCfg.Tswitch = SWT_RCAL1|SWT_TRTIA; + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bTRUE; + hs_loop.WgCfg.OffsetCalEn = bTRUE; + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(pCalCfg->fFreq, pCalCfg->SysClkFreq); + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = WgAmpWord; + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&hs_loop); + /* Configure DSP */ + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_N_NODE; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_P_NODE; + dsp_cfg.ADCBaseCfg.ADCPga = ADCPGA_1P5; + AD5940_StructInit(&dsp_cfg.ADCDigCompCfg, sizeof(dsp_cfg.ADCDigCompCfg)); + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = bADCClk32MHzMode?ADCRATE_1P6MHZ:ADCRATE_800KHZ; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = pCalCfg->ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = pCalCfg->ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + + memcpy(&dsp_cfg.DftCfg, &pCalCfg->DftCfg, sizeof(pCalCfg->DftCfg)); + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + /*AFECTRL_WG|*/AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + //wait for sometime. + AD5940_Delay10us(25); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /* Wait until DFT ready */ + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_DFTRDY) == bFALSE); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_INTCClrFlag(AFEINTSRC_DFTRDY); + + DftRcal.Real = AD5940_ReadAfeResult(AFERESULT_DFTREAL); + DftRcal.Image = AD5940_ReadAfeResult(AFERESULT_DFTIMAGE); + + AD5940_ADCMuxCfgS(ADCMUXP_HSTIA_P, ADCMUXN_HSTIA_N); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + //wait for sometime. + AD5940_Delay10us(25); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /* Wait until DFT ready */ + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_DFTRDY) == bFALSE); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_INTCClrFlag(AFEINTSRC_DFTRDY); + + DftRtia.Real = AD5940_ReadAfeResult(AFERESULT_DFTREAL); + DftRtia.Image = AD5940_ReadAfeResult(AFERESULT_DFTIMAGE); + + if(DftRcal.Real&(1L<<17)) + DftRcal.Real |= 0xfffc0000; + if(DftRcal.Image&(1L<<17)) + DftRcal.Image |= 0xfffc0000; + if(DftRtia.Real&(1L<<17)) + DftRtia.Real |= 0xfffc0000; + if(DftRtia.Image&(1L<<17)) + DftRtia.Image |= 0xfffc0000; + /* + ADC MUX is set to HSTIA_P and HSTIA_N. + While the current flow through RCAL and then into RTIA, the current direction should be from HSTIA_N to HSTIA_P if we + measure the voltage across RCAL by MUXSELP_P_NODE and MUXSELN_N_NODE. + So here, we add a negative sign to results + */ + DftRtia.Image = -DftRtia.Image; + DftRtia.Real = -DftRtia.Real; /* Current is measured by MUX HSTIA_P-HSTIA_N. It should be */ + /* + The impedance engine inside of AD594x give us Real part and Imaginary part of DFT. Due to technology used, the Imaginary + part in register is the opposite number. So we add a negative sign on the Imaginary part of results. + */ + DftRtia.Image = -DftRtia.Image; + DftRcal.Image = -DftRcal.Image; + + fImpCar_Type temp; + temp = AD5940_ComplexDivInt(&DftRtia, &DftRcal); + temp.Real *= pCalCfg->fRcal; + temp.Image *= pCalCfg->fRcal; + if(pCalCfg->bPolarResult == bFALSE) + { + *(fImpCar_Type*)pResult = temp; + } + else + { + ((fImpPol_Type*)pResult)->Magnitude = AD5940_ComplexMag(&temp); + ((fImpPol_Type*)pResult)->Phase = AD5940_ComplexPhase(&temp); + } + + /* Restore INTC1 DFT configure */ + if(INTCCfg&AFEINTSRC_DFTRDY); + else + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_DFTRDY, bFALSE); /* Disable DFT Interrupt */ + + return AD5940ERR_OK; +} + +/** + * @brief Measure LPTIA internal RTIA impedance with HSTIA. This is the recommended method for LPTIA RTIA calibration. + * @param pCalCfg: pointer to calibration structure. + * @param pResult: Pointer to a variable that used to store result. + * If bPolarResult in structure is set, then use type fImpPol_Type otherwise use fImpCar_Type. + * @return AD5940ERR_OK if succeed. +**/ +AD5940Err AD5940_LPRtiaCal(LPRTIACal_Type *pCalCfg, void *pResult) +{ + HSLoopCfg_Type hs_loop; + LPLoopCfg_Type lp_loop; + DSPCfg_Type dsp_cfg; + ADCBaseCfg_Type *pADCBaseCfg; + SWMatrixCfg_Type *pSWCfg; + uint32_t INTCCfg, reg_afecon; + BoolFlag bADCClk32MHzMode = bFALSE; + BoolFlag bDCMode = bFALSE; /* Indicate if frequency is 0, which means we calibrate at DC. */ + + float ExcitVolt; /* Excitation voltage, unit is mV */ + uint32_t RtiaVal; + /* RTIA value table when RLOAD set to 100Ohm */ + uint32_t const LpRtiaTable[]={0,110,1000,2000,3000,4000,6000,8000,10000,12000,16000,20000,24000,30000,32000,40000,48000,64000,85000,96000,100000,120000,128000,160000,196000,256000,512000}; + float const ADCPGAGainTable[] = {1, 1.5, 2, 4, 9}; + uint32_t WgAmpWord; + + uint32_t ADCPgaGainRtia, ADCPgaGainRcal; + float GainRatio; + + iImpCar_Type DftRcal, DftRtia; + + if(pCalCfg == NULL) return AD5940ERR_NULLP; /* Parameters illegal */ + + if(pCalCfg->fRcal == 0) + return AD5940ERR_PARA; + if(pCalCfg->LpTiaRtia > LPTIARTIA_512K) + return AD5940ERR_PARA; + if(pCalCfg->LpTiaRtia == LPTIARTIA_OPEN) + return AD5940ERR_PARA; /* Not supported now. By setting RTIA to open and set corresponding switches can calibrate external RTIA */ + if(pResult == NULL) + return AD5940ERR_NULLP; + + if(pCalCfg->AdcClkFreq > (32000000*0.8)) + bADCClk32MHzMode = bTRUE; /* Clock frequency is high. */ + if(pCalCfg->fFreq == 0.0f) /* Frequency is zero means we calibrate RTIA at DC. */ + bDCMode = bTRUE; + /* Init two pointers */ + pSWCfg = &hs_loop.SWMatCfg; + pADCBaseCfg = &dsp_cfg.ADCBaseCfg; + /* Calculate the excitation voltage we should use based on RCAL/Rtia */ + RtiaVal = LpRtiaTable[pCalCfg->LpTiaRtia]; + /* + * DAC output voltage calculation + * Note: RCAL value should be similar to RTIA so the accuracy is best. + * LPTIA output voltage should be limited to 0.3V to AVDD-0.4V, with 1.3V bias. We use 80% of this range for safe. + * That's 2.0Vpp*80%@2.7V AVDD + * Formula is: ExcitVolt(in mVpp) = (2000mVpp*80% / RTIA) * RCAL + * ADC input range is +-1.5V which is enough for calibration. + * Limitations: + * Note: HSTIA output range is AVDD-0.4V to AGND+0.2V + * HSTIA input common voltage range is 0.3V to AVDD-0.7V; + * When AVDD is 2.7V, the input range is 0.3V to 2.0V; + * If we set Vbias to 1.3V, then maximum AC signal is 0.7Vp*2 = 1.4Vpp. + * Maximum AC signal is further limited by HSTIA RTIA=200Ohm, when RCAL is 200Ohm(for ADuCM355). The maximum output of HSTIA is limited to 2.3V. + * Maximum Vzero voltage is 1.9V when Rcal is 200Ohm and Switch On resistance is 50Ohm*2. Vzero_max = 1.3V + (2.3V-1.3V)/(200+200+50*2)*300. + * Maximum AC signal is (1.9-1.3)*2 = 1.2Vpp(for ADuCM355, RCAl=200Ohm). + */ + /** @cond */ + #define MAXVOLT_P2P 1400 /* Maximum peak to peak voltage 1200mV for ADuCM355. */ + /* Maximum peak2peak voltage for AD5940 10kOhm RCAL is 1400mV */ + #define __MAXVOLT_AMP_CODE (MAXVOLT_P2P*2047L/2200) + /** @endcond */ + ExcitVolt = 2000*0.8*pCalCfg->fRcal/RtiaVal; + WgAmpWord = ((uint32_t)(ExcitVolt/2200*2047*2)+1)>>1; /* Assign value with rounding (0.5 LSB error) */ + if(WgAmpWord > __MAXVOLT_AMP_CODE) + WgAmpWord = __MAXVOLT_AMP_CODE; + /** + * Determine the best ADC PGA gain for both RCAL and RTIA voltage measurement. + */ + { + float RtiaVolt, RcalVolt, temp; + ExcitVolt = WgAmpWord*2000.0f/2047; /* 2000mVpp -->ExcitVolt in Peak to Peak unit */ + RtiaVolt = ExcitVolt/(pCalCfg->fRcal + 100)*RtiaVal; + RcalVolt = RtiaVolt/RtiaVal*pCalCfg->fRcal; + /* The input range of ADC is 1.5Vp, we calculate how much gain we need */ + temp = 3000.0f/RcalVolt; + if(temp >= 9.0f) ADCPgaGainRcal = ADCPGA_9; + else if(temp >= 4.0f) ADCPgaGainRcal = ADCPGA_4; + else if(temp >= 2.0f) ADCPgaGainRcal = ADCPGA_2; + else if(temp >= 1.5f) ADCPgaGainRcal = ADCPGA_1P5; + else ADCPgaGainRcal = ADCPGA_1; + temp = 3000.0f/RtiaVolt; + if(temp >= 9.0f) ADCPgaGainRtia = ADCPGA_9; + else if(temp >= 4.0f) ADCPgaGainRtia = ADCPGA_4; + else if(temp >= 2.0f) ADCPgaGainRtia = ADCPGA_2; + else if(temp >= 1.5f) ADCPgaGainRtia = ADCPGA_1P5; + else ADCPgaGainRtia = ADCPGA_1; + GainRatio = ADCPGAGainTable[ADCPgaGainRtia]/ADCPGAGainTable[ADCPgaGainRcal]; + } + reg_afecon = AD5940_ReadReg(REG_AFE_AFECON); + /* INTC configuration */ + INTCCfg = AD5940_INTCGetCfg(AFEINTC_1); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_DFTRDY|AFEINTSRC_SINC2RDY, bTRUE); /* Enable SINC2 Interrupt in INTC1 */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + /* Configure reference system */ + __AD5940_ReferenceON(); + /* Configure DSP */ + AD5940_StructInit(&dsp_cfg, sizeof(dsp_cfg)); + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = bADCClk32MHzMode?ADCRATE_1P6MHZ:ADCRATE_800KHZ; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = pCalCfg->ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = pCalCfg->ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + memcpy(&dsp_cfg.DftCfg, &pCalCfg->DftCfg, sizeof(pCalCfg->DftCfg)); + AD5940_DSPCfgS(&dsp_cfg); + /* Configure LP Loop */ + AD5940_StructInit(&lp_loop, sizeof(lp_loop)); + /* Configure LP Amplifies(LPPA and LPTIA). We won't use LP-PA */ + lp_loop.LpDacCfg.LpdacSel = (pCalCfg->LpAmpSel == LPAMP0)?LPDAC0:LPDAC1; + lp_loop.LpDacCfg.DacData12Bit = 0x800; /* Controlled by WG */ + lp_loop.LpDacCfg.DacData6Bit = 32; /* middle scale value */ + lp_loop.LpDacCfg.DataRst =bFALSE; /* Do not keep DATA registers at reset status */ + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VZERO2HSTIA; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; /* Select internal 2.5V reference */ + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_WG; /* The LPDAC data comes from WG not MMR in this case */ + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_6BIT; /* Connect Vbias signal to 6Bit LPDAC output */ + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_12BIT; /* Connect Vzero signal to 12bit LPDAC output */ + lp_loop.LpDacCfg.PowerEn = bTRUE; /* Power up LPDAC */ + + lp_loop.LpAmpCfg.LpAmpSel = pCalCfg->LpAmpSel; + lp_loop.LpAmpCfg.LpAmpPwrMod = pCalCfg->LpAmpPwrMod; /* Set low power amplifiers to normal power mode */ + lp_loop.LpAmpCfg.LpPaPwrEn = bTRUE; /* Enable LP PA(potential-stat amplifier) power */ + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; /* Enable LPTIA*/ + lp_loop.LpAmpCfg.LpTiaRload = LPTIARLOAD_100R; + lp_loop.LpAmpCfg.LpTiaRtia = pCalCfg->LpTiaRtia; + lp_loop.LpAmpCfg.LpTiaRf = LPTIARF_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(6)|LPTIASW(8)|(pCalCfg->bWithCtia==bTRUE?LPTIASW(5)/*|LPTIASW(9)*/:0); + AD5940_LPLoopCfgS(&lp_loop); + /* Configure HS Loop */ + AD5940_StructInit(&hs_loop, sizeof(hs_loop)); + /* Take care of HSTIA, we need to disconnect internal RTIA because it connects to Tswitch directly. */ + hs_loop.HsTiaCfg.DiodeClose = bFALSE; + hs_loop.HsTiaCfg.HstiaBias = (pCalCfg->LpAmpSel == LPAMP0)?HSTIABIAS_VZERO0:HSTIABIAS_VZERO1; + hs_loop.HsTiaCfg.HstiaCtia = 31; + hs_loop.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaDe1Rload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDe1Rtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_200; + /* Configure HSDAC */ + hs_loop.HsDacCfg.ExcitBufGain = 0; + hs_loop.HsDacCfg.HsDacGain = 0; /* Don't care */ + hs_loop.HsDacCfg.HsDacUpdateRate = 255; /* Lowest for LPDAC */ + + hs_loop.SWMatCfg.Dswitch = SWD_RCAL0|((pCalCfg->LpAmpSel == LPAMP0)?SWD_SE0:SWD_SE1); + hs_loop.SWMatCfg.Pswitch = SWP_RCAL0; + hs_loop.SWMatCfg.Nswitch = SWN_RCAL1; + hs_loop.SWMatCfg.Tswitch = SWT_TRTIA|SWT_RCAL1; + if(bDCMode) + { + int32_t time_out = -1; /* Always wait. */ + int32_t offset_rcal, offset_rtia; + /* Configure WG */ + hs_loop.WgCfg.WgType = WGTYPE_MMR; + hs_loop.WgCfg.WgCode = WgAmpWord; /* Amplitude word is exactly the maximum DC voltage we could use */ + hs_loop.WgCfg.GainCalEn = bFALSE; /* We don't have calibration value for LPDAC, so we don't use it. */ + hs_loop.WgCfg.OffsetCalEn = bFALSE; + AD5940_HSLoopCfgS(&hs_loop); + AD5940_WGDACCodeS(WgAmpWord + 0x800); + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Apply voltage to loop and turn on ADC */ + /* Do offset measurement */ + pSWCfg->Dswitch = SWD_RCAL0;//|SWD_SE0; /* Disconnect SE0 for now to measure the offset voltage. */ + pSWCfg->Pswitch = SWP_RCAL0; + pSWCfg->Nswitch = SWN_RCAL1; + pSWCfg->Tswitch = SWT_TRTIA|SWT_RCAL1; + AD5940_SWMatrixCfgS(pSWCfg); + AD5940_Delay10us(1000); /* Wait some time here. */ + /* Measure RCAL channel voltage offset */ + pADCBaseCfg->ADCMuxN = ADCMUXN_N_NODE; + pADCBaseCfg->ADCMuxP = ADCMUXP_P_NODE; + pADCBaseCfg->ADCPga = ADCPgaGainRcal; + AD5940_ADCBaseCfgS(pADCBaseCfg); + AD5940_Delay10us(50); /* Wait some time here. */ + offset_rcal = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + /* Measure RTIA channel voltage offset */ + if(pCalCfg->LpAmpSel == LPAMP0) + { + pADCBaseCfg->ADCMuxN = ADCMUXN_LPTIA0_N; + pADCBaseCfg->ADCMuxP = ADCMUXP_LPTIA0_P; + }else + { + pADCBaseCfg->ADCMuxN = ADCMUXN_LPTIA1_N; + pADCBaseCfg->ADCMuxP = ADCMUXP_LPTIA1_P; + } + pADCBaseCfg->ADCPga = ADCPgaGainRtia; + AD5940_ADCBaseCfgS(pADCBaseCfg); + AD5940_Delay10us(50); /* Wait some time here. */ + offset_rtia = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + /* Connect LPTIA loop, let current flow to RTIA. */ + pSWCfg->Dswitch = SWD_RCAL0|((pCalCfg->LpAmpSel == LPAMP0)?SWD_SE0:SWD_SE1); + pSWCfg->Pswitch = SWP_RCAL0; + pSWCfg->Nswitch = SWN_RCAL1; + pSWCfg->Tswitch = SWT_TRTIA|SWT_RCAL1; + AD5940_SWMatrixCfgS(pSWCfg); + AD5940_Delay10us(1000); /* Wait some time here. */ + /* Measure RCAL */ + pADCBaseCfg = &dsp_cfg.ADCBaseCfg; + pADCBaseCfg->ADCMuxN = ADCMUXN_N_NODE; + pADCBaseCfg->ADCMuxP = ADCMUXP_P_NODE; + pADCBaseCfg->ADCPga = ADCPgaGainRcal; + AD5940_ADCBaseCfgS(pADCBaseCfg); + AD5940_Delay10us(50); /* Wait some time here. */ + DftRcal.Real = (int32_t)__AD5940_TakeMeasurement(&time_out)- offset_rcal; + DftRcal.Image = 0; + /* Measure RTIA */ + if(pCalCfg->LpAmpSel == LPAMP0) + { + pADCBaseCfg->ADCMuxN = ADCMUXN_LPTIA0_N; + pADCBaseCfg->ADCMuxP = ADCMUXP_LPTIA0_P; + }else + { + pADCBaseCfg->ADCMuxN = ADCMUXN_LPTIA1_N; + pADCBaseCfg->ADCMuxP = ADCMUXP_LPTIA1_P; + } + pADCBaseCfg->ADCPga = ADCPgaGainRtia; + AD5940_ADCBaseCfgS(pADCBaseCfg); + AD5940_Delay10us(50); /* Wait some time here. */ + DftRtia.Real = (int32_t)__AD5940_TakeMeasurement(&time_out)- offset_rtia; + DftRtia.Image = 0; + } + else + { + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = WgAmpWord; + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(pCalCfg->fFreq, pCalCfg->SysClkFreq); + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + hs_loop.WgCfg.WgCode = 0; + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bFALSE; /* disable it */ + hs_loop.WgCfg.OffsetCalEn = bFALSE; + AD5940_HSLoopCfgS(&hs_loop); + AD5940_INTCClrFlag(AFEINTSRC_DFTRDY); + + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR, bTRUE); + AD5940_Delay10us(100); /* Wait for loop stable. */ + pADCBaseCfg = &dsp_cfg.ADCBaseCfg; + /* DFT on RCAL */ + pADCBaseCfg->ADCMuxN = ADCMUXN_N_NODE; + pADCBaseCfg->ADCMuxP = ADCMUXP_P_NODE; + pADCBaseCfg->ADCPga = ADCPgaGainRcal; + AD5940_ADCBaseCfgS(pADCBaseCfg); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_WG, bTRUE); + AD5940_Delay10us(25); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); + /* Wait until DFT ready */ + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_DFTRDY) == bFALSE); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_INTCClrFlag(AFEINTSRC_DFTRDY); + DftRcal.Real = AD5940_ReadAfeResult(AFERESULT_DFTREAL); + DftRcal.Image = AD5940_ReadAfeResult(AFERESULT_DFTIMAGE); + /* DFT on RTIA */ + if(pCalCfg->LpAmpSel == LPAMP0) + { + pADCBaseCfg->ADCMuxN = ADCMUXN_LPTIA0_N; + pADCBaseCfg->ADCMuxP = ADCMUXP_LPTIA0_P; + }else + { + pADCBaseCfg->ADCMuxN = ADCMUXN_LPTIA1_N; + pADCBaseCfg->ADCMuxP = ADCMUXP_LPTIA1_P; + } + pADCBaseCfg->ADCPga = ADCPgaGainRtia; + AD5940_ADCBaseCfgS(pADCBaseCfg); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_WG, bTRUE); + AD5940_Delay10us(25); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); + /* Wait until DFT ready */ + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_DFTRDY) == bFALSE); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_INTCClrFlag(AFEINTSRC_DFTRDY); + DftRtia.Real = AD5940_ReadAfeResult(AFERESULT_DFTREAL); + DftRtia.Image = AD5940_ReadAfeResult(AFERESULT_DFTIMAGE); + if(DftRcal.Real&(1L<<17)) + DftRcal.Real |= 0xfffc0000; + if(DftRcal.Image&(1L<<17)) + DftRcal.Image |= 0xfffc0000; + if(DftRtia.Real&(1L<<17)) + DftRtia.Real |= 0xfffc0000; + if(DftRtia.Image&(1L<<17)) + DftRtia.Image |= 0xfffc0000; + } + /* + The impedance engine inside of AD594x give us Real part and Imaginary part of DFT. Due to technology used, the Imaginary + part in register is the opposite number. So we add a negative sign on the Imaginary part of results. + */ + DftRtia.Image = -DftRtia.Image; + DftRcal.Image = -DftRcal.Image; + + fImpCar_Type res; + /* RTIA = (DftRtia.Real, DftRtia.Image)/(DftRcal.Real, DftRcal.Image)*fRcal */ + res = AD5940_ComplexDivInt(&DftRtia, &DftRcal); + res.Real *= pCalCfg->fRcal/GainRatio; + res.Image *= pCalCfg->fRcal/GainRatio; + if(pCalCfg->bPolarResult == bFALSE) + { + ((fImpCar_Type*)pResult)->Real = res.Real; + ((fImpCar_Type*)pResult)->Image = res.Image; + } + else + { + ((fImpPol_Type*)pResult)->Magnitude = AD5940_ComplexMag(&res); + ((fImpPol_Type*)pResult)->Phase = AD5940_ComplexPhase(&res); + } + + /* Restore INTC1 DFT configure */ + if(INTCCfg&AFEINTSRC_DFTRDY); + else + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_DFTRDY, bFALSE); /* Disable DFT Interrupt */ + if(INTCCfg&AFEINTSRC_SINC2RDY); + else + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bFALSE); /* Disable SINC2 Interrupt */ + AD5940_WriteReg(REG_AFE_AFECON, reg_afecon); /* Restore AFECON register */ + /* Open all switches in switch-matrix */ + hs_loop.SWMatCfg.Dswitch = SWD_OPEN; + hs_loop.SWMatCfg.Pswitch = SWP_OPEN; + hs_loop.SWMatCfg.Nswitch = SWN_OPEN; + hs_loop.SWMatCfg.Tswitch = SWT_OPEN; + AD5940_SWMatrixCfgS(&hs_loop.SWMatCfg); + + return AD5940ERR_OK; +} + +/** + * @brief calibrate HSDAC output voltage using ADC. + * @note It acutally calibrates voltage output of excitation buffer. + * @param pCalCfg: pointer to configuration structure + * @return return AD5940ERR_OK if succeeded. +*/ +AD5940Err AD5940_HSDACCal(HSDACCal_Type *pCalCfg) +{ + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + HSLoopCfg_Type hsloop_cfg; + LPLoopCfg_Type lploop_cfg; + + /* LSB_Numerator and LSB_Denometer are used to calculate + the codes to write to calibration registers depending on + which calibration register is used + There are LSB_Numerator ADC LSBs in + LSB_Denominator DAC Calibration LSBs*/ + int32_t LSB_Numerator; + int32_t LEB_Denominator; + int32_t time_out; + int32_t ADCCode; + uint32_t HSDACCode = 0x800; /* Mid scale DAC */ + + uint32_t regaddr_offset; + uint32_t ADCPGA_Sel; + BoolFlag bHPMode; + + if(pCalCfg == NULL) return AD5940ERR_NULLP; + if(pCalCfg->ExcitBufGain > 1) return AD5940ERR_PARA; + if(pCalCfg->HsDacGain > 1) return AD5940ERR_PARA; + + bHPMode = pCalCfg->AfePwrMode == AFEPWR_HP?bTRUE:bFALSE; + + switch(pCalCfg->ExcitBufGain) + { + case EXCITBUFGAIN_2: + regaddr_offset = bHPMode?REG_AFE_DACOFFSETHP:REG_AFE_DACOFFSET; + if(pCalCfg->HsDacGain == HSDACGAIN_0P2) + { + LSB_Numerator = 40; + LEB_Denominator = 14; + ADCPGA_Sel = ADCPGA_4; + } + else + { + LSB_Numerator = 7; + LEB_Denominator = 2; + ADCPGA_Sel = ADCPGA_1; + } + break; + case EXCITBUFGAIN_0P25: + regaddr_offset = bHPMode?REG_AFE_DACOFFSETATTENHP:REG_AFE_DACOFFSETATTEN; + if(pCalCfg->HsDacGain == HSDACGAIN_0P2) + { + LSB_Numerator = 5; + LEB_Denominator = 14; + } + else + { + LSB_Numerator = 25; + LEB_Denominator = 14; + } + ADCPGA_Sel = ADCPGA_4; + break; + default: + return AD5940ERR_PARA; + } + + /* Turn On References*/ + __AD5940_ReferenceON(); + /* Step0.0 Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH. Use SIN2 data for calibration-->Lower noise */ + adc_filter.ADCSinc3Osr = pCalCfg->ADCSinc3Osr; + adc_filter.ADCSinc2Osr = pCalCfg->ADCSinc2Osr; /* 800KSPS/4/1333 = 150SPS */ + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = bHPMode?ADCRATE_1P6MHZ:ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + /* Step0.1 Initialize ADC basic function */ + adc_base.ADCMuxP = ADCMUXP_P_NODE; + adc_base.ADCMuxN = ADCMUXN_N_NODE; + adc_base.ADCPga = ADCPGA_Sel; + AD5940_ADCBaseCfgS(&adc_base); + + /* Step0.2 Configure LPDAC to connect VZERO to HSTIA */ + lploop_cfg.LpDacCfg.LpdacSel = LPDAC0; + lploop_cfg.LpDacCfg.DacData12Bit = 0x7C0; + lploop_cfg.LpDacCfg.DacData6Bit = 0x1F; + lploop_cfg.LpDacCfg.DataRst = bFALSE; + lploop_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; + lploop_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lploop_cfg.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lploop_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lploop_cfg.LpDacCfg.PowerEn = bTRUE; + lploop_cfg.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2HSTIA; + AD5940_LPLoopCfgS(&lploop_cfg); + + /* Step0.3 Configure HSLOOP */ + hsloop_cfg.HsDacCfg.ExcitBufGain = pCalCfg->ExcitBufGain; + hsloop_cfg.HsDacCfg.HsDacGain = pCalCfg->HsDacGain; + hsloop_cfg.HsDacCfg.HsDacUpdateRate = bHPMode?0x7:0x1B; + hsloop_cfg.HsTiaCfg.DiodeClose = bFALSE; + hsloop_cfg.HsTiaCfg.HstiaBias = HSTIABIAS_VZERO0; + hsloop_cfg.HsTiaCfg.HstiaCtia = 8; + hsloop_cfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hsloop_cfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hsloop_cfg.HsTiaCfg.HstiaDe1Rload = HSTIADERLOAD_OPEN; + hsloop_cfg.HsTiaCfg.HstiaDe1Rtia = HSTIADERTIA_OPEN; + hsloop_cfg.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_200; + hsloop_cfg.SWMatCfg.Dswitch = SWD_RCAL0; + hsloop_cfg.SWMatCfg.Pswitch = SWP_RCAL0; + hsloop_cfg.SWMatCfg.Nswitch = SWN_RCAL1; + hsloop_cfg.SWMatCfg.Tswitch = SWT_TRTIA|SWT_RCAL1; + hsloop_cfg.WgCfg.GainCalEn = bTRUE; + hsloop_cfg.WgCfg.OffsetCalEn = bTRUE; + hsloop_cfg.WgCfg.WgType = WGTYPE_MMR; + hsloop_cfg.WgCfg.WgCode = HSDACCode; + AD5940_HSLoopCfgS(&hsloop_cfg); + /* Step0.4 Turn ON reference and ADC power, and DAC power and DAC reference. We use DAC 1.8V reference to calibrate ADC. */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Disable all */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_HPREFPWR|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|AFECTRL_SINC2NOTCH|\ + AFECTRL_EXTBUFPWR|AFECTRL_INAMPPWR|AFECTRL_HSTIAPWR|AFECTRL_WG, bTRUE); + AD5940_Delay10us(25); /* Wait 250us for reference power up */ + /* Step0.5 INTC configure and open calibration lock */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bTRUE); /* Enable SINC2 Interrupt in INTC1 */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, KEY_CALDATLOCK); /* Unlock KEY */ + /* Reset Offset register before calibration */ + AD5940_WriteReg(regaddr_offset, 0); + /* Update HSDACDAT after resetting calibration register */ + AD5940_WriteReg(REG_AFE_HSDACDAT, 0x800); + /* Step1: Do offset calibration. */ + { + int32_t ExpectedCode = 0x8000; /* Ideal ADC output */ + AD5940_Delay10us(10); + time_out = 1000; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); +#ifdef ADI_DEBUG + ADI_Print("Voltage before cal: %f \n", AD5940_ADCCode2Volt(ADCCode, ADCPGA_Sel, 1.82)); +#endif + + if(time_out == 0) goto DACCALERROR_TIMEOUT; /* Time out error. */ + ADCCode = ADCCode - ExpectedCode; + ADCCode = (((ADCCode)*LEB_Denominator)/LSB_Numerator); + if(ADCCode>0) + ADCCode = 0xFFF - ADCCode; + else + ADCCode = -ADCCode; + AD5940_WriteReg(regaddr_offset, ADCCode); + AD5940_Delay10us(10); + AD5940_WriteReg(REG_AFE_HSDACDAT, 0x800); + AD5940_Delay10us(10); +#ifdef ADI_DEBUG + ADCCode = __AD5940_TakeMeasurement(&time_out); + ADI_Print("Voltage after cal: %f \n", AD5940_ADCCode2Volt(ADCCode, ADCPGA_Sel, 1.82)); +#endif + } + AD5940_WriteReg(REG_AFE_CALDATLOCK, 0); /* Lock KEY */ + return AD5940ERR_OK; +DACCALERROR_TIMEOUT: + AD5940_ADCConvtCtrlS(bFALSE); /* Stop conversion */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, 0); /* Lock KEY */ + return AD5940ERR_TIMEOUT; +} + +/** + * @brief Use ADC to measure LPDAC offset and gain factor. + * @note Assume ADC is accurate enough or accurate than LPDAC at least. + * @param pCalCfg: pointer to structure. + * @param pResult: the pointer to save calibration result. + * @return AD5940ERR_OK if succeed. +**/ +AD5940Err AD5940_LPDACCal(LPDACCal_Type *pCalCfg, LPDACPara_Type *pResult) +{ + AD5940Err error = AD5940ERR_OK; + LPDACCfg_Type LpDacCfg; + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + + int32_t time_out; + uint32_t INTCCfg; + int32_t ADCCode, ADCCodeVref1p1; + BoolFlag bADCClk32MHzMode; + + if(pCalCfg == NULL) return AD5940ERR_NULLP; + if(pResult == NULL) return AD5940ERR_NULLP; + if(pCalCfg->AdcClkFreq > (32000000*0.8)) + bADCClk32MHzMode = bTRUE; + + /* Step0: Do initialization */ + /* Turn on AD5940 references in case it's disabled. */ + __AD5940_ReferenceON(); + LpDacCfg.LpdacSel = pCalCfg->LpdacSel; + LpDacCfg.DacData12Bit = 0; + LpDacCfg.DacData6Bit = 0; + LpDacCfg.DataRst = bFALSE; + LpDacCfg.LpDacRef = LPDACREF_2P5; + LpDacCfg.LpDacSrc = LPDACSRC_MMR; + LpDacCfg.LpDacSW = LPDACSW_VBIAS2PIN|LPDACSW_VZERO2PIN; + LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + LpDacCfg.PowerEn = bTRUE; + AD5940_LPDACCfgS(&LpDacCfg); + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH. Use SIN2 data for calibration-->Lower noise */ + adc_filter.ADCSinc3Osr = pCalCfg->ADCSinc3Osr; + adc_filter.ADCSinc2Osr = pCalCfg->ADCSinc2Osr; /* 800KSPS/4/1333 = 150SPS */ + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = bADCClk32MHzMode?ADCRATE_1P6MHZ:ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + /* Initialize ADC MUx and PGA */ + adc_base.ADCMuxP = ADCMUXP_AGND; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + adc_base.ADCPga = ADCPGA_1; + AD5940_ADCBaseCfgS(&adc_base); + /* Turn ON ADC and its reference. And SINC2. */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Disable all firstly, we only enable things we use */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_HPREFPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_Delay10us(25); /* Wait 250us for reference power up */ + /* INTC configure and open calibration lock */ + INTCCfg = AD5940_INTCGetCfg(AFEINTC_1); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bTRUE); /* Enable SINC2 Interrupt in INTC1 */ + /* Step1: Measure internal 1.1V reference. */ + { + //AD5940_ADCMuxCfgS(ADCMUXP_AGND, ADCMUXN_VSET1P1); + time_out = pCalCfg->TimeOut10us; /* Reset time out counter */ + ADCCodeVref1p1 = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) + { + error = AD5940ERR_TIMEOUT; + goto LPDACCALERROR; + } /* Time out error. */ + /* Equation1: ADCCodeVref1p1 = AGND - Vref1p1 */ + } + /* Step2: Do offset measurement. */ + { + /* Equation2': ADCCode = Vbias0/1 - Vref1p1 */ + AD5940_LPDACWriteS(0,0); /* Set LPDAC output voltage to 0.2V(zero code) */ + if(pCalCfg->SettleTime10us > 0) + AD5940_Delay10us(pCalCfg->SettleTime10us); /* Delay nx10us */ + if(pCalCfg->LpdacSel == LPDAC0) + AD5940_ADCMuxCfgS(ADCMUXP_VBIAS0, ADCMUXN_VREF1P1); /* Vbias0 is routed to 12BIT LPDAC */ + else + AD5940_ADCMuxCfgS(ADCMUXP_VBIAS1, ADCMUXN_VREF1P1); /* Vbias1 is routed to 12BIT LPDAC */ + + AD5940_Delay10us(5); /* Delay 50us */ + time_out = pCalCfg->TimeOut10us; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) + { + error = AD5940ERR_TIMEOUT; + goto LPDACCALERROR; + } /* Time out error. */ + /* Calculate the offset voltage using Equation2 - Equation1 */ + ADCCode -= ADCCodeVref1p1; /* Get the code of Vbias0-AGND. Then calculate the offset voltage in mV. */ + pResult->bC2V_DAC12B = ADCCode*pCalCfg->ADCRefVolt*1e3f/32768*1.835f/1.82f; /*mV unit*/ + /* Measure 6BIT DAC output(Vzero0/1) */ + if(pCalCfg->LpdacSel == LPDAC0) + AD5940_ADCMuxCfgS(ADCMUXP_VZERO0, ADCMUXN_VREF1P1); /* Vbias0 is routed to 12BIT LPDAC */ + else + AD5940_ADCMuxCfgS(ADCMUXP_VZERO1, ADCMUXN_VREF1P1); /* Vbias1 is routed to 12BIT LPDAC */ + AD5940_Delay10us(5); /* Delay 50us */ + time_out = pCalCfg->TimeOut10us; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) + { + error = AD5940ERR_TIMEOUT; + goto LPDACCALERROR; + } /* Time out error. */ + /* Calculate the offset voltage */ + ADCCode -= ADCCodeVref1p1; /* Get the code of Vbias0-AGND. Then calculate the offset voltage in mV. */ + pResult->bC2V_DAC6B = ADCCode*pCalCfg->ADCRefVolt*1e3f/32768*1.835f/1.82f; /*mV unit*/ + } + /* Step3: Do gain measurement */ + { + /* Equation2: ADCCode = Vbias0 - Vref1p1 */ + AD5940_LPDACWriteS(0xfff,0x3f); /* Set LPDAC output voltage to 2.4V(zero code) */ + if(pCalCfg->SettleTime10us > 0) + AD5940_Delay10us(pCalCfg->SettleTime10us); /* Delay nx10us */ + if(pCalCfg->LpdacSel == LPDAC0) + AD5940_ADCMuxCfgS(ADCMUXP_VBIAS0, ADCMUXN_VREF1P1); /* Vbias0 is routed to 12BIT LPDAC */ + else + AD5940_ADCMuxCfgS(ADCMUXP_VBIAS1, ADCMUXN_VREF1P1); /* Vbias1 is routed to 12BIT LPDAC */ + AD5940_Delay10us(5); /* Delay 50us */ + time_out = pCalCfg->TimeOut10us; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) + { + error = AD5940ERR_TIMEOUT; + goto LPDACCALERROR; + } /* Time out error. */ + /* Calculate the offset voltage */ + ADCCode -= ADCCodeVref1p1; /* Get the code of Vbias0-AGND. Then calculate the gain factor 'k'. */ + pResult->kC2V_DAC12B = (ADCCode*pCalCfg->ADCRefVolt*1e3f/32768*1.835f/1.82f - pResult->bC2V_DAC12B)/0xfff;/*mV unit*/ + /* Measure 6BIT DAC output(Vzero0) */ + if(pCalCfg->LpdacSel == LPDAC0) + AD5940_ADCMuxCfgS(ADCMUXP_VZERO0, ADCMUXN_VREF1P1); /* Vbias0 is routed to 12BIT LPDAC */ + else + AD5940_ADCMuxCfgS(ADCMUXP_VZERO1, ADCMUXN_VREF1P1); /* Vbias1 is routed to 12BIT LPDAC */ + AD5940_Delay10us(5); /* Delay 50us */ + time_out = pCalCfg->TimeOut10us; /* Reset time out counter */ + ADCCode = __AD5940_TakeMeasurement(&time_out); /* Turn on ADC to get one valid data and then turn off ADC. */ + if(time_out == 0) + { + error = AD5940ERR_TIMEOUT; + goto LPDACCALERROR; + } /* Time out error. */ + /* Calculate the offset voltage */ + ADCCode -= ADCCodeVref1p1; /* Get the code of Vbias0-AGND. Then calculate the offset voltage in mV. */ + pResult->kC2V_DAC6B = (ADCCode*pCalCfg->ADCRefVolt*1e3f/32768*1.835f/1.82f - pResult->bC2V_DAC6B)/0x3f;/*mV unit*/ + } + /* Step4: calculate the parameters for voltage to code calculation. */ + pResult->kV2C_DAC12B = 1/pResult->kC2V_DAC12B; + pResult->bV2C_DAC12B = -pResult->bC2V_DAC12B/pResult->kC2V_DAC12B; + pResult->kV2C_DAC6B = 1/pResult->kC2V_DAC6B; + pResult->bV2C_DAC6B = -pResult->bC2V_DAC6B/pResult->kC2V_DAC6B; + /* Restore INTC1 SINC2 configure */ + if(INTCCfg&AFEINTSRC_SINC2RDY); + else + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bFALSE); /* Disable SINC2 Interrupt */ + /* Done */ + return AD5940ERR_OK; + +LPDACCALERROR: + AD5940_ADCConvtCtrlS(bFALSE); /* Stop conversion */ + return error; +} + +/** + * @brief Use system clock to measure LFOSC frequency. + * @note Set system clock to external crystal to get a better measurement accuracy. + * This function use 3 sequences and the start address is specified by parameter. + * @param pCfg: pointer to structure. + * @param pFreq: Pointer to a variable that used to store frequency in Hz. + * @return AD5940ERR_OK if succeed. +**/ +AD5940Err AD5940_LFOSCMeasure(LFOSCMeasure_Type *pCfg, float *pFreq) /* Measure current LFOSC frequency. */ +{ + /** + * @code + * Sleep wakeup timer running... + * -SLP----WKP----SLP----WKP----SLP----WKP + * --|-----|-------------|-------------|------------Trigger sequencer when Wakeup Timer over. + * --------|SEQA---------|SEQB----------------------Execute SeqA then SeqB + * ---------|InitT--------|StopT--------------------SeqA start timer and SeqB trigger interrupt so MCU read back current count + * ------------------------|INT--------------------- + * -----------------------------------------|Read---We read SEQTIMEOUT register here + * ---------|-----TimerCount----------------|------- + * ---------|--------------|---TimerCount2--|-------We change SeqB to reset timer so we measure how much time needed for MCU to read back SEQTIMEOUT register(TimerCount2) + * @endcode + * **/ + uint32_t TimerCount, TimerCount2; + SEQCfg_Type seq_cfg, seq_cfg_backup; + SEQInfo_Type seqinfo; + WUPTCfg_Type wupt_cfg; + uint32_t INTCCfg; + uint32_t WuptPeriod; + + static const uint32_t SeqA[]= + { + SEQ_TOUT(0x3fffffff), /* Set time-out timer. It will always run until disable Sequencer by SPI interface. */ + }; + static const uint32_t SeqB[]= + { + /** + * Interrupt flag AFEINTSRC_ENDSEQ will be set after this command. So We can inform MCU to read back + * current timer value. MCU will need some additional time to read back time count. + * So we use SeqB to measure how much time needed for MCU to read back + * */ + SEQ_STOP(), + }; + static const uint32_t SeqBB[]= + { + SEQ_TOUT(0x3fffffff), /* Re-Set time-out timer, so we can measure the time needed for MCU to read out Timer Count register. */ + SEQ_STOP(), /* Interrupt flag AFEINTSRC_ENDSEQ will be set here */ + }; + + if(pCfg == NULL) return AD5940ERR_NULLP; + if(pFreq == NULL) return AD5940ERR_NULLP; + if(pCfg->CalDuration < 1.0f) + return AD5940ERR_PARA; + AD5940_SEQGetCfg(&seq_cfg_backup); + INTCCfg = AD5940_INTCGetCfg(AFEINTC_1); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ENDSEQ, bTRUE); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bFALSE; + seq_cfg.SeqEnable = bTRUE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + + seqinfo.pSeqCmd = SeqA; + seqinfo.SeqId = SEQID_0; + seqinfo.SeqLen = SEQ_LEN(SeqA); + seqinfo.SeqRamAddr = pCfg->CalSeqAddr; + seqinfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo); + seqinfo.SeqId = SEQID_1; + seqinfo.SeqRamAddr = pCfg->CalSeqAddr + SEQ_LEN(SeqA) ; + seqinfo.SeqLen = SEQ_LEN(SeqB); + seqinfo.pSeqCmd = SeqB; + AD5940_SEQInfoCfg(&seqinfo); /* Configure sequence0 and sequence1 with command SeqA and SeqB */ + + wupt_cfg.WuptEn = bFALSE; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.WuptOrder[1] = SEQID_1; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_B; + wupt_cfg.SeqxWakeupTime[0] = 4; /* Don't care. >4 is acceptable */ + wupt_cfg.SeqxSleepTime[0] = (uint32_t)((pCfg->CalDuration)*32 + 0.5f) - 1 - 4; + wupt_cfg.SeqxWakeupTime[1] = 4-1; + wupt_cfg.SeqxSleepTime[1] = 0xffffffff; /* Don't care */ + WuptPeriod = (wupt_cfg.SeqxSleepTime[0]+1) + (wupt_cfg.SeqxWakeupTime[1]+1); + AD5940_WUPTCfg(&wupt_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + AD5940_WUPTCtrl(bTRUE); + + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + TimerCount = AD5940_SEQTimeOutRd(); + + AD5940_WUPTCtrl(bFALSE); + AD5940_WUPTTime(SEQID_0, 4, 4); /* Set it to minimum value because we don't care about sequence0 now. We only want to measure how much time MCU will need to read register */ + seqinfo.SeqId = SEQID_1; + seqinfo.SeqRamAddr = pCfg->CalSeqAddr + SEQ_LEN(SeqA) ; + seqinfo.SeqLen = SEQ_LEN(SeqBB); + seqinfo.pSeqCmd = SeqBB; + seqinfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo); + AD5940_SEQCtrlS(bTRUE); /* Enable Sequencer again */ + + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + AD5940_WUPTCtrl(bTRUE); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + TimerCount2 = AD5940_SEQTimeOutRd(); + AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_ENDSEQ); + + AD5940_WUPTCtrl(bFALSE); + AD5940_SEQCfg(&seq_cfg_backup); /* restore sequencer configuration */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ENDSEQ, (INTCCfg&AFEINTSRC_ENDSEQ)?bTRUE:bFALSE); /* Restore interrupt configuration */ + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + //printf("Time duration:%d ", (TimerCount2 - TimerCount)); + *pFreq = pCfg->SystemClkFreq*WuptPeriod/(TimerCount2 - TimerCount); + return AD5940ERR_OK; +} + +/** + * @} Calibration + * @} Calibration_Block +*/ + +/** + * @} AD5940_Functions + * @} AD5940_Library +*/ diff --git a/examples/AD5940_BATImpedance/ad5940.h b/examples/AD5940_BATImpedance/ad5940.h new file mode 100644 index 0000000..d856dba --- /dev/null +++ b/examples/AD5940_BATImpedance/ad5940.h @@ -0,0 +1,4933 @@ +/** + * @file ad5940.h + * @brief AD5940 library. This file contains all AD5940 library functions. + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#ifndef _AD5940_H_ +#define _AD5940_H_ +#include "math.h" +#include "string.h" +#include "stdio.h" +/** @addtogroup AD5940_Library + * @{ + */ + +/** + * Select the correct chip. + * Recommend to define this in your compiler. + * */ +//#define CHIPSEL_M355 /**< ADuCM355 */ +//#define CHIPSEL_594X /**< AD5940 or AD5941 */ + +/* library version number */ +#define AD5940LIB_VER_MAJOR 0 /**< Major number */ +#define AD5940LIB_VER_MINOR 2 /**< Minor number */ +#define AD5940LIB_VER_PATCH 1 /**< Path number */ +#define AD5940LIB_VER (AD5940LIB_VER_MAJOR<<16)|(AD5940LIB_VER_MINOR<<8)|(AD5940LIB_VER_PATCH) + +//#define ADI_DEBUG /**< Comment this line to remove debug info. */ + +#ifdef ADI_DEBUG +#define ADI_Print printf /**< Select the method to print out debug message */ +#endif + +#if defined(CHIPSEL_M355) && defined(CHIPSEL_594X) +#error Please select the correct chip by define CHIPSEL_M355 or CHIPSEL_594X. +#endif + +#if !defined(CHIPSEL_M355) && !defined(CHIPSEL_594X) +#error Please select the correct chip by define CHIPSEL_M355 or CHIPSEL_594X. +#endif + +/** + * @cond + * @defgroup AD5940RegistersBitfields + * @brief All AD5940 registers and bitfields definition. + * @{ +*/ +//#if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__)) +#include +//#endif /* _LANGUAGE_C */ + +#ifndef __ADI_GENERATED_DEF_HEADERS__ +#define __ADI_GENERATED_DEF_HEADERS__ 1 +#endif + +#define __ADI_HAS_AGPIO__ 1 +#define __ADI_HAS_ALLON__ 1 +#define __ADI_HAS_INTC__ 1 +#define __ADI_HAS_AFECON__ 1 +#define __ADI_HAS_WUPTMR__ 1 +#define __ADI_HAS_AFE__ 1 + +/* ============================================================================================================================ + GPIO + ============================================================================================================================ */ + +/* ============================================================================================================================ + AGPIO + ============================================================================================================================ */ +#define REG_AGPIO_GP0CON_RESET 0x00000000 /* Reset Value for GP0CON */ +#define REG_AGPIO_GP0CON 0x00000000 /* AGPIO GPIO Port 0 Configuration */ +#define REG_AGPIO_GP0OEN_RESET 0x00000000 /* Reset Value for GP0OEN */ +#define REG_AGPIO_GP0OEN 0x00000004 /* AGPIO GPIO Port 0 Output Enable */ +#define REG_AGPIO_GP0PE_RESET 0x00000000 /* Reset Value for GP0PE */ +#define REG_AGPIO_GP0PE 0x00000008 /* AGPIO GPIO Port 0 Pullup/Pulldown Enable */ +#define REG_AGPIO_GP0IEN_RESET 0x00000000 /* Reset Value for GP0IEN */ +#define REG_AGPIO_GP0IEN 0x0000000C /* AGPIO GPIO Port 0 Input Path Enable */ +#define REG_AGPIO_GP0IN_RESET 0x00000000 /* Reset Value for GP0IN */ +#define REG_AGPIO_GP0IN 0x00000010 /* AGPIO GPIO Port 0 Registered Data Input */ +#define REG_AGPIO_GP0OUT_RESET 0x00000000 /* Reset Value for GP0OUT */ +#define REG_AGPIO_GP0OUT 0x00000014 /* AGPIO GPIO Port 0 Data Output */ +#define REG_AGPIO_GP0SET_RESET 0x00000000 /* Reset Value for GP0SET */ +#define REG_AGPIO_GP0SET 0x00000018 /* AGPIO GPIO Port 0 Data Out Set */ +#define REG_AGPIO_GP0CLR_RESET 0x00000000 /* Reset Value for GP0CLR */ +#define REG_AGPIO_GP0CLR 0x0000001C /* AGPIO GPIO Port 0 Data Out Clear */ +#define REG_AGPIO_GP0TGL_RESET 0x00000000 /* Reset Value for GP0TGL */ +#define REG_AGPIO_GP0TGL 0x00000020 /* AGPIO GPIO Port 0 Pin Toggle */ + +/* ============================================================================================================================ + AGPIO Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0CON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0CON_PIN7CFG 14 /* P0.7 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN6CFG 12 /* P0.6 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN5CFG 10 /* P0.5 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN4CFG 8 /* P0.4 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN3CFG 6 /* P0.3 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN2CFG 4 /* P0.2 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN1CFG 2 /* P0.1 Configuration Bits */ +#define BITP_AGPIO_GP0CON_PIN0CFG 0 /* P0.0 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN7CFG 0x0000C000 /* P0.7 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN6CFG 0x00003000 /* P0.6 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN5CFG 0x00000C00 /* P0.5 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN4CFG 0x00000300 /* P0.4 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN3CFG 0x000000C0 /* P0.3 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN2CFG 0x00000030 /* P0.2 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN1CFG 0x0000000C /* P0.1 Configuration Bits */ +#define BITM_AGPIO_GP0CON_PIN0CFG 0x00000003 /* P0.0 Configuration Bits */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0OEN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0OEN_OEN 0 /* Pin Output Drive Enable */ +#define BITM_AGPIO_GP0OEN_OEN 0x000000FF /* Pin Output Drive Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0PE Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0PE_PE 0 /* Pin Pull Enable */ +#define BITM_AGPIO_GP0PE_PE 0x000000FF /* Pin Pull Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0IEN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0IEN_IEN 0 /* Input Path Enable */ +#define BITM_AGPIO_GP0IEN_IEN 0x000000FF /* Input Path Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0IN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0IN_IN 0 /* Registered Data Input */ +#define BITM_AGPIO_GP0IN_IN 0x000000FF /* Registered Data Input */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0OUT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0OUT_OUT 0 /* Data Out */ +#define BITM_AGPIO_GP0OUT_OUT 0x000000FF /* Data Out */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0SET Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0SET_SET 0 /* Set the Output HIGH */ +#define BITM_AGPIO_GP0SET_SET 0x000000FF /* Set the Output HIGH */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0CLR Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0CLR_CLR 0 /* Set the Output LOW */ +#define BITM_AGPIO_GP0CLR_CLR 0x000000FF /* Set the Output LOW */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPIO_GP0TGL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPIO_GP0TGL_TGL 0 /* Toggle the Output */ +#define BITM_AGPIO_GP0TGL_TGL 0x000000FF /* Toggle the Output */ + + +/* ============================================================================================================================ + + ============================================================================================================================ */ + +/* ============================================================================================================================ + AFECON + ============================================================================================================================ */ +#define REG_AFECON_ADIID_RESET 0x00000000 /* Reset Value for ADIID */ +#define REG_AFECON_ADIID 0x00000400 /* AFECON ADI Identification */ +#define REG_AFECON_CHIPID_RESET 0x00000000 /* Reset Value for CHIPID */ +#define REG_AFECON_CHIPID 0x00000404 /* AFECON Chip Identification */ +#define REG_AFECON_CLKCON0_RESET 0x00000441 /* Reset Value for CLKCON0 */ +#define REG_AFECON_CLKCON0 0x00000408 /* AFECON Clock Divider Configuration */ +#define REG_AFECON_CLKEN1_RESET 0x000002C0 /* Reset Value for CLKEN1 */ +#define REG_AFECON_CLKEN1 0x00000410 /* AFECON Clock Gate Enable */ +#define REG_AFECON_CLKSEL_RESET 0x00000000 /* Reset Value for CLKSEL */ +#define REG_AFECON_CLKSEL 0x00000414 /* AFECON Clock Select */ +#define REG_AFECON_CLKCON0KEY_RESET 0x00000000 /* Reset Value for CLKCON0KEY */ +#define REG_AFECON_CLKCON0KEY 0x00000420 /* AFECON Enable Clock Division to 8Mhz,4Mhz and 2Mhz */ +#define REG_AFECON_SWRSTCON_RESET 0x00000001 /* Reset Value for SWRSTCON */ +#define REG_AFECON_SWRSTCON 0x00000424 /* AFECON Software Reset */ +#define REG_AFECON_TRIGSEQ_RESET 0x00000000 /* Reset Value for TRIGSEQ */ +#define REG_AFECON_TRIGSEQ 0x00000430 /* AFECON Trigger Sequence */ + +/* ============================================================================================================================ + AFECON Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_ADIID Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_ADIID_ADIID 0 /* ADI Identifier. */ +#define BITM_AFECON_ADIID_ADIID 0x0000FFFF /* ADI Identifier. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_CHIPID Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_CHIPID_PARTID 4 /* Part Identifier */ +#define BITP_AFECON_CHIPID_REVISION 0 /* Silicon Revision Number */ +#define BITM_AFECON_CHIPID_PARTID 0x0000FFF0 /* Part Identifier */ +#define BITM_AFECON_CHIPID_REVISION 0x0000000F /* Silicon Revision Number */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_CLKCON0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_CLKCON0_SFFTCLKDIVCNT 10 /* SFFT Clock Divider Configuration */ +#define BITP_AFECON_CLKCON0_ADCCLKDIV 6 /* ADC Clock Divider Configuration */ +#define BITP_AFECON_CLKCON0_SYSCLKDIV 0 /* System Clock Divider Configuration */ +#define BITM_AFECON_CLKCON0_SFFTCLKDIVCNT 0x0000FC00 /* SFFT Clock Divider Configuration */ +#define BITM_AFECON_CLKCON0_ADCCLKDIV 0x000003C0 /* ADC Clock Divider Configuration */ +#define BITM_AFECON_CLKCON0_SYSCLKDIV 0x0000003F /* System Clock Divider Configuration */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_CLKEN1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_CLKEN1_GPT1DIS 7 /* GPT1 Clock Enable */ +#define BITP_AFECON_CLKEN1_GPT0DIS 6 /* GPT0 Clock Enable */ +#define BITP_AFECON_CLKEN1_ACLKDIS 5 /* ACLK Clock Enable */ +#define BITM_AFECON_CLKEN1_GPT1DIS 0x00000080 /* GPT1 Clock Enable */ +#define BITM_AFECON_CLKEN1_GPT0DIS 0x00000040 /* GPT0 Clock Enable */ +#define BITM_AFECON_CLKEN1_ACLKDIS 0x00000020 /* ACLK Clock Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_CLKSEL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_CLKSEL_ADCCLKSEL 2 /* Select ADC Clock Source */ +#define BITP_AFECON_CLKSEL_SYSCLKSEL 0 /* Select System Clock Source */ +#define BITM_AFECON_CLKSEL_ADCCLKSEL 0x0000000C /* Select ADC Clock Source */ +#define BITM_AFECON_CLKSEL_SYSCLKSEL 0x00000003 /* Select System Clock Source */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_CLKCON0KEY Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_CLKCON0KEY_DIVSYSCLK_ULP_EN 0 /* Enable Clock Division to 8Mhz,4Mhz and 2Mhz */ +#define BITM_AFECON_CLKCON0KEY_DIVSYSCLK_ULP_EN 0x0000FFFF /* Enable Clock Division to 8Mhz,4Mhz and 2Mhz */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_SWRSTCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_SWRSTCON_SWRSTL 0 /* Software Reset */ +#define BITM_AFECON_SWRSTCON_SWRSTL 0x0000FFFF /* Software Reset */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECON_TRIGSEQ Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECON_TRIGSEQ_TRIG3 3 /* Trigger Sequence 3 */ +#define BITP_AFECON_TRIGSEQ_TRIG2 2 /* Trigger Sequence 2 */ +#define BITP_AFECON_TRIGSEQ_TRIG1 1 /* Trigger Sequence 1 */ +#define BITP_AFECON_TRIGSEQ_TRIG0 0 /* Trigger Sequence 0 */ +#define BITM_AFECON_TRIGSEQ_TRIG3 0x00000008 /* Trigger Sequence 3 */ +#define BITM_AFECON_TRIGSEQ_TRIG2 0x00000004 /* Trigger Sequence 2 */ +#define BITM_AFECON_TRIGSEQ_TRIG1 0x00000002 /* Trigger Sequence 1 */ +#define BITM_AFECON_TRIGSEQ_TRIG0 0x00000001 /* Trigger Sequence 0 */ + +/* ============================================================================================================================ + AFEWDT + ============================================================================================================================ */ +#define REG_AFEWDT_WDTLD 0x00000900 /* AFEWDT Watchdog Timer Load Value */ +#define REG_AFEWDT_WDTVALS 0x00000904 /* AFEWDT Current Count Value */ +#define REG_AFEWDT_WDTCON 0x00000908 /* AFEWDT Watchdog Timer Control Register */ +#define REG_AFEWDT_WDTCLRI 0x0000090C /* AFEWDT Refresh Watchdog Register */ +#define REG_AFEWDT_WDTSTA 0x00000918 /* AFEWDT Timer Status */ +#define REG_AFEWDT_WDTMINLD 0x0000091C /* AFEWDT Minimum Load Value */ + +/* ============================================================================================================================ + AFEWDT Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AFEWDT_WDTLD Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFEWDT_WDTLD_LOAD 0 /* WDT Load Value */ +#define BITM_AFEWDT_WDTLD_LOAD (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* WDT Load Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFEWDT_WDTVALS Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFEWDT_WDTVALS_CCOUNT 0 /* Current WDT Count Value. */ +#define BITM_AFEWDT_WDTVALS_CCOUNT (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Current WDT Count Value. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFEWDT_WDTCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFEWDT_WDTCON_RESERVED_15_11 11 /* RESERVED */ +#define BITP_AFEWDT_WDTCON_WDTIRQEN 10 /* WDT Interrupt Enable */ +#define BITP_AFEWDT_WDTCON_MINLOAD_EN 9 /* Timer Window Control */ +#define BITP_AFEWDT_WDTCON_CLKDIV2 8 /* Clock Source */ +#define BITP_AFEWDT_WDTCON_RESERVED1_7 7 /* Reserved */ +#define BITP_AFEWDT_WDTCON_MDE 6 /* Timer Mode Select */ +#define BITP_AFEWDT_WDTCON_EN 5 /* Timer Enable */ +#define BITP_AFEWDT_WDTCON_PRE 2 /* Prescaler. */ +#define BITP_AFEWDT_WDTCON_IRQ 1 /* WDT Interrupt Enable */ +#define BITP_AFEWDT_WDTCON_PDSTOP 0 /* Power Down Stop Enable */ +#define BITM_AFEWDT_WDTCON_RESERVED_15_11 (_ADI_MSK_3(0x0000F800,0x0000F800U, uint16_t )) /* RESERVED */ +#define BITM_AFEWDT_WDTCON_WDTIRQEN (_ADI_MSK_3(0x00000400,0x00000400U, uint16_t )) /* WDT Interrupt Enable */ +#define BITM_AFEWDT_WDTCON_MINLOAD_EN (_ADI_MSK_3(0x00000200,0x00000200U, uint16_t )) /* Timer Window Control */ +#define BITM_AFEWDT_WDTCON_CLKDIV2 (_ADI_MSK_3(0x00000100,0x00000100U, uint16_t )) /* Clock Source */ +#define BITM_AFEWDT_WDTCON_RESERVED1_7 (_ADI_MSK_3(0x00000080,0x00000080U, uint16_t )) /* Reserved */ +#define BITM_AFEWDT_WDTCON_MDE (_ADI_MSK_3(0x00000040,0x00000040U, uint16_t )) /* Timer Mode Select */ +#define BITM_AFEWDT_WDTCON_EN (_ADI_MSK_3(0x00000020,0x00000020U, uint16_t )) /* Timer Enable */ +#define BITM_AFEWDT_WDTCON_PRE (_ADI_MSK_3(0x0000000C,0x0000000CU, uint16_t )) /* Prescaler. */ +#define BITM_AFEWDT_WDTCON_IRQ (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* WDT Interrupt Enable */ +#define BITM_AFEWDT_WDTCON_PDSTOP (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Power Down Stop Enable */ +#define ENUM_AFEWDT_WDTCON_RESET (_ADI_MSK_3(0x00000000,0x00000000U, uint16_t )) /* IRQ: Watchdog Timer timeout creates a reset. */ +#define ENUM_AFEWDT_WDTCON_INTERRUPT (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* IRQ: Watchdog Timer timeout creates an interrupt instead of reset. */ +#define ENUM_AFEWDT_WDTCON_CONTINUE (_ADI_MSK_3(0x00000000,0x00000000U, uint16_t )) /* PDSTOP: Continue Counting When In Hibernate */ +#define ENUM_AFEWDT_WDTCON_STOP (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* PDSTOP: Stop Counter When In Hibernate. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFEWDT_WDTCLRI Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFEWDT_WDTCLRI_CLRWDG 0 /* Refresh Register */ +#define BITM_AFEWDT_WDTCLRI_CLRWDG (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Refresh Register */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFEWDT_WDTSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFEWDT_WDTSTA_RESERVED_15_7 7 /* RESERVED */ +#define BITP_AFEWDT_WDTSTA_TMINLD 6 /* WDTMINLD Write Status */ +#define BITP_AFEWDT_WDTSTA_OTPWRDONE 5 /* Reset Type Status */ +#define BITP_AFEWDT_WDTSTA_LOCK 4 /* Lock Status */ +#define BITP_AFEWDT_WDTSTA_CON 3 /* WDTCON Write Status */ +#define BITP_AFEWDT_WDTSTA_TLD 2 /* WDTVAL Write Status */ +#define BITP_AFEWDT_WDTSTA_CLRI 1 /* WDTCLRI Write Status */ +#define BITP_AFEWDT_WDTSTA_IRQ 0 /* WDT Interrupt */ +#define BITM_AFEWDT_WDTSTA_RESERVED_15_7 (_ADI_MSK_3(0x0000FF80,0x0000FF80U, uint16_t )) /* RESERVED */ +#define BITM_AFEWDT_WDTSTA_TMINLD (_ADI_MSK_3(0x00000040,0x00000040U, uint16_t )) /* WDTMINLD Write Status */ +#define BITM_AFEWDT_WDTSTA_OTPWRDONE (_ADI_MSK_3(0x00000020,0x00000020U, uint16_t )) /* Reset Type Status */ +#define BITM_AFEWDT_WDTSTA_LOCK (_ADI_MSK_3(0x00000010,0x00000010U, uint16_t )) /* Lock Status */ +#define BITM_AFEWDT_WDTSTA_CON (_ADI_MSK_3(0x00000008,0x00000008U, uint16_t )) /* WDTCON Write Status */ +#define BITM_AFEWDT_WDTSTA_TLD (_ADI_MSK_3(0x00000004,0x00000004U, uint16_t )) /* WDTVAL Write Status */ +#define BITM_AFEWDT_WDTSTA_CLRI (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* WDTCLRI Write Status */ +#define BITM_AFEWDT_WDTSTA_IRQ (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* WDT Interrupt */ +#define ENUM_AFEWDT_WDTSTA_OPEN (_ADI_MSK_3(0x00000000,0x00000000U, uint16_t )) /* LOCK: Timer Operation Not Locked */ +#define ENUM_AFEWDT_WDTSTA_LOCKED (_ADI_MSK_3(0x00000010,0x00000010U, uint16_t )) /* LOCK: Timer Enabled and Locked */ +#define ENUM_AFEWDT_WDTSTA_SYNC_COMPLETE (_ADI_MSK_3(0x00000000,0x00000000U, uint16_t )) /* TLD: Arm and AFE Watchdog Clock Domains WDTLD values match */ +#define ENUM_AFEWDT_WDTSTA_SYNC_IN_PROGRESS (_ADI_MSK_3(0x00000004,0x00000004U, uint16_t )) /* TLD: Synchronize In Progress */ +#define ENUM_AFEWDT_WDTSTA_CLEARED (_ADI_MSK_3(0x00000000,0x00000000U, uint16_t )) /* IRQ: Watchdog Timer Interrupt Not Pending */ +#define ENUM_AFEWDT_WDTSTA_PENDING (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* IRQ: Watchdog Timer Interrupt Pending */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFEWDT_WDTMINLD Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFEWDT_WDTMINLD_MIN_LOAD 0 /* WDT Min Load Value */ +#define BITM_AFEWDT_WDTMINLD_MIN_LOAD (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* WDT Min Load Value */ + +/* ============================================================================================================================ + Wakeup Timer + ============================================================================================================================ */ + +/* ============================================================================================================================ + WUPTMR + ============================================================================================================================ */ +#define REG_WUPTMR_CON_RESET 0x00000000 /* Reset Value for CON */ +#define REG_WUPTMR_CON 0x00000800 /* WUPTMR Timer Control */ +#define REG_WUPTMR_SEQORDER_RESET 0x00000000 /* Reset Value for SEQORDER */ +#define REG_WUPTMR_SEQORDER 0x00000804 /* WUPTMR Order Control */ +#define REG_WUPTMR_SEQ0WUPL_RESET 0x0000FFFF /* Reset Value for SEQ0WUPL */ +#define REG_WUPTMR_SEQ0WUPL 0x00000808 /* WUPTMR SEQ0 WTimeL (LSB) */ +#define REG_WUPTMR_SEQ0WUPH_RESET 0x0000000F /* Reset Value for SEQ0WUPH */ +#define REG_WUPTMR_SEQ0WUPH 0x0000080C /* WUPTMR SEQ0 WTimeH (MSB) */ +#define REG_WUPTMR_SEQ0SLEEPL_RESET 0x0000FFFF /* Reset Value for SEQ0SLEEPL */ +#define REG_WUPTMR_SEQ0SLEEPL 0x00000810 /* WUPTMR SEQ0 STimeL (LSB) */ +#define REG_WUPTMR_SEQ0SLEEPH_RESET 0x0000000F /* Reset Value for SEQ0SLEEPH */ +#define REG_WUPTMR_SEQ0SLEEPH 0x00000814 /* WUPTMR SEQ0 STimeH (MSB) */ +#define REG_WUPTMR_SEQ1WUPL_RESET 0x0000FFFF /* Reset Value for SEQ1WUPL */ +#define REG_WUPTMR_SEQ1WUPL 0x00000818 /* WUPTMR SEQ1 WTimeL (LSB) */ +#define REG_WUPTMR_SEQ1WUPH_RESET 0x0000000F /* Reset Value for SEQ1WUPH */ +#define REG_WUPTMR_SEQ1WUPH 0x0000081C /* WUPTMR SEQ1 WTimeH (MSB) */ +#define REG_WUPTMR_SEQ1SLEEPL_RESET 0x0000FFFF /* Reset Value for SEQ1SLEEPL */ +#define REG_WUPTMR_SEQ1SLEEPL 0x00000820 /* WUPTMR SEQ1 STimeL (LSB) */ +#define REG_WUPTMR_SEQ1SLEEPH_RESET 0x0000000F /* Reset Value for SEQ1SLEEPH */ +#define REG_WUPTMR_SEQ1SLEEPH 0x00000824 /* WUPTMR SEQ1 STimeH (MSB) */ +#define REG_WUPTMR_SEQ2WUPL_RESET 0x0000FFFF /* Reset Value for SEQ2WUPL */ +#define REG_WUPTMR_SEQ2WUPL 0x00000828 /* WUPTMR SEQ2 WTimeL (LSB) */ +#define REG_WUPTMR_SEQ2WUPH_RESET 0x0000000F /* Reset Value for SEQ2WUPH */ +#define REG_WUPTMR_SEQ2WUPH 0x0000082C /* WUPTMR SEQ2 WTimeH (MSB) */ +#define REG_WUPTMR_SEQ2SLEEPL_RESET 0x0000FFFF /* Reset Value for SEQ2SLEEPL */ +#define REG_WUPTMR_SEQ2SLEEPL 0x00000830 /* WUPTMR SEQ2 STimeL (LSB) */ +#define REG_WUPTMR_SEQ2SLEEPH_RESET 0x0000000F /* Reset Value for SEQ2SLEEPH */ +#define REG_WUPTMR_SEQ2SLEEPH 0x00000834 /* WUPTMR SEQ2 STimeH (MSB) */ +#define REG_WUPTMR_SEQ3WUPL_RESET 0x0000FFFF /* Reset Value for SEQ3WUPL */ +#define REG_WUPTMR_SEQ3WUPL 0x00000838 /* WUPTMR SEQ3 WTimeL (LSB) */ +#define REG_WUPTMR_SEQ3WUPH_RESET 0x0000000F /* Reset Value for SEQ3WUPH */ +#define REG_WUPTMR_SEQ3WUPH 0x0000083C /* WUPTMR SEQ3 WTimeH (MSB) */ +#define REG_WUPTMR_SEQ3SLEEPL_RESET 0x0000FFFF /* Reset Value for SEQ3SLEEPL */ +#define REG_WUPTMR_SEQ3SLEEPL 0x00000840 /* WUPTMR SEQ3 STimeL (LSB) */ +#define REG_WUPTMR_SEQ3SLEEPH_RESET 0x0000000F /* Reset Value for SEQ3SLEEPH */ +#define REG_WUPTMR_SEQ3SLEEPH 0x00000844 /* WUPTMR SEQ3 STimeH (MSB) */ + +/* ============================================================================================================================ + WUPTMR Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_CON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_CON_MSKTRG 6 /* Mark Sequence Trigger from Sleep Wakeup Timer */ +#define BITP_WUPTMR_CON_CLKSEL 4 /* Clock Selection */ +#define BITP_WUPTMR_CON_ENDSEQ 1 /* End Sequence */ +#define BITP_WUPTMR_CON_EN 0 /* Sleep Wake Timer Enable Bit */ +#define BITM_WUPTMR_CON_MSKTRG 0x00000040 /* Mark Sequence Trigger from Sleep Wakeup Timer */ +#define BITM_WUPTMR_CON_CLKSEL 0x00000030 /* Clock Selection */ +#define BITM_WUPTMR_CON_ENDSEQ 0x0000000E /* End Sequence */ +#define BITM_WUPTMR_CON_EN 0x00000001 /* Sleep Wake Timer Enable Bit */ +#define ENUM_WUPTMR_CON_SWT32K0 0x00000000 /* CLKSEL: Internal 32kHz OSC */ +#define ENUM_WUPTMR_CON_SWTEXT0 0x00000010 /* CLKSEL: External Clock */ +#define ENUM_WUPTMR_CON_SWT32K 0x00000020 /* CLKSEL: Internal 32kHz OSC */ +#define ENUM_WUPTMR_CON_SWTEXT 0x00000030 /* CLKSEL: External Clock */ +#define ENUM_WUPTMR_CON_ENDSEQA 0x00000000 /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqA And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQB 0x00000002 /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqB And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQC 0x00000004 /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqC And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQD 0x00000006 /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqD And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQE 0x00000008 /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqE And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQF 0x0000000A /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqF And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQG 0x0000000C /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqG And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_ENDSEQH 0x0000000E /* ENDSEQ: The Sleep Wakeup Timer Will Stop At SeqH And Then Go Back To SeqA */ +#define ENUM_WUPTMR_CON_SWTEN 0x00000000 /* EN: Enable Sleep Wakeup Timer */ +#define ENUM_WUPTMR_CON_SWTDIS 0x00000001 /* EN: Disable Sleep Wakeup Timer */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQORDER Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQORDER_SEQH 14 /* SEQH Config */ +#define BITP_WUPTMR_SEQORDER_SEQG 12 /* SEQG Config */ +#define BITP_WUPTMR_SEQORDER_SEQF 10 /* SEQF Config */ +#define BITP_WUPTMR_SEQORDER_SEQE 8 /* SEQE Config */ +#define BITP_WUPTMR_SEQORDER_SEQD 6 /* SEQD Config */ +#define BITP_WUPTMR_SEQORDER_SEQC 4 /* SEQC Config */ +#define BITP_WUPTMR_SEQORDER_SEQB 2 /* SEQB Config */ +#define BITP_WUPTMR_SEQORDER_SEQA 0 /* SEQA Config */ +#define BITM_WUPTMR_SEQORDER_SEQH 0x0000C000 /* SEQH Config */ +#define BITM_WUPTMR_SEQORDER_SEQG 0x00003000 /* SEQG Config */ +#define BITM_WUPTMR_SEQORDER_SEQF 0x00000C00 /* SEQF Config */ +#define BITM_WUPTMR_SEQORDER_SEQE 0x00000300 /* SEQE Config */ +#define BITM_WUPTMR_SEQORDER_SEQD 0x000000C0 /* SEQD Config */ +#define BITM_WUPTMR_SEQORDER_SEQC 0x00000030 /* SEQC Config */ +#define BITM_WUPTMR_SEQORDER_SEQB 0x0000000C /* SEQB Config */ +#define BITM_WUPTMR_SEQORDER_SEQA 0x00000003 /* SEQA Config */ +#define ENUM_WUPTMR_SEQORDER_SEQH0 0x00000000 /* SEQH: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQH1 0x00004000 /* SEQH: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQH2 0x00008000 /* SEQH: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQH3 0x0000C000 /* SEQH: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQG0 0x00000000 /* SEQG: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQG1 0x00001000 /* SEQG: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQG2 0x00002000 /* SEQG: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQG3 0x00003000 /* SEQG: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQF0 0x00000000 /* SEQF: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQF1 0x00000400 /* SEQF: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQF2 0x00000800 /* SEQF: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQF3 0x00000C00 /* SEQF: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQE0 0x00000000 /* SEQE: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQE1 0x00000100 /* SEQE: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQE2 0x00000200 /* SEQE: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQE3 0x00000300 /* SEQE: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQD0 0x00000000 /* SEQD: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQD1 0x00000040 /* SEQD: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQD2 0x00000080 /* SEQD: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQD3 0x000000C0 /* SEQD: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQC0 0x00000000 /* SEQC: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQC1 0x00000010 /* SEQC: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQC2 0x00000020 /* SEQC: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQC3 0x00000030 /* SEQC: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQB0 0x00000000 /* SEQB: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQB1 0x00000004 /* SEQB: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQB2 0x00000008 /* SEQB: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQB3 0x0000000C /* SEQB: Fill SEQ3 In */ +#define ENUM_WUPTMR_SEQORDER_SEQA0 0x00000000 /* SEQA: Fill SEQ0 In */ +#define ENUM_WUPTMR_SEQORDER_SEQA1 0x00000001 /* SEQA: Fill SEQ1 In */ +#define ENUM_WUPTMR_SEQORDER_SEQA2 0x00000002 /* SEQA: Fill SEQ2 In */ +#define ENUM_WUPTMR_SEQORDER_SEQA3 0x00000003 /* SEQA: Fill SEQ3 In */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ0WUPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ0WUPL_WAKEUPTIME0 0 /* Sequence 0 Sleep Period */ +#define BITM_WUPTMR_SEQ0WUPL_WAKEUPTIME0 0x0000FFFF /* Sequence 0 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ0WUPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ0WUPH_WAKEUPTIME0 0 /* Sequence 0 Sleep Period */ +#define BITM_WUPTMR_SEQ0WUPH_WAKEUPTIME0 0x0000000F /* Sequence 0 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ0SLEEPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ0SLEEPL_SLEEPTIME0 0 /* Sequence 0 Active Period */ +#define BITM_WUPTMR_SEQ0SLEEPL_SLEEPTIME0 0x0000FFFF /* Sequence 0 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ0SLEEPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ0SLEEPH_SLEEPTIME0 0 /* Sequence 0 Active Period */ +#define BITM_WUPTMR_SEQ0SLEEPH_SLEEPTIME0 0x0000000F /* Sequence 0 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ1WUPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ1WUPL_WAKEUPTIME 0 /* Sequence 1 Sleep Period */ +#define BITM_WUPTMR_SEQ1WUPL_WAKEUPTIME 0x0000FFFF /* Sequence 1 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ1WUPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ1WUPH_WAKEUPTIME 0 /* Sequence 1 Sleep Period */ +#define BITM_WUPTMR_SEQ1WUPH_WAKEUPTIME 0x0000000F /* Sequence 1 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ1SLEEPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ1SLEEPL_SLEEPTIME1 0 /* Sequence 1 Active Period */ +#define BITM_WUPTMR_SEQ1SLEEPL_SLEEPTIME1 0x0000FFFF /* Sequence 1 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ1SLEEPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ1SLEEPH_SLEEPTIME1 0 /* Sequence 1 Active Period */ +#define BITM_WUPTMR_SEQ1SLEEPH_SLEEPTIME1 0x0000000F /* Sequence 1 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ2WUPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ2WUPL_WAKEUPTIME2 0 /* Sequence 2 Sleep Period */ +#define BITM_WUPTMR_SEQ2WUPL_WAKEUPTIME2 0x0000FFFF /* Sequence 2 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ2WUPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ2WUPH_WAKEUPTIME2 0 /* Sequence 2 Sleep Period */ +#define BITM_WUPTMR_SEQ2WUPH_WAKEUPTIME2 0x0000000F /* Sequence 2 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ2SLEEPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ2SLEEPL_SLEEPTIME2 0 /* Sequence 2 Active Period */ +#define BITM_WUPTMR_SEQ2SLEEPL_SLEEPTIME2 0x0000FFFF /* Sequence 2 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ2SLEEPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ2SLEEPH_SLEEPTIME2 0 /* Sequence 2 Active Period */ +#define BITM_WUPTMR_SEQ2SLEEPH_SLEEPTIME2 0x0000000F /* Sequence 2 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ3WUPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ3WUPL_WAKEUPTIME3 0 /* Sequence 3 Sleep Period */ +#define BITM_WUPTMR_SEQ3WUPL_WAKEUPTIME3 0x0000FFFF /* Sequence 3 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ3WUPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ3WUPH_WAKEUPTIME3 0 /* Sequence 3 Sleep Period */ +#define BITM_WUPTMR_SEQ3WUPH_WAKEUPTIME3 0x0000000F /* Sequence 3 Sleep Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ3SLEEPL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ3SLEEPL_SLEEPTIME3 0 /* Sequence 3 Active Period */ +#define BITM_WUPTMR_SEQ3SLEEPL_SLEEPTIME3 0x0000FFFF /* Sequence 3 Active Period */ + +/* ------------------------------------------------------------------------------------------------------------------------- + WUPTMR_SEQ3SLEEPH Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_WUPTMR_SEQ3SLEEPH_SLEEPTIME3 0 /* Sequence 3 Active Period */ +#define BITM_WUPTMR_SEQ3SLEEPH_SLEEPTIME3 0x0000000F /* Sequence 3 Active Period */ + + +/* ============================================================================================================================ + Always On Register + ============================================================================================================================ */ + +/* ============================================================================================================================ + ALLON + ============================================================================================================================ */ +#define REG_ALLON_PWRMOD_RESET 0x00000001 /* Reset Value for PWRMOD */ +#define REG_ALLON_PWRMOD 0x00000A00 /* ALLON Power Modes */ +#define REG_ALLON_PWRKEY_RESET 0x00000000 /* Reset Value for PWRKEY */ +#define REG_ALLON_PWRKEY 0x00000A04 /* ALLON Key Protection for PWRMOD */ +#define REG_ALLON_OSCKEY_RESET 0x00000000 /* Reset Value for OSCKEY */ +#define REG_ALLON_OSCKEY 0x00000A0C /* ALLON Key Protection for OSCCON */ +#define REG_ALLON_OSCCON_RESET 0x00000003 /* Reset Value for OSCCON */ +#define REG_ALLON_OSCCON 0x00000A10 /* ALLON Oscillator Control */ +#define REG_ALLON_TMRCON_RESET 0x00000000 /* Reset Value for TMRCON */ +#define REG_ALLON_TMRCON 0x00000A1C /* ALLON Timer Wakeup Configuration */ +#define REG_ALLON_EI0CON_RESET 0x00000000 /* Reset Value for EI0CON */ +#define REG_ALLON_EI0CON 0x00000A20 /* ALLON External Interrupt Configuration 0 */ +#define REG_ALLON_EI1CON_RESET 0x00000000 /* Reset Value for EI1CON */ +#define REG_ALLON_EI1CON 0x00000A24 /* ALLON External Interrupt Configuration 1 */ +#define REG_ALLON_EI2CON_RESET 0x00000000 /* Reset Value for EI2CON */ +#define REG_ALLON_EI2CON 0x00000A28 /* ALLON External Interrupt Configuration 2 */ +#define REG_ALLON_EICLR_RESET 0x0000C000 /* Reset Value for EICLR */ +#define REG_ALLON_EICLR 0x00000A30 /* ALLON External Interrupt Clear */ +#define REG_ALLON_RSTSTA_RESET 0x00000000 /* Reset Value for RSTSTA */ +#define REG_ALLON_RSTSTA 0x00000A40 /* ALLON Reset Status */ +#define REG_ALLON_RSTCONKEY_RESET 0x00000000 /* Reset Value for RSTCONKEY */ +#define REG_ALLON_RSTCONKEY 0x00000A5C /* ALLON Key Protection for RSTCON Register */ +#define REG_ALLON_LOSCTST_RESET 0x0000008F /* Reset Value for LOSCTST */ +#define REG_ALLON_LOSCTST 0x00000A6C /* ALLON Internal LF Oscillator Test */ +#define REG_ALLON_CLKEN0_RESET 0x00000004 /* Reset Value for CLKEN0 */ +#define REG_ALLON_CLKEN0 0x00000A70 /* ALLON 32KHz Peripheral Clock Enable */ + +/* ============================================================================================================================ + ALLON Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_PWRMOD Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_PWRMOD_RAMRETEN 15 /* Retention for RAM */ +#define BITP_ALLON_PWRMOD_ADCRETEN 14 /* Keep ADC Power Switch on in Hibernate */ +#define BITP_ALLON_PWRMOD_SEQSLPEN 3 /* Auto Sleep by Sequencer Command */ +#define BITP_ALLON_PWRMOD_TMRSLPEN 2 /* Auto Sleep by Sleep Wakeup Timer */ +#define BITP_ALLON_PWRMOD_PWRMOD 0 /* Power Mode Control Bits */ +#define BITM_ALLON_PWRMOD_RAMRETEN 0x00008000 /* Retention for RAM */ +#define BITM_ALLON_PWRMOD_ADCRETEN 0x00004000 /* Keep ADC Power Switch on in Hibernate */ +#define BITM_ALLON_PWRMOD_SEQSLPEN 0x00000008 /* Auto Sleep by Sequencer Command */ +#define BITM_ALLON_PWRMOD_TMRSLPEN 0x00000004 /* Auto Sleep by Sleep Wakeup Timer */ +#define BITM_ALLON_PWRMOD_PWRMOD 0x00000003 /* Power Mode Control Bits */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_PWRKEY Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_PWRKEY_PWRKEY 0 /* PWRMOD Key Register */ +#define BITM_ALLON_PWRKEY_PWRKEY 0x0000FFFF /* PWRMOD Key Register */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_OSCKEY Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_OSCKEY_OSCKEY 0 /* Oscillator Control Key Register. */ +#define BITM_ALLON_OSCKEY_OSCKEY 0x0000FFFF /* Oscillator Control Key Register. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_OSCCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_OSCCON_HFXTALOK 10 /* Status of HFXTAL Oscillator */ +#define BITP_ALLON_OSCCON_HFOSCOK 9 /* Status of HFOSC Oscillator */ +#define BITP_ALLON_OSCCON_LFOSCOK 8 /* Status of LFOSC Oscillator */ +#define BITP_ALLON_OSCCON_HFXTALEN 2 /* High Frequency Crystal Oscillator Enable */ +#define BITP_ALLON_OSCCON_HFOSCEN 1 /* High Frequency Internal Oscillator Enable */ +#define BITP_ALLON_OSCCON_LFOSCEN 0 /* Low Frequency Internal Oscillator Enable */ +#define BITM_ALLON_OSCCON_HFXTALOK 0x00000400 /* Status of HFXTAL Oscillator */ +#define BITM_ALLON_OSCCON_HFOSCOK 0x00000200 /* Status of HFOSC Oscillator */ +#define BITM_ALLON_OSCCON_LFOSCOK 0x00000100 /* Status of LFOSC Oscillator */ +#define BITM_ALLON_OSCCON_HFXTALEN 0x00000004 /* High Frequency Crystal Oscillator Enable */ +#define BITM_ALLON_OSCCON_HFOSCEN 0x00000002 /* High Frequency Internal Oscillator Enable */ +#define BITM_ALLON_OSCCON_LFOSCEN 0x00000001 /* Low Frequency Internal Oscillator Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_TMRCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_TMRCON_TMRINTEN 0 /* Enable Wakeup Timer */ +#define BITM_ALLON_TMRCON_TMRINTEN 0x00000001 /* Enable Wakeup Timer */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_EI0CON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_EI0CON_IRQ3EN 15 /* External Interrupt 3 Enable Bit */ +#define BITP_ALLON_EI0CON_IRQ3MDE 12 /* External Interrupt 3 Mode Registers */ +#define BITP_ALLON_EI0CON_IRQ2EN 11 /* External Interrupt 2 Enable Bit */ +#define BITP_ALLON_EI0CON_IRQ2MDE 8 /* External Interrupt 2 Mode Registers */ +#define BITP_ALLON_EI0CON_IRQ1EN 7 /* External Interrupt 1 Enable Bit */ +#define BITP_ALLON_EI0CON_IRQ1MDE 4 /* External Interrupt 1 Mode Registers */ +#define BITP_ALLON_EI0CON_IRQ0EN 3 /* External Interrupt 0 Enable Bit */ +#define BITP_ALLON_EI0CON_IRQ0MDE 0 /* External Interrupt 0 Mode Registers */ +#define BITM_ALLON_EI0CON_IRQ3EN 0x00008000 /* External Interrupt 3 Enable Bit */ +#define BITM_ALLON_EI0CON_IRQ3MDE 0x00007000 /* External Interrupt 3 Mode Registers */ +#define BITM_ALLON_EI0CON_IRQ2EN 0x00000800 /* External Interrupt 2 Enable Bit */ +#define BITM_ALLON_EI0CON_IRQ2MDE 0x00000700 /* External Interrupt 2 Mode Registers */ +#define BITM_ALLON_EI0CON_IRQ1EN 0x00000080 /* External Interrupt 1 Enable Bit */ +#define BITM_ALLON_EI0CON_IRQ1MDE 0x00000070 /* External Interrupt 1 Mode Registers */ +#define BITM_ALLON_EI0CON_IRQ0EN 0x00000008 /* External Interrupt 0 Enable Bit */ +#define BITM_ALLON_EI0CON_IRQ0MDE 0x00000007 /* External Interrupt 0 Mode Registers */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_EI1CON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_EI1CON_IRQ7EN 15 /* External Interrupt 7 Enable Bit */ +#define BITP_ALLON_EI1CON_IRQ7MDE 12 /* External Interrupt 7 Mode Registers */ +#define BITP_ALLON_EI1CON_IRQ6EN 11 /* External Interrupt 6 Enable Bit */ +#define BITP_ALLON_EI1CON_IRQ6MDE 8 /* External Interrupt 6 Mode Registers */ +#define BITP_ALLON_EI1CON_IRQ5EN 7 /* External Interrupt 5 Enable Bit */ +#define BITP_ALLON_EI1CON_IRQ5MDE 4 /* External Interrupt 5 Mode Registers */ +#define BITP_ALLON_EI1CON_IRQ4EN 3 /* External Interrupt 4 Enable Bit */ +#define BITP_ALLON_EI1CON_IRQ4MDE 0 /* External Interrupt 4 Mode Registers */ +#define BITM_ALLON_EI1CON_IRQ7EN 0x00008000 /* External Interrupt 7 Enable Bit */ +#define BITM_ALLON_EI1CON_IRQ7MDE 0x00007000 /* External Interrupt 7 Mode Registers */ +#define BITM_ALLON_EI1CON_IRQ6EN 0x00000800 /* External Interrupt 6 Enable Bit */ +#define BITM_ALLON_EI1CON_IRQ6MDE 0x00000700 /* External Interrupt 6 Mode Registers */ +#define BITM_ALLON_EI1CON_IRQ5EN 0x00000080 /* External Interrupt 5 Enable Bit */ +#define BITM_ALLON_EI1CON_IRQ5MDE 0x00000070 /* External Interrupt 5 Mode Registers */ +#define BITM_ALLON_EI1CON_IRQ4EN 0x00000008 /* External Interrupt 4 Enable Bit */ +#define BITM_ALLON_EI1CON_IRQ4MDE 0x00000007 /* External Interrupt 4 Mode Registers */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_EI2CON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_EI2CON_BUSINTEN 3 /* BUS Interrupt Detection Enable Bit */ +#define BITP_ALLON_EI2CON_BUSINTMDE 0 /* BUS Interrupt Detection Mode Registers */ +#define BITM_ALLON_EI2CON_BUSINTEN 0x00000008 /* BUS Interrupt Detection Enable Bit */ +#define BITM_ALLON_EI2CON_BUSINTMDE 0x00000007 /* BUS Interrupt Detection Mode Registers */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_EICLR Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_EICLR_AUTCLRBUSEN 15 /* Enable Auto Clear of Bus Interrupt */ +#define BITP_ALLON_EICLR_BUSINT 8 /* BUS Interrupt */ +#define BITM_ALLON_EICLR_AUTCLRBUSEN 0x00008000 /* Enable Auto Clear of Bus Interrupt */ +#define BITM_ALLON_EICLR_BUSINT 0x00000100 /* BUS Interrupt */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_RSTSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_RSTSTA_PINSWRST 4 /* Software Reset Pin */ +#define BITP_ALLON_RSTSTA_MMRSWRST 3 /* MMR Software Reset */ +#define BITP_ALLON_RSTSTA_WDRST 2 /* Watchdog Timeout */ +#define BITP_ALLON_RSTSTA_EXTRST 1 /* External Reset */ +#define BITP_ALLON_RSTSTA_POR 0 /* Power-on Reset */ +#define BITM_ALLON_RSTSTA_PINSWRST 0x00000010 /* Software Reset Pin */ +#define BITM_ALLON_RSTSTA_MMRSWRST 0x00000008 /* MMR Software Reset */ +#define BITM_ALLON_RSTSTA_WDRST 0x00000004 /* Watchdog Timeout */ +#define BITM_ALLON_RSTSTA_EXTRST 0x00000002 /* External Reset */ +#define BITM_ALLON_RSTSTA_POR 0x00000001 /* Power-on Reset */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_RSTCONKEY Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_RSTCONKEY_KEY 0 /* Reset Control Key Register */ +#define BITM_ALLON_RSTCONKEY_KEY 0x0000FFFF /* Reset Control Key Register */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_LOSCTST Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_LOSCTST_TRIM 0 /* Trim Caps to Adjust Frequency. */ +#define BITM_ALLON_LOSCTST_TRIM 0x0000000F /* Trim Caps to Adjust Frequency. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + ALLON_CLKEN0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_ALLON_CLKEN0_TIACHPDIS 2 /* TIA Chop Clock Disable */ +#define BITP_ALLON_CLKEN0_SLPWUTDIS 1 /* Sleep/Wakeup Timer Clock Disable */ +#define BITP_ALLON_CLKEN0_WDTDIS 0 /* Watch Dog Timer Clock Disable */ +#define BITM_ALLON_CLKEN0_TIACHPDIS 0x00000004 /* TIA Chop Clock Disable */ +#define BITM_ALLON_CLKEN0_SLPWUTDIS 0x00000002 /* Sleep/Wakeup Timer Clock Disable */ +#define BITM_ALLON_CLKEN0_WDTDIS 0x00000001 /* Watch Dog Timer Clock Disable */ + +/* ============================================================================================================================ + General Purpose Timer + ============================================================================================================================ */ + +/* ============================================================================================================================ + AGPT0 + ============================================================================================================================ */ +#define REG_AGPT0_LD0 0x00000D00 /* AGPT0 16-bit Load Value Register. */ +#define REG_AGPT0_VAL0 0x00000D04 /* AGPT0 16-Bit Timer Value Register. */ +#define REG_AGPT0_CON0 0x00000D08 /* AGPT0 Control Register. */ +#define REG_AGPT0_CLRI0 0x00000D0C /* AGPT0 Clear Interrupt Register. */ +#define REG_AGPT0_CAP0 0x00000D10 /* AGPT0 Capture Register. */ +#define REG_AGPT0_ALD0 0x00000D14 /* AGPT0 16-Bit Load Value, Asynchronous. */ +#define REG_AGPT0_AVAL0 0x00000D18 /* AGPT0 16-Bit Timer Value, Asynchronous Register. */ +#define REG_AGPT0_STA0 0x00000D1C /* AGPT0 Status Register. */ +#define REG_AGPT0_PWMCON0 0x00000D20 /* AGPT0 PWM Control Register. */ +#define REG_AGPT0_PWMMAT0 0x00000D24 /* AGPT0 PWM Match Value Register. */ +#define REG_AGPT0_INTEN 0x00000D28 /* AGPT0 Interrupt Enable */ + +/* ============================================================================================================================ + AGPT0 Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_LD0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_LD0_LOAD 0 /* Load Value */ +#define BITM_AGPT0_LD0_LOAD (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Load Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_VAL0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_VAL0_VAL 0 /* Current Count */ +#define BITM_AGPT0_VAL0_VAL (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Current Count */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_CON0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_CON0_SYNCBYP 15 /* Synchronization Bypass */ +#define BITP_AGPT0_CON0_RSTEN 14 /* Counter and Prescale Reset Enable */ +#define BITP_AGPT0_CON0_EVTEN 13 /* Event Select */ +#define BITP_AGPT0_CON0_EVENT 8 /* Event Select Range */ +#define BITP_AGPT0_CON0_RLD 7 /* Reload Control */ +#define BITP_AGPT0_CON0_CLK 5 /* Clock Select */ +#define BITP_AGPT0_CON0_ENABLE 4 /* Timer Enable */ +#define BITP_AGPT0_CON0_MOD 3 /* Timer Mode */ +#define BITP_AGPT0_CON0_UP 2 /* Count up */ +#define BITP_AGPT0_CON0_PRE 0 /* Prescaler */ +#define BITM_AGPT0_CON0_SYNCBYP (_ADI_MSK_3(0x00008000,0x00008000U, uint16_t )) /* Synchronization Bypass */ +#define BITM_AGPT0_CON0_RSTEN (_ADI_MSK_3(0x00004000,0x00004000U, uint16_t )) /* Counter and Prescale Reset Enable */ +#define BITM_AGPT0_CON0_EVTEN (_ADI_MSK_3(0x00002000,0x00002000U, uint16_t )) /* Event Select */ +#define BITM_AGPT0_CON0_EVENT (_ADI_MSK_3(0x00001F00,0x00001F00U, uint16_t )) /* Event Select Range */ +#define BITM_AGPT0_CON0_RLD (_ADI_MSK_3(0x00000080,0x00000080U, uint16_t )) /* Reload Control */ +#define BITM_AGPT0_CON0_CLK (_ADI_MSK_3(0x00000060,0x00000060U, uint16_t )) /* Clock Select */ +#define BITM_AGPT0_CON0_ENABLE (_ADI_MSK_3(0x00000010,0x00000010U, uint16_t )) /* Timer Enable */ +#define BITM_AGPT0_CON0_MOD (_ADI_MSK_3(0x00000008,0x00000008U, uint16_t )) /* Timer Mode */ +#define BITM_AGPT0_CON0_UP (_ADI_MSK_3(0x00000004,0x00000004U, uint16_t )) /* Count up */ +#define BITM_AGPT0_CON0_PRE (_ADI_MSK_3(0x00000003,0x00000003U, uint16_t )) /* Prescaler */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_CLRI0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_CLRI0_CAP 1 /* Clear Captured Event Interrupt */ +#define BITP_AGPT0_CLRI0_TMOUT 0 /* Clear Timeout Interrupt */ +#define BITM_AGPT0_CLRI0_CAP (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* Clear Captured Event Interrupt */ +#define BITM_AGPT0_CLRI0_TMOUT (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Clear Timeout Interrupt */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_CAP0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_CAP0_CAP 0 /* 16-bit Captured Value */ +#define BITM_AGPT0_CAP0_CAP (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* 16-bit Captured Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_ALD0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_ALD0_ALOAD 0 /* Load Value, Asynchronous */ +#define BITM_AGPT0_ALD0_ALOAD (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Load Value, Asynchronous */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_AVAL0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_AVAL0_AVAL 0 /* Counter Value */ +#define BITM_AGPT0_AVAL0_AVAL (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Counter Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_STA0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_STA0_RSTCNT 8 /* Counter Reset Occurring */ +#define BITP_AGPT0_STA0_PDOK 7 /* Clear Interrupt Register Synchronization */ +#define BITP_AGPT0_STA0_BUSY 6 /* Timer Busy */ +#define BITP_AGPT0_STA0_CAP 1 /* Capture Event Pending */ +#define BITP_AGPT0_STA0_TMOUT 0 /* Timeout Event Occurred */ +#define BITM_AGPT0_STA0_RSTCNT (_ADI_MSK_3(0x00000100,0x00000100U, uint16_t )) /* Counter Reset Occurring */ +#define BITM_AGPT0_STA0_PDOK (_ADI_MSK_3(0x00000080,0x00000080U, uint16_t )) /* Clear Interrupt Register Synchronization */ +#define BITM_AGPT0_STA0_BUSY (_ADI_MSK_3(0x00000040,0x00000040U, uint16_t )) /* Timer Busy */ +#define BITM_AGPT0_STA0_CAP (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* Capture Event Pending */ +#define BITM_AGPT0_STA0_TMOUT (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Timeout Event Occurred */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_PWMCON0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_PWMCON0_IDLE 1 /* PWM Idle State */ +#define BITP_AGPT0_PWMCON0_MATCHEN 0 /* PWM Match Enabled */ +#define BITM_AGPT0_PWMCON0_IDLE (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* PWM Idle State */ +#define BITM_AGPT0_PWMCON0_MATCHEN (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* PWM Match Enabled */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_PWMMAT0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_PWMMAT0_MATCHVAL 0 /* PWM Match Value */ +#define BITM_AGPT0_PWMMAT0_MATCHVAL (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* PWM Match Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT0_INTEN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT0_INTEN_INTEN 0 /* Interrupt Enable */ +#define BITM_AGPT0_INTEN_INTEN (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Interrupt Enable */ + + +/* ============================================================================================================================ + General Purpose Timer + ============================================================================================================================ */ + +/* ============================================================================================================================ + AGPT1 + ============================================================================================================================ */ +#define REG_AGPT1_LD1 0x00000E00 /* AGPT1 16-bit Load Value Register */ +#define REG_AGPT1_VAL1 0x00000E04 /* AGPT1 16-bit Timer Value Register */ +#define REG_AGPT1_CON1 0x00000E08 /* AGPT1 Control Register */ +#define REG_AGPT1_CLRI1 0x00000E0C /* AGPT1 Clear Interrupt Register */ +#define REG_AGPT1_CAP1 0x00000E10 /* AGPT1 Capture Register */ +#define REG_AGPT1_ALD1 0x00000E14 /* AGPT1 16-bit Load Value, Asynchronous Register */ +#define REG_AGPT1_AVAL1 0x00000E18 /* AGPT1 16-bit Timer Value, Asynchronous Register */ +#define REG_AGPT1_STA1 0x00000E1C /* AGPT1 Status Register */ +#define REG_AGPT1_PWMCON1 0x00000E20 /* AGPT1 PWM Control Register */ +#define REG_AGPT1_PWMMAT1 0x00000E24 /* AGPT1 PWM Match Value Register */ +#define REG_AGPT1_INTEN1 0x00000E28 /* AGPT1 Interrupt Enable */ + +/* ============================================================================================================================ + AGPT1 Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_LD1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_LD1_LOAD 0 /* Load Value */ +#define BITM_AGPT1_LD1_LOAD (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Load Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_VAL1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_VAL1_VAL 0 /* Current Count */ +#define BITM_AGPT1_VAL1_VAL (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Current Count */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_CON1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_CON1_SYNCBYP 15 /* Synchronization Bypass */ +#define BITP_AGPT1_CON1_RSTEN 14 /* Counter and Prescale Reset Enable */ +#define BITP_AGPT1_CON1_EVENTEN 13 /* Event Select */ +#define BITP_AGPT1_CON1_EVENT 8 /* Event Select Range */ +#define BITP_AGPT1_CON1_RLD 7 /* Reload Control */ +#define BITP_AGPT1_CON1_CLK 5 /* Clock Select */ +#define BITP_AGPT1_CON1_ENABLE 4 /* Timer Enable */ +#define BITP_AGPT1_CON1_MOD 3 /* Timer Mode */ +#define BITP_AGPT1_CON1_UP 2 /* Count up */ +#define BITP_AGPT1_CON1_PRE 0 /* Prescaler */ +#define BITM_AGPT1_CON1_SYNCBYP (_ADI_MSK_3(0x00008000,0x00008000U, uint16_t )) /* Synchronization Bypass */ +#define BITM_AGPT1_CON1_RSTEN (_ADI_MSK_3(0x00004000,0x00004000U, uint16_t )) /* Counter and Prescale Reset Enable */ +#define BITM_AGPT1_CON1_EVENTEN (_ADI_MSK_3(0x00002000,0x00002000U, uint16_t )) /* Event Select */ +#define BITM_AGPT1_CON1_EVENT (_ADI_MSK_3(0x00001F00,0x00001F00U, uint16_t )) /* Event Select Range */ +#define BITM_AGPT1_CON1_RLD (_ADI_MSK_3(0x00000080,0x00000080U, uint16_t )) /* Reload Control */ +#define BITM_AGPT1_CON1_CLK (_ADI_MSK_3(0x00000060,0x00000060U, uint16_t )) /* Clock Select */ +#define BITM_AGPT1_CON1_ENABLE (_ADI_MSK_3(0x00000010,0x00000010U, uint16_t )) /* Timer Enable */ +#define BITM_AGPT1_CON1_MOD (_ADI_MSK_3(0x00000008,0x00000008U, uint16_t )) /* Timer Mode */ +#define BITM_AGPT1_CON1_UP (_ADI_MSK_3(0x00000004,0x00000004U, uint16_t )) /* Count up */ +#define BITM_AGPT1_CON1_PRE (_ADI_MSK_3(0x00000003,0x00000003U, uint16_t )) /* Prescaler */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_CLRI1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_CLRI1_CAP 1 /* Clear Captured Event Interrupt */ +#define BITP_AGPT1_CLRI1_TMOUT 0 /* Clear Timeout Interrupt */ +#define BITM_AGPT1_CLRI1_CAP (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* Clear Captured Event Interrupt */ +#define BITM_AGPT1_CLRI1_TMOUT (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Clear Timeout Interrupt */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_CAP1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_CAP1_CAP 0 /* 16-bit Captured Value. */ +#define BITM_AGPT1_CAP1_CAP (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* 16-bit Captured Value. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_ALD1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_ALD1_ALOAD 0 /* Load Value, Asynchronous */ +#define BITM_AGPT1_ALD1_ALOAD (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Load Value, Asynchronous */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_AVAL1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_AVAL1_AVAL 0 /* Counter Value */ +#define BITM_AGPT1_AVAL1_AVAL (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* Counter Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_STA1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_STA1_RSTCNT 8 /* Counter Reset Occurring */ +#define BITP_AGPT1_STA1_PDOK 7 /* Clear Interrupt Register Synchronization */ +#define BITP_AGPT1_STA1_BUSY 6 /* Timer Busy */ +#define BITP_AGPT1_STA1_CAP 1 /* Capture Event Pending */ +#define BITP_AGPT1_STA1_TMOUT 0 /* Timeout Event Occurred */ +#define BITM_AGPT1_STA1_RSTCNT (_ADI_MSK_3(0x00000100,0x00000100U, uint16_t )) /* Counter Reset Occurring */ +#define BITM_AGPT1_STA1_PDOK (_ADI_MSK_3(0x00000080,0x00000080U, uint16_t )) /* Clear Interrupt Register Synchronization */ +#define BITM_AGPT1_STA1_BUSY (_ADI_MSK_3(0x00000040,0x00000040U, uint16_t )) /* Timer Busy */ +#define BITM_AGPT1_STA1_CAP (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* Capture Event Pending */ +#define BITM_AGPT1_STA1_TMOUT (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Timeout Event Occurred */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_PWMCON1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_PWMCON1_IDLE 1 /* PWM Idle State. */ +#define BITP_AGPT1_PWMCON1_MATCHEN 0 /* PWM Match Enabled. */ +#define BITM_AGPT1_PWMCON1_IDLE (_ADI_MSK_3(0x00000002,0x00000002U, uint16_t )) /* PWM Idle State. */ +#define BITM_AGPT1_PWMCON1_MATCHEN (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* PWM Match Enabled. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_PWMMAT1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_PWMMAT1_MATCHVAL 0 /* PWM Match Value */ +#define BITM_AGPT1_PWMMAT1_MATCHVAL (_ADI_MSK_3(0x0000FFFF,0x0000FFFF, int16_t )) /* PWM Match Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AGPT1_INTEN1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AGPT1_INTEN1_INTEN 0 /* Interrupt Enable */ +#define BITM_AGPT1_INTEN1_INTEN (_ADI_MSK_3(0x00000001,0x00000001U, uint16_t )) /* Interrupt Enable */ + + +/* ============================================================================================================================ + CRC Accelerator + ============================================================================================================================ */ + +/* ============================================================================================================================ + AFECRC + ============================================================================================================================ */ +#define REG_AFECRC_CTL 0x00001000 /* AFECRC CRC Control Register */ +#define REG_AFECRC_IPDATA 0x00001004 /* AFECRC Data Input. */ +#define REG_AFECRC_RESULT 0x00001008 /* AFECRC CRC Residue */ +#define REG_AFECRC_POLY 0x0000100C /* AFECRC CRC Reduction Polynomial */ +#define REG_AFECRC_IPBITS 0x00001010 /* AFECRC Input Data Bits */ +#define REG_AFECRC_IPBYTE 0x00001014 /* AFECRC Input Data Byte */ +#define REG_AFECRC_CRC_SIG_COMP 0x00001020 /* AFECRC CRC Signature Compare Data Input. */ +#define REG_AFECRC_CRCINTEN 0x00001024 /* AFECRC CRC Error Interrupt Enable Bit */ +#define REG_AFECRC_INTSTA 0x00001028 /* AFECRC CRC Error Interrupt Status Bit */ + +/* ============================================================================================================================ + AFECRC Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_CTL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_CTL_REVID 28 /* Revision ID */ +#define BITP_AFECRC_CTL_MON_EN 9 /* Enable Apb32/Apb16 to Get Address/Data for CRC Calculation */ +#define BITP_AFECRC_CTL_W16SWP 4 /* Word16 Swap Enabled. */ +#define BITP_AFECRC_CTL_BYTMIRR 3 /* Byte Mirroring. */ +#define BITP_AFECRC_CTL_BITMIRR 2 /* Bit Mirroring. */ +#define BITP_AFECRC_CTL_LSBFIRST 1 /* LSB First Calculation Order */ +#define BITP_AFECRC_CTL_EN 0 /* CRC Peripheral Enable */ +#define BITM_AFECRC_CTL_REVID (_ADI_MSK_3(0xF0000000,0xF0000000UL, uint32_t )) /* Revision ID */ +#define BITM_AFECRC_CTL_MON_EN (_ADI_MSK_3(0x00000200,0x00000200UL, uint32_t )) /* Enable Apb32/Apb16 to Get Address/Data for CRC Calculation */ +#define BITM_AFECRC_CTL_W16SWP (_ADI_MSK_3(0x00000010,0x00000010UL, uint32_t )) /* Word16 Swap Enabled. */ +#define BITM_AFECRC_CTL_BYTMIRR (_ADI_MSK_3(0x00000008,0x00000008UL, uint32_t )) /* Byte Mirroring. */ +#define BITM_AFECRC_CTL_BITMIRR (_ADI_MSK_3(0x00000004,0x00000004UL, uint32_t )) /* Bit Mirroring. */ +#define BITM_AFECRC_CTL_LSBFIRST (_ADI_MSK_3(0x00000002,0x00000002UL, uint32_t )) /* LSB First Calculation Order */ +#define BITM_AFECRC_CTL_EN (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* CRC Peripheral Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_IPDATA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_IPDATA_VALUE 0 /* Data Input. */ +#define BITM_AFECRC_IPDATA_VALUE (_ADI_MSK_3(0xFFFFFFFF,0xFFFFFFFF, int32_t )) /* Data Input. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_RESULT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_RESULT_VALUE 0 /* CRC Residue */ +#define BITM_AFECRC_RESULT_VALUE (_ADI_MSK_3(0xFFFFFFFF,0xFFFFFFFF, int32_t )) /* CRC Residue */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_POLY Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_POLY_VALUE 0 /* CRC Reduction Polynomial */ +#define BITM_AFECRC_POLY_VALUE (_ADI_MSK_3(0xFFFFFFFF,0xFFFFFFFFUL, uint32_t )) /* CRC Reduction Polynomial */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_IPBITS Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_IPBITS_DATA_BITS 0 /* Input Data Bits. */ +#define BITM_AFECRC_IPBITS_DATA_BITS (_ADI_MSK_3(0x000000FF,0x000000FFU, uint8_t )) /* Input Data Bits. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_IPBYTE Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_IPBYTE_DATA_BYTE 0 /* Input Data Byte. */ +#define BITM_AFECRC_IPBYTE_DATA_BYTE (_ADI_MSK_3(0x000000FF,0x000000FFU, uint8_t )) /* Input Data Byte. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_CRC_SIG_COMP Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_CRC_SIG_COMP_CRC_SIG 0 /* CRC Signature Compare Data Input. */ +#define BITM_AFECRC_CRC_SIG_COMP_CRC_SIG (_ADI_MSK_3(0xFFFFFFFF,0xFFFFFFFFUL, uint32_t )) /* CRC Signature Compare Data Input. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_CRCINTEN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_CRCINTEN_RESERVED_31_1 1 /* Reserved */ +#define BITP_AFECRC_CRCINTEN_CRC_ERR_EN 0 /* CRC Error Interrupt Enable Bit */ +#define BITM_AFECRC_CRCINTEN_RESERVED_31_1 (_ADI_MSK_3(0xFFFFFFFE,0xFFFFFFFEUL, uint32_t )) /* Reserved */ +#define BITM_AFECRC_CRCINTEN_CRC_ERR_EN (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* CRC Error Interrupt Enable Bit */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFECRC_INTSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFECRC_INTSTA_CRC_ERR_ST 0 /* CRC Error Interrupt Status Bit */ +#define BITM_AFECRC_INTSTA_CRC_ERR_ST (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* CRC Error Interrupt Status Bit */ + + +/* ============================================================================================================================ + + ============================================================================================================================ */ + +/* ============================================================================================================================ + AFE + ============================================================================================================================ */ +#define REG_AFE_AFECON_RESET 0x00080000 /* Reset Value for AFECON */ +#define REG_AFE_AFECON 0x00002000 /* AFE AFE Configuration */ +#define REG_AFE_SEQCON_RESET 0x00000002 /* Reset Value for SEQCON */ +#define REG_AFE_SEQCON 0x00002004 /* AFE Sequencer Configuration */ +#define REG_AFE_FIFOCON_RESET 0x00001010 /* Reset Value for FIFOCON */ +#define REG_AFE_FIFOCON 0x00002008 /* AFE FIFOs Configuration */ +#define REG_AFE_SWCON_RESET 0x0000FFFF /* Reset Value for SWCON */ +#define REG_AFE_SWCON 0x0000200C /* AFE Switch Matrix Configuration */ +#define REG_AFE_HSDACCON_RESET 0x0000001E /* Reset Value for HSDACCON */ +#define REG_AFE_HSDACCON 0x00002010 /* AFE High Speed DAC Configuration */ +#define REG_AFE_WGCON_RESET 0x00000030 /* Reset Value for WGCON */ +#define REG_AFE_WGCON 0x00002014 /* AFE Waveform Generator Configuration */ +#define REG_AFE_WGDCLEVEL1_RESET 0x00000000 /* Reset Value for WGDCLEVEL1 */ +#define REG_AFE_WGDCLEVEL1 0x00002018 /* AFE Waveform Generator - Trapezoid DC Level 1 */ +#define REG_AFE_WGDCLEVEL2_RESET 0x00000000 /* Reset Value for WGDCLEVEL2 */ +#define REG_AFE_WGDCLEVEL2 0x0000201C /* AFE Waveform Generator - Trapezoid DC Level 2 */ +#define REG_AFE_WGDELAY1_RESET 0x00000000 /* Reset Value for WGDELAY1 */ +#define REG_AFE_WGDELAY1 0x00002020 /* AFE Waveform Generator - Trapezoid Delay 1 Time */ +#define REG_AFE_WGSLOPE1_RESET 0x00000000 /* Reset Value for WGSLOPE1 */ +#define REG_AFE_WGSLOPE1 0x00002024 /* AFE Waveform Generator - Trapezoid Slope 1 Time */ +#define REG_AFE_WGDELAY2_RESET 0x00000000 /* Reset Value for WGDELAY2 */ +#define REG_AFE_WGDELAY2 0x00002028 /* AFE Waveform Generator - Trapezoid Delay 2 Time */ +#define REG_AFE_WGSLOPE2_RESET 0x00000000 /* Reset Value for WGSLOPE2 */ +#define REG_AFE_WGSLOPE2 0x0000202C /* AFE Waveform Generator - Trapezoid Slope 2 Time */ +#define REG_AFE_WGFCW_RESET 0x00000000 /* Reset Value for WGFCW */ +#define REG_AFE_WGFCW 0x00002030 /* AFE Waveform Generator - Sinusoid Frequency Control Word */ +#define REG_AFE_WGPHASE_RESET 0x00000000 /* Reset Value for WGPHASE */ +#define REG_AFE_WGPHASE 0x00002034 /* AFE Waveform Generator - Sinusoid Phase Offset */ +#define REG_AFE_WGOFFSET_RESET 0x00000000 /* Reset Value for WGOFFSET */ +#define REG_AFE_WGOFFSET 0x00002038 /* AFE Waveform Generator - Sinusoid Offset */ +#define REG_AFE_WGAMPLITUDE_RESET 0x00000000 /* Reset Value for WGAMPLITUDE */ +#define REG_AFE_WGAMPLITUDE 0x0000203C /* AFE Waveform Generator - Sinusoid Amplitude */ +#define REG_AFE_ADCFILTERCON_RESET 0x00000301 /* Reset Value for ADCFILTERCON */ +#define REG_AFE_ADCFILTERCON 0x00002044 /* AFE ADC Output Filters Configuration */ +#define REG_AFE_HSDACDAT_RESET 0x00000800 /* Reset Value for HSDACDAT */ +#define REG_AFE_HSDACDAT 0x00002048 /* AFE HS DAC Code */ +#define REG_AFE_LPREFBUFCON_RESET 0x00000000 /* Reset Value for LPREFBUFCON */ +#define REG_AFE_LPREFBUFCON 0x00002050 /* AFE LPREF_BUF_CON */ +#define REG_AFE_SYNCEXTDEVICE_RESET 0x00000000 /* Reset Value for SYNCEXTDEVICE */ +#define REG_AFE_SYNCEXTDEVICE 0x00002054 /* AFE SYNC External Devices */ +#define REG_AFE_SEQCRC_RESET 0x00000001 /* Reset Value for SEQCRC */ +#define REG_AFE_SEQCRC 0x00002060 /* AFE Sequencer CRC Value */ +#define REG_AFE_SEQCNT_RESET 0x00000000 /* Reset Value for SEQCNT */ +#define REG_AFE_SEQCNT 0x00002064 /* AFE Sequencer Command Count */ +#define REG_AFE_SEQTIMEOUT_RESET 0x00000000 /* Reset Value for SEQTIMEOUT */ +#define REG_AFE_SEQTIMEOUT 0x00002068 /* AFE Sequencer Timeout Counter */ +#define REG_AFE_DATAFIFORD_RESET 0x00000000 /* Reset Value for DATAFIFORD */ +#define REG_AFE_DATAFIFORD 0x0000206C /* AFE Data FIFO Read */ +#define REG_AFE_CMDFIFOWRITE_RESET 0x00000000 /* Reset Value for CMDFIFOWRITE */ +#define REG_AFE_CMDFIFOWRITE 0x00002070 /* AFE Command FIFO Write */ +#define REG_AFE_ADCDAT_RESET 0x00000000 /* Reset Value for ADCDAT */ +#define REG_AFE_ADCDAT 0x00002074 /* AFE ADC Raw Result */ +#define REG_AFE_DFTREAL_RESET 0x00000000 /* Reset Value for DFTREAL */ +#define REG_AFE_DFTREAL 0x00002078 /* AFE DFT Result, Real Part */ +#define REG_AFE_DFTIMAG_RESET 0x00000000 /* Reset Value for DFTIMAG */ +#define REG_AFE_DFTIMAG 0x0000207C /* AFE DFT Result, Imaginary Part */ +#define REG_AFE_SINC2DAT_RESET 0x00000000 /* Reset Value for SINC2DAT */ +#define REG_AFE_SINC2DAT 0x00002080 /* AFE Supply Rejection Filter Result */ +#define REG_AFE_TEMPSENSDAT_RESET 0x00000000 /* Reset Value for TEMPSENSDAT */ +#define REG_AFE_TEMPSENSDAT 0x00002084 /* AFE Temperature Sensor Result */ +#define REG_AFE_AFEGENINTSTA_RESET 0x00000000 /* Reset Value for AFEGENINTSTA */ +#define REG_AFE_AFEGENINTSTA 0x0000209C /* AFE Analog Generation Interrupt */ +#define REG_AFE_ADCMIN_RESET 0x00000000 /* Reset Value for ADCMIN */ +#define REG_AFE_ADCMIN 0x000020A8 /* AFE ADC Minimum Value Check */ +#define REG_AFE_ADCMINSM_RESET 0x00000000 /* Reset Value for ADCMINSM */ +#define REG_AFE_ADCMINSM 0x000020AC /* AFE ADCMIN Hysteresis Value */ +#define REG_AFE_ADCMAX_RESET 0x00000000 /* Reset Value for ADCMAX */ +#define REG_AFE_ADCMAX 0x000020B0 /* AFE ADC Maximum Value Check */ +#define REG_AFE_ADCMAXSMEN_RESET 0x00000000 /* Reset Value for ADCMAXSMEN */ +#define REG_AFE_ADCMAXSMEN 0x000020B4 /* AFE ADCMAX Hysteresis Value */ +#define REG_AFE_ADCDELTA_RESET 0x00000000 /* Reset Value for ADCDELTA */ +#define REG_AFE_ADCDELTA 0x000020B8 /* AFE ADC Delta Value */ +#define REG_AFE_HPOSCCON_RESET 0x00000024 /* Reset Value for HPOSCCON */ +#define REG_AFE_HPOSCCON 0x000020BC /* AFE HPOSC Configuration */ +#define REG_AFE_DFTCON_RESET 0x00000090 /* Reset Value for DFTCON */ +#define REG_AFE_DFTCON 0x000020D0 /* AFE AFE DSP Configuration */ +#define REG_AFE_LPTIASW1 0x000020E0 /* AFE ULPTIA Switch Configuration for Channel 1 */ +#define REG_AFE_LPTIASW0_RESET 0x00000000 /* Reset Value for LPTIASW0 */ +#define REG_AFE_LPTIACON1 0x000020E8 /* AFE ULPTIA Control Bits Channel 1 */ +#define REG_AFE_LPTIASW0 0x000020E4 /* AFE ULPTIA Switch Configuration for Channel 0 */ +#define REG_AFE_LPTIACON0_RESET 0x00000003 /* Reset Value for LPTIACON0 */ +#define REG_AFE_LPTIACON0 0x000020EC /* AFE ULPTIA Control Bits Channel 0 */ +#define REG_AFE_HSRTIACON_RESET 0x0000000F /* Reset Value for HSRTIACON */ +#define REG_AFE_HSRTIACON 0x000020F0 /* AFE High Power RTIA Configuration */ +#define REG_AFE_DE1RESCON 0x000020F4 /* AFE DE1 HSTIA Resistors Configuration */ +#define REG_AFE_DE0RESCON_RESET 0x000000FF /* Reset Value for DE0RESCON */ +#define REG_AFE_DE0RESCON 0x000020F8 /* AFE DE0 HSTIA Resistors Configuration */ +#define REG_AFE_HSTIACON_RESET 0x00000000 /* Reset Value for HSTIACON */ +#define REG_AFE_HSTIACON 0x000020FC /* AFE HSTIA Amplifier Configuration */ +#define REG_AFE_LPMODEKEY_RESET 0x00000000 /* Reset Value for LPMODEKEY */ +#define REG_AFE_LPMODEKEY 0x0000210C /* AFE LP Mode AFE Control Lock */ +#define REG_AFE_LPMODECLKSEL_RESET 0x00000000 /* Reset Value for LPMODECLKSEL */ +#define REG_AFE_LPMODECLKSEL 0x00002110 /* AFE LFSYSCLKEN */ +#define REG_AFE_LPMODECON_RESET 0x00000102 /* Reset Value for LPMODECON */ +#define REG_AFE_LPMODECON 0x00002114 /* AFE LPMODECON */ +#define REG_AFE_SEQSLPLOCK_RESET 0x00000000 /* Reset Value for SEQSLPLOCK */ +#define REG_AFE_SEQSLPLOCK 0x00002118 /* AFE Sequencer Sleep Control Lock */ +#define REG_AFE_SEQTRGSLP_RESET 0x00000000 /* Reset Value for SEQTRGSLP */ +#define REG_AFE_SEQTRGSLP 0x0000211C /* AFE Sequencer Trigger Sleep */ +#define REG_AFE_LPDACDAT0_RESET 0x00000000 /* Reset Value for LPDACDAT0 */ +#define REG_AFE_LPDACDAT0 0x00002120 /* AFE LPDAC Data-out */ +#define REG_AFE_LPDACSW0_RESET 0x00000000 /* Reset Value for LPDACSW0 */ +#define REG_AFE_LPDACSW0 0x00002124 /* AFE LPDAC0 Switch Control */ +#define REG_AFE_LPDACCON0_RESET 0x00000002 /* Reset Value for LPDACCON0 */ +#define REG_AFE_LPDACCON0 0x00002128 /* AFE LPDAC Control Bits */ +#define REG_AFE_LPDACDAT1 0x0000212C /* AFE Low Power DAC1 data register */ +#define REG_AFE_LPDACSW1 0x00002130 /* AFE Control register for switches to LPDAC1 */ +#define REG_AFE_LPDACCON1 0x00002134 /* AFE ULP_DACCON1 */ +#define REG_AFE_DSWFULLCON_RESET 0x00000000 /* Reset Value for DSWFULLCON */ +#define REG_AFE_DSWFULLCON 0x00002150 /* AFE Switch Matrix Full Configuration (D) */ +#define REG_AFE_NSWFULLCON_RESET 0x00000000 /* Reset Value for NSWFULLCON */ +#define REG_AFE_NSWFULLCON 0x00002154 /* AFE Switch Matrix Full Configuration (N) */ +#define REG_AFE_PSWFULLCON_RESET 0x00000000 /* Reset Value for PSWFULLCON */ +#define REG_AFE_PSWFULLCON 0x00002158 /* AFE Switch Matrix Full Configuration (P) */ +#define REG_AFE_TSWFULLCON_RESET 0x00000000 /* Reset Value for TSWFULLCON */ +#define REG_AFE_TSWFULLCON 0x0000215C /* AFE Switch Matrix Full Configuration (T) */ +#define REG_AFE_TEMPSENS_RESET 0x00000000 /* Reset Value for TEMPSENS */ +#define REG_AFE_TEMPSENS 0x00002174 /* AFE Temp Sensor Configuration */ +#define REG_AFE_BUFSENCON_RESET 0x00000037 /* Reset Value for BUFSENCON */ +#define REG_AFE_BUFSENCON 0x00002180 /* AFE HP and LP Buffer Control */ +#define REG_AFE_ADCCON_RESET 0x00000000 /* Reset Value for ADCCON */ +#define REG_AFE_ADCCON 0x000021A8 /* AFE ADC Configuration */ +#define REG_AFE_DSWSTA_RESET 0x00000000 /* Reset Value for DSWSTA */ +#define REG_AFE_DSWSTA 0x000021B0 /* AFE Switch Matrix Status (D) */ +#define REG_AFE_PSWSTA_RESET 0x00006000 /* Reset Value for PSWSTA */ +#define REG_AFE_PSWSTA 0x000021B4 /* AFE Switch Matrix Status (P) */ +#define REG_AFE_NSWSTA_RESET 0x00000C00 /* Reset Value for NSWSTA */ +#define REG_AFE_NSWSTA 0x000021B8 /* AFE Switch Matrix Status (N) */ +#define REG_AFE_TSWSTA_RESET 0x00000000 /* Reset Value for TSWSTA */ +#define REG_AFE_TSWSTA 0x000021BC /* AFE Switch Matrix Status (T) */ +#define REG_AFE_STATSVAR_RESET 0x00000000 /* Reset Value for STATSVAR */ +#define REG_AFE_STATSVAR 0x000021C0 /* AFE Variance Output */ +#define REG_AFE_STATSCON_RESET 0x00000000 /* Reset Value for STATSCON */ +#define REG_AFE_STATSCON 0x000021C4 /* AFE Statistics Control */ +#define REG_AFE_STATSMEAN_RESET 0x00000000 /* Reset Value for STATSMEAN */ +#define REG_AFE_STATSMEAN 0x000021C8 /* AFE Statistics Mean Output */ +#define REG_AFE_SEQ0INFO_RESET 0x00000000 /* Reset Value for SEQ0INFO */ +#define REG_AFE_SEQ0INFO 0x000021CC /* AFE Sequence 0 Info */ +#define REG_AFE_SEQ2INFO_RESET 0x00000000 /* Reset Value for SEQ2INFO */ +#define REG_AFE_SEQ2INFO 0x000021D0 /* AFE Sequence 2 Info */ +#define REG_AFE_CMDFIFOWADDR_RESET 0x00000000 /* Reset Value for CMDFIFOWADDR */ +#define REG_AFE_CMDFIFOWADDR 0x000021D4 /* AFE Command FIFO Write Address */ +#define REG_AFE_CMDDATACON_RESET 0x00000410 /* Reset Value for CMDDATACON */ +#define REG_AFE_CMDDATACON 0x000021D8 /* AFE Command Data Control */ +#define REG_AFE_DATAFIFOTHRES_RESET 0x00000000 /* Reset Value for DATAFIFOTHRES */ +#define REG_AFE_DATAFIFOTHRES 0x000021E0 /* AFE Data FIFO Threshold */ +#define REG_AFE_SEQ3INFO_RESET 0x00000000 /* Reset Value for SEQ3INFO */ +#define REG_AFE_SEQ3INFO 0x000021E4 /* AFE Sequence 3 Info */ +#define REG_AFE_SEQ1INFO_RESET 0x00000000 /* Reset Value for SEQ1INFO */ +#define REG_AFE_SEQ1INFO 0x000021E8 /* AFE Sequence 1 Info */ +#define REG_AFE_REPEATADCCNV_RESET 0x00000160 /* Reset Value for REPEATADCCNV */ +#define REG_AFE_REPEATADCCNV 0x000021F0 /* AFE REPEAT ADC Conversions */ +#define REG_AFE_FIFOCNTSTA_RESET 0x00000000 /* Reset Value for FIFOCNTSTA */ +#define REG_AFE_FIFOCNTSTA 0x00002200 /* AFE CMD and DATA FIFO INTERNAL DATA COUNT */ +#define REG_AFE_CALDATLOCK_RESET 0x00000000 /* Reset Value for CALDATLOCK */ +#define REG_AFE_CALDATLOCK 0x00002230 /* AFE Calibration Data Lock */ +#define REG_AFE_ADCOFFSETHSTIA_RESET 0x00000000 /* Reset Value for ADCOFFSETHSTIA */ +#define REG_AFE_ADCOFFSETHSTIA 0x00002234 /* AFE ADC Offset Calibration High Speed TIA Channel */ +#define REG_AFE_ADCGAINTEMPSENS0_RESET 0x00004000 /* Reset Value for ADCGAINTEMPSENS0 */ +#define REG_AFE_ADCGAINTEMPSENS0 0x00002238 /* AFE ADC Gain Calibration Temp Sensor Channel */ +#define REG_AFE_ADCOFFSETTEMPSENS0_RESET 0x00000000 /* Reset Value for ADCOFFSETTEMPSENS0 */ +#define REG_AFE_ADCOFFSETTEMPSENS0 0x0000223C /* AFE ADC Offset Calibration Temp Sensor Channel 0 */ +#define REG_AFE_ADCGAINGN1_RESET 0x00004000 /* Reset Value for ADCGAINGN1 */ +#define REG_AFE_ADCGAINGN1 0x00002240 /* AFE ADCPGAGN1: ADC Gain Calibration Auxiliary Input Channel */ +#define REG_AFE_ADCOFFSETGN1_RESET 0x00000000 /* Reset Value for ADCOFFSETGN1 */ +#define REG_AFE_ADCOFFSETGN1 0x00002244 /* AFE ADC Offset Calibration Auxiliary Channel (PGA Gain=1) */ +#define REG_AFE_DACGAIN_RESET 0x00000800 /* Reset Value for DACGAIN */ +#define REG_AFE_DACGAIN 0x00002260 /* AFE DACGAIN */ +#define REG_AFE_DACOFFSETATTEN_RESET 0x00000000 /* Reset Value for DACOFFSETATTEN */ +#define REG_AFE_DACOFFSETATTEN 0x00002264 /* AFE DAC Offset with Attenuator Enabled (LP Mode) */ +#define REG_AFE_DACOFFSET_RESET 0x00000000 /* Reset Value for DACOFFSET */ +#define REG_AFE_DACOFFSET 0x00002268 /* AFE DAC Offset with Attenuator Disabled (LP Mode) */ +#define REG_AFE_ADCGAINGN1P5_RESET 0x00004000 /* Reset Value for ADCGAINGN1P5 */ +#define REG_AFE_ADCGAINGN1P5 0x00002270 /* AFE ADC Gain Calibration Auxiliary Input Channel (PGA Gain=1.5) */ +#define REG_AFE_ADCGAINGN2_RESET 0x00004000 /* Reset Value for ADCGAINGN2 */ +#define REG_AFE_ADCGAINGN2 0x00002274 /* AFE ADC Gain Calibration Auxiliary Input Channel (PGA Gain=2) */ +#define REG_AFE_ADCGAINGN4_RESET 0x00004000 /* Reset Value for ADCGAINGN4 */ +#define REG_AFE_ADCGAINGN4 0x00002278 /* AFE ADC Gain Calibration Auxiliary Input Channel (PGA Gain=4) */ +#define REG_AFE_ADCPGAOFFSETCANCEL_RESET 0x00000000 /* Reset Value for ADCPGAOFFSETCANCEL */ +#define REG_AFE_ADCPGAOFFSETCANCEL 0x00002280 /* AFE ADC Offset Cancellation (Optional) */ +#define REG_AFE_ADCGNHSTIA_RESET 0x00004000 /* Reset Value for ADCGNHSTIA */ +#define REG_AFE_ADCGNHSTIA 0x00002284 /* AFE ADC Gain Calibration for HS TIA Channel */ +#define REG_AFE_ADCOFFSETLPTIA0_RESET 0x00000000 /* Reset Value for ADCOFFSETLPTIA0 */ +#define REG_AFE_ADCOFFSETLPTIA0 0x00002288 /* AFE ADC Offset Calibration ULP-TIA0 Channel */ +#define REG_AFE_ADCGNLPTIA0_RESET 0x00004000 /* Reset Value for ADCGNLPTIA0 */ +#define REG_AFE_ADCGNLPTIA0 0x0000228C /* AFE ADC GAIN Calibration for LP TIA0 Channel */ +#define REG_AFE_ADCPGAGN4OFCAL_RESET 0x00004000 /* Reset Value for ADCPGAGN4OFCAL */ +#define REG_AFE_ADCPGAGN4OFCAL 0x00002294 /* AFE ADC Gain Calibration with DC Cancellation(PGA G=4) */ +#define REG_AFE_ADCGAINGN9_RESET 0x00004000 /* Reset Value for ADCGAINGN9 */ +#define REG_AFE_ADCGAINGN9 0x00002298 /* AFE ADC Gain Calibration Auxiliary Input Channel (PGA Gain=9) */ +#define REG_AFE_ADCOFFSETEMPSENS1_RESET 0x00000000 /* Reset Value for ADCOFFSETEMPSENS1 */ +#define REG_AFE_ADCOFFSETEMPSENS1 0x000022A8 /* AFE ADC Offset Calibration Temp Sensor Channel 1 */ +#define REG_AFE_ADCGAINDIOTEMPSENS_RESET 0x00004000 /* Reset Value for ADCGAINDIOTEMPSENS */ +#define REG_AFE_ADCGAINDIOTEMPSENS 0x000022AC /* AFE ADC Gain Calibration Diode Temperature Sensor Channel */ +#define REG_AFE_DACOFFSETATTENHP_RESET 0x00000000 /* Reset Value for DACOFFSETATTENHP */ +#define REG_AFE_DACOFFSETATTENHP 0x000022B8 /* AFE DAC Offset with Attenuator Enabled (HP Mode) */ +#define REG_AFE_DACOFFSETHP_RESET 0x00000000 /* Reset Value for DACOFFSETHP */ +#define REG_AFE_DACOFFSETHP 0x000022BC /* AFE DAC Offset with Attenuator Disabled (HP Mode) */ +#define REG_AFE_ADCGNLPTIA1_RESET 0x00004000 /* Reset Value for ADCGNLPTIA1 */ +#define REG_AFE_ADCOFFSETLPTIA1 0x000022C0 /* AFE ADC Offset Calibration ULP-TIA0 Channel */ +#define REG_AFE_ADCGNLPTIA1 0x000022C4 /* AFE ADC GAIN Calibration for LP TIA1 Channel */ +#define REG_AFE_ADCOFFSETGN2_RESET 0x00000000 /* Reset Value for ADCOFFSETGN2 */ +#define REG_AFE_ADCOFFSETGN2 0x000022C8 /* AFE Offset Calibration Auxiliary Channel (PGA Gain =2) */ +#define REG_AFE_ADCOFFSETGN1P5_RESET 0x00000000 /* Reset Value for ADCOFFSETGN1P5 */ +#define REG_AFE_ADCOFFSETGN1P5 0x000022CC /* AFE Offset Calibration Auxiliary Channel (PGA Gain =1.5) */ +#define REG_AFE_ADCOFFSETGN9_RESET 0x00000000 /* Reset Value for ADCOFFSETGN9 */ +#define REG_AFE_ADCOFFSETGN9 0x000022D0 /* AFE Offset Calibration Auxiliary Channel (PGA Gain =9) */ +#define REG_AFE_ADCOFFSETGN4_RESET 0x00000000 /* Reset Value for ADCOFFSETGN4 */ +#define REG_AFE_ADCOFFSETGN4 0x000022D4 /* AFE Offset Calibration Auxiliary Channel (PGA Gain =4) */ +#define REG_AFE_PMBW_RESET 0x00088800 /* Reset Value for PMBW */ +#define REG_AFE_PMBW 0x000022F0 /* AFE Power Mode Configuration */ +#define REG_AFE_SWMUX_RESET 0x00000000 /* Reset Value for SWMUX */ +#define REG_AFE_SWMUX 0x0000235C /* AFE Switch Mux for ECG */ +#define REG_AFE_AFE_TEMPSEN_DIO_RESET 0x00020000 /* Reset Value for AFE_TEMPSEN_DIO */ +#define REG_AFE_AFE_TEMPSEN_DIO 0x00002374 /* AFE AFE_TEMPSEN_DIO */ +#define REG_AFE_ADCBUFCON_RESET 0x005F3D00 /* Reset Value for ADCBUFCON */ +#define REG_AFE_ADCBUFCON 0x0000238C /* AFE Configure ADC Input Buffer */ + +/* ============================================================================================================================ + AFE Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_AFECON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_AFECON_DACBUFEN 21 /* Enable DC DAC Buffer */ +#define BITP_AFE_AFECON_DACREFEN 20 /* High Speed DAC Reference Enable */ +#define BITP_AFE_AFECON_ALDOILIMITEN 19 /* Analog LDO Current Limiting Enable */ +#define BITP_AFE_AFECON_SINC2EN 16 /* ADC Output 50/60Hz Filter Enable */ +#define BITP_AFE_AFECON_DFTEN 15 /* DFT Hardware Accelerator Enable */ +#define BITP_AFE_AFECON_WAVEGENEN 14 /* Waveform Generator Enable */ +#define BITP_AFE_AFECON_TEMPCONVEN 13 /* ADC Temp Sensor Convert Enable */ +#define BITP_AFE_AFECON_TEMPSENSEN 12 /* ADC Temperature Sensor Channel Enable */ +#define BITP_AFE_AFECON_TIAEN 11 /* High Power TIA Enable */ +#define BITP_AFE_AFECON_INAMPEN 10 /* Enable Excitation Amplifier */ +#define BITP_AFE_AFECON_EXBUFEN 9 /* Enable Excitation Buffer */ +#define BITP_AFE_AFECON_ADCCONVEN 8 /* ADC Conversion Start Enable */ +#define BITP_AFE_AFECON_ADCEN 7 /* ADC Power Enable */ +#define BITP_AFE_AFECON_DACEN 6 /* High Power DAC Enable */ +#define BITP_AFE_AFECON_HPREFDIS 5 /* Disable High Power Reference */ +#define BITM_AFE_AFECON_DACBUFEN 0x00200000 /* Enable DC DAC Buffer */ +#define BITM_AFE_AFECON_DACREFEN 0x00100000 /* High Speed DAC Reference Enable */ +#define BITM_AFE_AFECON_ALDOILIMITEN 0x00080000 /* Analog LDO Current Limiting Enable */ +#define BITM_AFE_AFECON_SINC2EN 0x00010000 /* ADC Output 50/60Hz Filter Enable */ +#define BITM_AFE_AFECON_DFTEN 0x00008000 /* DFT Hardware Accelerator Enable */ +#define BITM_AFE_AFECON_WAVEGENEN 0x00004000 /* Waveform Generator Enable */ +#define BITM_AFE_AFECON_TEMPCONVEN 0x00002000 /* ADC Temp Sensor Convert Enable */ +#define BITM_AFE_AFECON_TEMPSENSEN 0x00001000 /* ADC Temperature Sensor Channel Enable */ +#define BITM_AFE_AFECON_TIAEN 0x00000800 /* High Power TIA Enable */ +#define BITM_AFE_AFECON_INAMPEN 0x00000400 /* Enable Excitation Amplifier */ +#define BITM_AFE_AFECON_EXBUFEN 0x00000200 /* Enable Excitation Buffer */ +#define BITM_AFE_AFECON_ADCCONVEN 0x00000100 /* ADC Conversion Start Enable */ +#define BITM_AFE_AFECON_ADCEN 0x00000080 /* ADC Power Enable */ +#define BITM_AFE_AFECON_DACEN 0x00000040 /* High Power DAC Enable */ +#define BITM_AFE_AFECON_HPREFDIS 0x00000020 /* Disable High Power Reference */ +#define ENUM_AFE_AFECON_OFF 0x00000000 /* DACEN: High Power DAC Disabled */ +#define ENUM_AFE_AFECON_ON 0x00000040 /* DACEN: High Power DAC Enabled */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQCON_SEQWRTMR 8 /* Timer for Sequencer Write Commands */ +#define BITP_AFE_SEQCON_SEQHALT 4 /* Halt Seq */ +#define BITP_AFE_SEQCON_SEQHALTFIFOEMPTY 1 /* Halt Sequencer If Empty */ +#define BITP_AFE_SEQCON_SEQEN 0 /* Enable Sequencer */ +#define BITM_AFE_SEQCON_SEQWRTMR 0x0000FF00 /* Timer for Sequencer Write Commands */ +#define BITM_AFE_SEQCON_SEQHALT 0x00000010 /* Halt Seq */ +#define BITM_AFE_SEQCON_SEQHALTFIFOEMPTY 0x00000002 /* Halt Sequencer If Empty */ +#define BITM_AFE_SEQCON_SEQEN 0x00000001 /* Enable Sequencer */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_FIFOCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_FIFOCON_DATAFIFOSRCSEL 13 /* Selects the Source for the Data FIFO. */ +#define BITP_AFE_FIFOCON_DATAFIFOEN 11 /* Data FIFO Enable. */ +#define BITM_AFE_FIFOCON_DATAFIFOSRCSEL 0x0000E000 /* Selects the Source for the Data FIFO. */ +#define BITM_AFE_FIFOCON_DATAFIFOEN 0x00000800 /* Data FIFO Enable. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SWCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SWCON_T11CON 19 /* Control of T[11] */ +#define BITP_AFE_SWCON_T10CON 18 /* Control of T[10] */ +#define BITP_AFE_SWCON_T9CON 17 /* Control of T[9] */ +#define BITP_AFE_SWCON_SWSOURCESEL 16 /* Switch Control Select */ +#define BITP_AFE_SWCON_TMUXCON 12 /* Control of T Switch MUX. */ +#define BITP_AFE_SWCON_NMUXCON 8 /* Control of N Switch MUX */ +#define BITP_AFE_SWCON_PMUXCON 4 /* Control of P Switch MUX */ +#define BITP_AFE_SWCON_DMUXCON 0 /* Control of D Switch MUX */ +#define BITM_AFE_SWCON_T11CON 0x00080000 /* Control of T[11] */ +#define BITM_AFE_SWCON_T10CON 0x00040000 /* Control of T[10] */ +#define BITM_AFE_SWCON_T9CON 0x00020000 /* Control of T[9] */ +#define BITM_AFE_SWCON_SWSOURCESEL 0x00010000 /* Switch Control Select */ +#define BITM_AFE_SWCON_TMUXCON 0x0000F000 /* Control of T Switch MUX. */ +#define BITM_AFE_SWCON_NMUXCON 0x00000F00 /* Control of N Switch MUX */ +#define BITM_AFE_SWCON_PMUXCON 0x000000F0 /* Control of P Switch MUX */ +#define BITM_AFE_SWCON_DMUXCON 0x0000000F /* Control of D Switch MUX */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_HSDACCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_HSDACCON_INAMPGNMDE 12 /* Excitation Amplifier Gain Control */ +#define BITP_AFE_HSDACCON_RATE 1 /* DAC Update Rate */ +#define BITP_AFE_HSDACCON_ATTENEN 0 /* PGA Stage Gain Attenuation */ +#define BITM_AFE_HSDACCON_INAMPGNMDE 0x00001000 /* Excitation Amplifier Gain Control */ +#define BITM_AFE_HSDACCON_RATE 0x000001FE /* DAC Update Rate */ +#define BITM_AFE_HSDACCON_ATTENEN 0x00000001 /* PGA Stage Gain Attenuation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGCON_DACGAINCAL 5 /* Bypass DAC Gain */ +#define BITP_AFE_WGCON_DACOFFSETCAL 4 /* Bypass DAC Offset */ +#define BITP_AFE_WGCON_TYPESEL 1 /* Selects the Type of Waveform */ +#define BITP_AFE_WGCON_TRAPRSTEN 0 /* Resets the Trapezoid Waveform Generator */ +#define BITM_AFE_WGCON_DACGAINCAL 0x00000020 /* Bypass DAC Gain */ +#define BITM_AFE_WGCON_DACOFFSETCAL 0x00000010 /* Bypass DAC Offset */ +#define BITM_AFE_WGCON_TYPESEL 0x00000006 /* Selects the Type of Waveform */ +#define BITM_AFE_WGCON_TRAPRSTEN 0x00000001 /* Resets the Trapezoid Waveform Generator */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGDCLEVEL1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGDCLEVEL1_TRAPDCLEVEL1 0 /* DC Level 1 Value for Trapezoid Waveform Generation */ +#define BITM_AFE_WGDCLEVEL1_TRAPDCLEVEL1 0x00000FFF /* DC Level 1 Value for Trapezoid Waveform Generation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGDCLEVEL2 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGDCLEVEL2_TRAPDCLEVEL2 0 /* DC Level 2 Value for Trapezoid Waveform Generation */ +#define BITM_AFE_WGDCLEVEL2_TRAPDCLEVEL2 0x00000FFF /* DC Level 2 Value for Trapezoid Waveform Generation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGDELAY1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGDELAY1_DELAY1 0 /* Delay 1 Value for Trapezoid Waveform Generation */ +#define BITM_AFE_WGDELAY1_DELAY1 0x000FFFFF /* Delay 1 Value for Trapezoid Waveform Generation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGSLOPE1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGSLOPE1_SLOPE1 0 /* Slope 1 Value for Trapezoid Waveform Generation */ +#define BITM_AFE_WGSLOPE1_SLOPE1 0x000FFFFF /* Slope 1 Value for Trapezoid Waveform Generation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGDELAY2 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGDELAY2_DELAY2 0 /* Delay 2 Value for Trapezoid Waveform Generation */ +#define BITM_AFE_WGDELAY2_DELAY2 0x000FFFFF /* Delay 2 Value for Trapezoid Waveform Generation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGSLOPE2 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGSLOPE2_SLOPE2 0 /* Slope 2 Value for Trapezoid Waveform Generation. */ +#define BITM_AFE_WGSLOPE2_SLOPE2 0x000FFFFF /* Slope 2 Value for Trapezoid Waveform Generation. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGFCW Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGFCW_SINEFCW 0 /* Sinusoid Generator Frequency Control Word */ +#define BITM_AFE_WGFCW_SINEFCW 0x00FFFFFF /* Sinusoid Generator Frequency Control Word */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGPHASE Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGPHASE_SINEOFFSET 0 /* Sinusoid Phase Offset */ +#define BITM_AFE_WGPHASE_SINEOFFSET 0x000FFFFF /* Sinusoid Phase Offset */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGOFFSET Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGOFFSET_SINEOFFSET 0 /* Sinusoid Offset */ +#define BITM_AFE_WGOFFSET_SINEOFFSET 0x00000FFF /* Sinusoid Offset */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_WGAMPLITUDE Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_WGAMPLITUDE_SINEAMPLITUDE 0 /* Sinusoid Amplitude */ +#define BITM_AFE_WGAMPLITUDE_SINEAMPLITUDE 0x000007FF /* Sinusoid Amplitude */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCFILTERCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCFILTERCON_AVRGNUM 14 /* Number of Samples Averaged */ +#define BITP_AFE_ADCFILTERCON_SINC3OSR 12 /* SINC3 OSR */ +#define BITP_AFE_ADCFILTERCON_SINC2OSR 8 /* SINC2 OSR */ +#define BITP_AFE_ADCFILTERCON_AVRGEN 7 /* Average Function Enable */ +#define BITP_AFE_ADCFILTERCON_SINC3BYP 6 /* SINC3 Filter Bypass */ +#define BITP_AFE_ADCFILTERCON_LPFBYPEN 4 /* 50/60Hz Low Pass Filter */ +#define BITP_AFE_ADCFILTERCON_ADCCLK 0 /* ADC Data Rate */ +#define BITM_AFE_ADCFILTERCON_AVRGNUM 0x0000C000 /* Number of Samples Averaged */ +#define BITM_AFE_ADCFILTERCON_SINC3OSR 0x00003000 /* SINC3 OSR */ +#define BITM_AFE_ADCFILTERCON_SINC2OSR 0x00000F00 /* SINC2 OSR */ +#define BITM_AFE_ADCFILTERCON_AVRGEN 0x00000080 /* Average Function Enable */ +#define BITM_AFE_ADCFILTERCON_SINC3BYP 0x00000040 /* SINC3 Filter Bypass */ +#define BITM_AFE_ADCFILTERCON_LPFBYPEN 0x00000010 /* 50/60Hz Low Pass Filter */ +#define BITM_AFE_ADCFILTERCON_ADCCLK 0x00000001 /* ADC Data Rate */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_HSDACDAT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_HSDACDAT_DACDAT 0 /* DAC Code */ +#define BITM_AFE_HSDACDAT_DACDAT 0x00000FFF /* DAC Code */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPREFBUFCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPREFBUFCON_BOOSTCURRENT 2 /* Set: Drive 2 Dac ;Unset Drive 1 Dac, and Save Power */ +#define BITP_AFE_LPREFBUFCON_LPBUF2P5DIS 1 /* Low Power Bandgap's Output Buffer */ +#define BITP_AFE_LPREFBUFCON_LPREFDIS 0 /* Set This Bit Will Power Down Low Power Bandgap */ +#define BITM_AFE_LPREFBUFCON_BOOSTCURRENT 0x00000004 /* Set: Drive 2 Dac ;Unset Drive 1 Dac, and Save Power */ +#define BITM_AFE_LPREFBUFCON_LPBUF2P5DIS 0x00000002 /* Low Power Bandgap's Output Buffer */ +#define BITM_AFE_LPREFBUFCON_LPREFDIS 0x00000001 /* Set This Bit Will Power Down Low Power Bandgap */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SYNCEXTDEVICE Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SYNCEXTDEVICE_SYNC 0 /* As Output Data of GPIO */ +#define BITM_AFE_SYNCEXTDEVICE_SYNC 0x000000FF /* As Output Data of GPIO */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQCRC Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQCRC_CRC 0 /* Sequencer Command CRC Value. */ +#define BITM_AFE_SEQCRC_CRC 0x000000FF /* Sequencer Command CRC Value. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQCNT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQCNT_COUNT 0 /* Sequencer Command Count */ +#define BITM_AFE_SEQCNT_COUNT 0x0000FFFF /* Sequencer Command Count */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQTIMEOUT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQTIMEOUT_TIMEOUT 0 /* Current Value of the Sequencer Timeout Counter. */ +#define BITM_AFE_SEQTIMEOUT_TIMEOUT 0x3FFFFFFF /* Current Value of the Sequencer Timeout Counter. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DATAFIFORD Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DATAFIFORD_DATAFIFOOUT 0 /* Data FIFO Read */ +#define BITM_AFE_DATAFIFORD_DATAFIFOOUT 0x0000FFFF /* Data FIFO Read */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_CMDFIFOWRITE Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_CMDFIFOWRITE_CMDFIFOIN 0 /* Command FIFO Write. */ +#define BITM_AFE_CMDFIFOWRITE_CMDFIFOIN 0xFFFFFFFF /* Command FIFO Write. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCDAT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCDAT_DATA 0 /* ADC Result */ +#define BITM_AFE_ADCDAT_DATA 0x0000FFFF /* ADC Result */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DFTREAL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DFTREAL_DATA 0 /* DFT Real */ +#define BITM_AFE_DFTREAL_DATA 0x0003FFFF /* DFT Real */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DFTIMAG Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DFTIMAG_DATA 0 /* DFT Imaginary */ +#define BITM_AFE_DFTIMAG_DATA 0x0003FFFF /* DFT Imaginary */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SINC2DAT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SINC2DAT_DATA 0 /* LPF Result */ +#define BITM_AFE_SINC2DAT_DATA 0x0000FFFF /* LPF Result */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_TEMPSENSDAT Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_TEMPSENSDAT_DATA 0 /* Temp Sensor */ +#define BITM_AFE_TEMPSENSDAT_DATA 0x0000FFFF /* Temp Sensor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_AFEGENINTSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_AFEGENINTSTA_CUSTOMIRQ3 3 /* Custom IRQ 3. */ +#define BITP_AFE_AFEGENINTSTA_CUSTOMIRQ2 2 /* Custom IRQ 2 */ +#define BITP_AFE_AFEGENINTSTA_CUSTOMIRQ1 1 /* Custom IRQ 1. */ +#define BITP_AFE_AFEGENINTSTA_CUSTOMIRQ0 0 /* Custom IRQ 0 */ +#define BITM_AFE_AFEGENINTSTA_CUSTOMIRQ3 0x00000008 /* Custom IRQ 3. */ +#define BITM_AFE_AFEGENINTSTA_CUSTOMIRQ2 0x00000004 /* Custom IRQ 2 */ +#define BITM_AFE_AFEGENINTSTA_CUSTOMIRQ1 0x00000002 /* Custom IRQ 1. */ +#define BITM_AFE_AFEGENINTSTA_CUSTOMIRQ0 0x00000001 /* Custom IRQ 0 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCMIN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCMIN_MINVAL 0 /* ADC Minimum Value Threshold */ +#define BITM_AFE_ADCMIN_MINVAL 0x0000FFFF /* ADC Minimum Value Threshold */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCMINSM Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCMINSM_MINCLRVAL 0 /* ADCMIN Hysteresis Value */ +#define BITM_AFE_ADCMINSM_MINCLRVAL 0x0000FFFF /* ADCMIN Hysteresis Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCMAX Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCMAX_MAXVAL 0 /* ADC Max Threshold */ +#define BITM_AFE_ADCMAX_MAXVAL 0x0000FFFF /* ADC Max Threshold */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCMAXSMEN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCMAXSMEN_MAXSWEN 0 /* ADCMAX Hysteresis Value */ +#define BITM_AFE_ADCMAXSMEN_MAXSWEN 0x0000FFFF /* ADCMAX Hysteresis Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCDELTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCDELTA_DELTAVAL 0 /* ADCDAT Code Differences Limit Option */ +#define BITM_AFE_ADCDELTA_DELTAVAL 0x0000FFFF /* ADCDAT Code Differences Limit Option */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_HPOSCCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_HPOSCCON_CLK32MHZEN 2 /* 16M/32M Output Selector Signal. */ +#define BITM_AFE_HPOSCCON_CLK32MHZEN 0x00000004 /* 16M/32M Output Selector Signal. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DFTCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DFTCON_DFTINSEL 20 /* DFT Input Select */ +#define BITP_AFE_DFTCON_DFTNUM 4 /* ADC Samples Used */ +#define BITP_AFE_DFTCON_HANNINGEN 0 /* Hanning Window Enable */ +#define BITM_AFE_DFTCON_DFTINSEL 0x00300000 /* DFT Input Select */ +#define BITM_AFE_DFTCON_DFTNUM 0x000000F0 /* ADC Samples Used */ +#define BITM_AFE_DFTCON_HANNINGEN 0x00000001 /* Hanning Window Enable */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPTIASW1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPTIASW1_TIABIASSEL 13 /* TIA SW13 Control. Active High */ +#define BITP_AFE_LPTIASW1_PABIASSEL 12 /* TIA SW12 Control. Active High */ +#define BITP_AFE_LPTIASW1_TIASWCON 0 /* TIA SW[11:0] Control */ +#define BITM_AFE_LPTIASW1_TIABIASSEL (_ADI_MSK_3(0x00002000,0x00002000UL, uint32_t )) /* TIA SW13 Control. Active High */ +#define BITM_AFE_LPTIASW1_PABIASSEL (_ADI_MSK_3(0x00001000,0x00001000UL, uint32_t )) /* TIA SW12 Control. Active High */ +#define BITM_AFE_LPTIASW1_TIASWCON (_ADI_MSK_3(0x00000FFF,0x00000FFFUL, uint32_t )) /* TIA SW[11:0] Control */ +#define ENUM_AFE_LPTIASW1_CAPA_LP (_ADI_MSK_3(0x00000014,0x00000014UL, uint32_t )) /* TIASWCON: CAPA test with LP TIA */ +#define ENUM_AFE_LPTIASW1_NORM (_ADI_MSK_3(0x0000002C,0x0000002CUL, uint32_t )) /* TIASWCON: Normal work mode */ +#define ENUM_AFE_LPTIASW1_DIO (_ADI_MSK_3(0x0000002D,0x0000002DUL, uint32_t )) /* TIASWCON: Normal work mode with back-back diode enabled. */ +#define ENUM_AFE_LPTIASW1_SHORTSW (_ADI_MSK_3(0x0000002E,0x0000002EUL, uint32_t )) /* TIASWCON: Work mode with short switch protection */ +#define ENUM_AFE_LPTIASW1_LOWNOISE (_ADI_MSK_3(0x0000006C,0x0000006CUL, uint32_t )) /* TIASWCON: Work mode, vzero-vbias=0. */ +#define ENUM_AFE_LPTIASW1_CAPA_RAMP_H (_ADI_MSK_3(0x00000094,0x00000094UL, uint32_t )) /* TIASWCON: CAPA test or Ramp test with HP TIA */ +#define ENUM_AFE_LPTIASW1_BUFDIS (_ADI_MSK_3(0x00000180,0x00000180UL, uint32_t )) /* TIASWCON: Set PA/TIA as unity gain buffer. */ +#define ENUM_AFE_LPTIASW1_BUFEN (_ADI_MSK_3(0x000001A4,0x000001A4UL, uint32_t )) /* TIASWCON: Set PA/TIA as unity gain buffer. Connect amp's output to CE1 & RC11. */ +#define ENUM_AFE_LPTIASW1_TWOLEAD (_ADI_MSK_3(0x0000042C,0x0000042CUL, uint32_t )) /* TIASWCON: Two lead sensor, set PA as unity gain buffer. */ +#define ENUM_AFE_LPTIASW1_BUFEN2 (_ADI_MSK_3(0x000004A4,0x000004A4UL, uint32_t )) /* TIASWCON: Set PA/TIA as unity gain buffer. */ +#define ENUM_AFE_LPTIASW1_SESHORTRE (_ADI_MSK_3(0x00000800,0x00000800UL, uint32_t )) /* TIASWCON: Close SW11 - Short SE1 to RE1, */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPTIASW0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPTIASW0_RECAL 15 /* TIA SW15 Control. Active High */ +#define BITP_AFE_LPTIASW0_VZEROSHARE 14 /* TIA SW14 Control. Active High */ +#define BITP_AFE_LPTIASW0_TIABIASSEL 13 /* TIA SW13 Control. Active High */ +#define BITP_AFE_LPTIASW0_PABIASSEL 12 /* TIA SW12 Control. Active High */ +#define BITP_AFE_LPTIASW0_TIASWCON 0 /* TIA SW[11:0] Control */ +#define BITM_AFE_LPTIASW0_RECAL 0x00008000 /* TIA SW15 Control. Active High */ +#define BITM_AFE_LPTIASW0_VZEROSHARE 0x00004000 /* TIA SW14 Control. Active High */ +#define BITM_AFE_LPTIASW0_TIABIASSEL 0x00002000 /* TIA SW13 Control. Active High */ +#define BITM_AFE_LPTIASW0_PABIASSEL 0x00001000 /* TIA SW12 Control. Active High */ +#define BITM_AFE_LPTIASW0_TIASWCON 0x00000FFF /* TIA SW[11:0] Control */ +#define ENUM_AFE_LPTIASW0_11 0x00000014 /* TIASWCON: CAPA test with LP TIA */ +#define ENUM_AFE_LPTIASW0_NORM 0x0000002C /* TIASWCON: Normal work mode */ +#define ENUM_AFE_LPTIASW0_DIO 0x0000002D /* TIASWCON: Normal work mode with back-back diode enabled. */ +#define ENUM_AFE_LPTIASW0_SHORTSW 0x0000002E /* TIASWCON: Work mode with short switch protection */ +#define ENUM_AFE_LPTIASW0_LOWNOISE 0x0000006C /* TIASWCON: Work mode, vzero-vbias=0. */ +#define ENUM_AFE_LPTIASW0_1 0x00000094 /* TIASWCON: CAPA test or Ramp test with HP TIA */ +#define ENUM_AFE_LPTIASW0_BUFDIS 0x00000180 /* TIASWCON: Set PA/TIA as unity gain buffer. */ +#define ENUM_AFE_LPTIASW0_BUFEN 0x000001A4 /* TIASWCON: Set PA/TIA as unity gain buffer. Connect amp's output to CE0 & RC01. */ +#define ENUM_AFE_LPTIASW0_TWOLEAD 0x0000042C /* TIASWCON: Two lead sensor, set PA as unity gain buffer. */ +#define ENUM_AFE_LPTIASW0_BUFEN2 0x000004A4 /* TIASWCON: Set PA/TIA as unity gain buffer. */ +#define ENUM_AFE_LPTIASW0_SESHORTRE 0x00000800 /* TIASWCON: Close SW11 - Short SE0 to RE0. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPTIACON1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPTIACON1_CHOPEN 16 /* Chopping Enable */ +#define BITP_AFE_LPTIACON1_TIARF 13 /* Set LPF Resistor */ +#define BITP_AFE_LPTIACON1_TIARL 10 /* Set RLOAD */ +#define BITP_AFE_LPTIACON1_TIAGAIN 5 /* Set RTIA Gain Resistor */ +#define BITP_AFE_LPTIACON1_IBOOST 3 /* Current Boost Control */ +#define BITP_AFE_LPTIACON1_HALFPWR 2 /* Half Power Mode Select */ +#define BITP_AFE_LPTIACON1_PAPDEN 1 /* PA Power Down */ +#define BITP_AFE_LPTIACON1_TIAPDEN 0 /* TIA Power Down */ +#define BITM_AFE_LPTIACON1_CHOPEN (_ADI_MSK_3(0x00030000,0x00030000UL, uint32_t )) /* Chopping Enable */ +#define BITM_AFE_LPTIACON1_TIARF (_ADI_MSK_3(0x0000E000,0x0000E000UL, uint32_t )) /* Set LPF Resistor */ +#define BITM_AFE_LPTIACON1_TIARL (_ADI_MSK_3(0x00001C00,0x00001C00UL, uint32_t )) /* Set RLOAD */ +#define BITM_AFE_LPTIACON1_TIAGAIN (_ADI_MSK_3(0x000003E0,0x000003E0UL, uint32_t )) /* Set RTIA Gain Resistor */ +#define BITM_AFE_LPTIACON1_IBOOST (_ADI_MSK_3(0x00000018,0x00000018UL, uint32_t )) /* Current Boost Control */ +#define BITM_AFE_LPTIACON1_HALFPWR (_ADI_MSK_3(0x00000004,0x00000004UL, uint32_t )) /* Half Power Mode Select */ +#define BITM_AFE_LPTIACON1_PAPDEN (_ADI_MSK_3(0x00000002,0x00000002UL, uint32_t )) /* PA Power Down */ +#define BITM_AFE_LPTIACON1_TIAPDEN (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* TIA Power Down */ +#define ENUM_AFE_LPTIACON1_DISCONRF (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* TIARF: Disconnect TIA output from LPF pin */ +#define ENUM_AFE_LPTIACON1_BYPRF (_ADI_MSK_3(0x00002000,0x00002000UL, uint32_t )) /* TIARF: Bypass resistor */ +#define ENUM_AFE_LPTIACON1_RF20K (_ADI_MSK_3(0x00004000,0x00004000UL, uint32_t )) /* TIARF: 20k Ohm */ +#define ENUM_AFE_LPTIACON1_RF100K (_ADI_MSK_3(0x00006000,0x00006000UL, uint32_t )) /* TIARF: 100k Ohm */ +#define ENUM_AFE_LPTIACON1_RF200K (_ADI_MSK_3(0x00008000,0x00008000UL, uint32_t )) /* TIARF: 200k Ohm */ +#define ENUM_AFE_LPTIACON1_RF400K (_ADI_MSK_3(0x0000A000,0x0000A000UL, uint32_t )) /* TIARF: 400k Ohm */ +#define ENUM_AFE_LPTIACON1_RF600K (_ADI_MSK_3(0x0000C000,0x0000C000UL, uint32_t )) /* TIARF: 600k Ohm */ +#define ENUM_AFE_LPTIACON1_RF1MOHM (_ADI_MSK_3(0x0000E000,0x0000E000UL, uint32_t )) /* TIARF: 1Meg Ohm */ +#define ENUM_AFE_LPTIACON1_RL0 (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* TIARL: 0 ohm */ +#define ENUM_AFE_LPTIACON1_RL10 (_ADI_MSK_3(0x00000400,0x00000400UL, uint32_t )) /* TIARL: 10 ohm */ +#define ENUM_AFE_LPTIACON1_RL30 (_ADI_MSK_3(0x00000800,0x00000800UL, uint32_t )) /* TIARL: 30 ohm */ +#define ENUM_AFE_LPTIACON1_RL50 (_ADI_MSK_3(0x00000C00,0x00000C00UL, uint32_t )) /* TIARL: 50 ohm */ +#define ENUM_AFE_LPTIACON1_RL100 (_ADI_MSK_3(0x00001000,0x00001000UL, uint32_t )) /* TIARL: 100 ohm */ +#define ENUM_AFE_LPTIACON1_RL1P6K (_ADI_MSK_3(0x00001400,0x00001400UL, uint32_t )) /* TIARL: 1.6kohm */ +#define ENUM_AFE_LPTIACON1_RL3P1K (_ADI_MSK_3(0x00001800,0x00001800UL, uint32_t )) /* TIARL: 3.1kohm */ +#define ENUM_AFE_LPTIACON1_RL3P5K (_ADI_MSK_3(0x00001C00,0x00001C00UL, uint32_t )) /* TIARL: 3.6kohm */ +#define ENUM_AFE_LPTIACON1_DISCONTIA (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* TIAGAIN: Disconnect TIA Gain resistor */ +#define ENUM_AFE_LPTIACON1_TIAGAIN200 (_ADI_MSK_3(0x00000020,0x00000020UL, uint32_t )) /* TIAGAIN: 200 Ohm */ +#define ENUM_AFE_LPTIACON1_TIAGAIN1K (_ADI_MSK_3(0x00000040,0x00000040UL, uint32_t )) /* TIAGAIN: 1k ohm */ +#define ENUM_AFE_LPTIACON1_TIAGAIN2K (_ADI_MSK_3(0x00000060,0x00000060UL, uint32_t )) /* TIAGAIN: 2k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN3K (_ADI_MSK_3(0x00000080,0x00000080UL, uint32_t )) /* TIAGAIN: 3k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN4K (_ADI_MSK_3(0x000000A0,0x000000A0UL, uint32_t )) /* TIAGAIN: 4k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN6K (_ADI_MSK_3(0x000000C0,0x000000C0UL, uint32_t )) /* TIAGAIN: 6k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN8K (_ADI_MSK_3(0x000000E0,0x000000E0UL, uint32_t )) /* TIAGAIN: 8k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN10K (_ADI_MSK_3(0x00000100,0x00000100UL, uint32_t )) /* TIAGAIN: 10k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN12K (_ADI_MSK_3(0x00000120,0x00000120UL, uint32_t )) /* TIAGAIN: 12k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN16K (_ADI_MSK_3(0x00000140,0x00000140UL, uint32_t )) /* TIAGAIN: 16k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN20K (_ADI_MSK_3(0x00000160,0x00000160UL, uint32_t )) /* TIAGAIN: 20k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN24K (_ADI_MSK_3(0x00000180,0x00000180UL, uint32_t )) /* TIAGAIN: 24k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN30K (_ADI_MSK_3(0x000001A0,0x000001A0UL, uint32_t )) /* TIAGAIN: 30k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN32K (_ADI_MSK_3(0x000001C0,0x000001C0UL, uint32_t )) /* TIAGAIN: 32k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN40K (_ADI_MSK_3(0x000001E0,0x000001E0UL, uint32_t )) /* TIAGAIN: 40k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN48K (_ADI_MSK_3(0x00000200,0x00000200UL, uint32_t )) /* TIAGAIN: 48k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN64K (_ADI_MSK_3(0x00000220,0x00000220UL, uint32_t )) /* TIAGAIN: 64k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN85K (_ADI_MSK_3(0x00000240,0x00000240UL, uint32_t )) /* TIAGAIN: 85k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN96K (_ADI_MSK_3(0x00000260,0x00000260UL, uint32_t )) /* TIAGAIN: 96k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN100K (_ADI_MSK_3(0x00000280,0x00000280UL, uint32_t )) /* TIAGAIN: 100k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN120K (_ADI_MSK_3(0x000002A0,0x000002A0UL, uint32_t )) /* TIAGAIN: 120k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN128K (_ADI_MSK_3(0x000002C0,0x000002C0UL, uint32_t )) /* TIAGAIN: 128k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN160K (_ADI_MSK_3(0x000002E0,0x000002E0UL, uint32_t )) /* TIAGAIN: 160k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN196K (_ADI_MSK_3(0x00000300,0x00000300UL, uint32_t )) /* TIAGAIN: 196k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN256K (_ADI_MSK_3(0x00000320,0x00000320UL, uint32_t )) /* TIAGAIN: 256k */ +#define ENUM_AFE_LPTIACON1_TIAGAIN512K (_ADI_MSK_3(0x00000340,0x00000340UL, uint32_t )) /* TIAGAIN: 512k */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPTIACON0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPTIACON0_CHOPEN 16 /* Chopping Enable */ +#define BITP_AFE_LPTIACON0_TIARF 13 /* Set LPF Resistor */ +#define BITP_AFE_LPTIACON0_TIARL 10 /* Set RLOAD */ +#define BITP_AFE_LPTIACON0_TIAGAIN 5 /* Set RTIA */ +#define BITP_AFE_LPTIACON0_IBOOST 3 /* Current Boost Control */ +#define BITP_AFE_LPTIACON0_HALFPWR 2 /* Half Power Mode Select */ +#define BITP_AFE_LPTIACON0_PAPDEN 1 /* PA Power Down */ +#define BITP_AFE_LPTIACON0_TIAPDEN 0 /* TIA Power Down */ +#define BITM_AFE_LPTIACON0_CHOPEN 0x00030000 /* Chopping Enable */ +#define BITM_AFE_LPTIACON0_TIARF 0x0000E000 /* Set LPF Resistor */ +#define BITM_AFE_LPTIACON0_TIARL 0x00001C00 /* Set RLOAD */ +#define BITM_AFE_LPTIACON0_TIAGAIN 0x000003E0 /* Set RTIA */ +#define BITM_AFE_LPTIACON0_IBOOST 0x00000018 /* Current Boost Control */ +#define BITM_AFE_LPTIACON0_HALFPWR 0x00000004 /* Half Power Mode Select */ +#define BITM_AFE_LPTIACON0_PAPDEN 0x00000002 /* PA Power Down */ +#define BITM_AFE_LPTIACON0_TIAPDEN 0x00000001 /* TIA Power Down */ +#define ENUM_AFE_LPTIACON0_DISCONRF 0x00000000 /* TIARF: Disconnect TIA output from LPF pin */ +#define ENUM_AFE_LPTIACON0_BYPRF 0x00002000 /* TIARF: Bypass resistor */ +#define ENUM_AFE_LPTIACON0_RF20K 0x00004000 /* TIARF: 20k Ohm */ +#define ENUM_AFE_LPTIACON0_RF100K 0x00006000 /* TIARF: 100k Ohm */ +#define ENUM_AFE_LPTIACON0_RF200K 0x00008000 /* TIARF: 200k Ohm */ +#define ENUM_AFE_LPTIACON0_RF400K 0x0000A000 /* TIARF: 400k Ohm */ +#define ENUM_AFE_LPTIACON0_RF600K 0x0000C000 /* TIARF: 600k Ohm */ +#define ENUM_AFE_LPTIACON0_RF1MOHM 0x0000E000 /* TIARF: 1Meg Ohm */ +#define ENUM_AFE_LPTIACON0_RL0 0x00000000 /* TIARL: 0 ohm */ +#define ENUM_AFE_LPTIACON0_RL10 0x00000400 /* TIARL: 10 ohm */ +#define ENUM_AFE_LPTIACON0_RL30 0x00000800 /* TIARL: 30 ohm */ +#define ENUM_AFE_LPTIACON0_RL50 0x00000C00 /* TIARL: 50 ohm */ +#define ENUM_AFE_LPTIACON0_RL100 0x00001000 /* TIARL: 100 ohm */ +#define ENUM_AFE_LPTIACON0_RL1P6K 0x00001400 /* TIARL: 1.6kohm */ +#define ENUM_AFE_LPTIACON0_RL3P1K 0x00001800 /* TIARL: 3.1kohm */ +#define ENUM_AFE_LPTIACON0_RL3P5K 0x00001C00 /* TIARL: 3.6kohm */ +#define ENUM_AFE_LPTIACON0_DISCONTIA 0x00000000 /* TIAGAIN: Disconnect TIA Gain resistor */ +#define ENUM_AFE_LPTIACON0_TIAGAIN200 0x00000020 /* TIAGAIN: 200 Ohm */ +#define ENUM_AFE_LPTIACON0_TIAGAIN1K 0x00000040 /* TIAGAIN: 1k ohm */ +#define ENUM_AFE_LPTIACON0_TIAGAIN2K 0x00000060 /* TIAGAIN: 2k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN3K 0x00000080 /* TIAGAIN: 3k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN4K 0x000000A0 /* TIAGAIN: 4k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN6K 0x000000C0 /* TIAGAIN: 6k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN8K 0x000000E0 /* TIAGAIN: 8k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN10K 0x00000100 /* TIAGAIN: 10k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN12K 0x00000120 /* TIAGAIN: 12k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN16K 0x00000140 /* TIAGAIN: 16k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN20K 0x00000160 /* TIAGAIN: 20k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN24K 0x00000180 /* TIAGAIN: 24k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN30K 0x000001A0 /* TIAGAIN: 30k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN32K 0x000001C0 /* TIAGAIN: 32k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN40K 0x000001E0 /* TIAGAIN: 40k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN48K 0x00000200 /* TIAGAIN: 48k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN64K 0x00000220 /* TIAGAIN: 64k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN85K 0x00000240 /* TIAGAIN: 85k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN96K 0x00000260 /* TIAGAIN: 96k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN100K 0x00000280 /* TIAGAIN: 100k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN120K 0x000002A0 /* TIAGAIN: 120k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN128K 0x000002C0 /* TIAGAIN: 128k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN160K 0x000002E0 /* TIAGAIN: 160k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN196K 0x00000300 /* TIAGAIN: 196k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN256K 0x00000320 /* TIAGAIN: 256k */ +#define ENUM_AFE_LPTIACON0_TIAGAIN512K 0x00000340 /* TIAGAIN: 512k */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_HSRTIACON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_HSRTIACON_CTIACON 5 /* Configure Capacitor in Parallel with RTIA */ +#define BITP_AFE_HSRTIACON_TIASW6CON 4 /* SW6 Control */ +#define BITP_AFE_HSRTIACON_RTIACON 0 /* Configure General RTIA Value */ +#define BITM_AFE_HSRTIACON_CTIACON 0x00001FE0 /* Configure Capacitor in Parallel with RTIA */ +#define BITM_AFE_HSRTIACON_TIASW6CON 0x00000010 /* SW6 Control */ +#define BITM_AFE_HSRTIACON_RTIACON 0x0000000F /* Configure General RTIA Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DE1RESCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DE1RESCON_DE1RCON 0 /* DE1 RLOAD RTIA Setting */ +#define BITM_AFE_DE1RESCON_DE1RCON (_ADI_MSK_3(0x000000FF,0x000000FFUL, uint32_t )) /* DE1 RLOAD RTIA Setting */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DE0RESCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DE0RESCON_DE0RCON 0 /* DE0 RLOAD RTIA Setting */ +#define BITM_AFE_DE0RESCON_DE0RCON 0x000000FF /* DE0 RLOAD RTIA Setting */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_HSTIACON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_HSTIACON_VBIASSEL 0 /* Select HSTIA Positive Input */ +#define BITM_AFE_HSTIACON_VBIASSEL 0x00000003 /* Select HSTIA Positive Input */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DACDCBUFCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DACDCBUFCON_CHANSEL 1 /* DAC DC Channel Selection */ +#define BITP_AFE_DACDCBUFCON_RESERVED_0 0 /* Reserved */ +#define BITM_AFE_DACDCBUFCON_CHANSEL (_ADI_MSK_3(0x00000002,0x00000002UL, uint32_t )) /* DAC DC Channel Selection */ +#define BITM_AFE_DACDCBUFCON_RESERVED_0 (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* Reserved */ +#define ENUM_AFE_DACDCBUFCON_CHAN0 (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* CHANSEL: ULPDAC0 Sets DC level */ +#define ENUM_AFE_DACDCBUFCON_CHAN1 (_ADI_MSK_3(0x00000002,0x00000002UL, uint32_t )) /* CHANSEL: ULPDAC1 Sets DC level */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPMODEKEY Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPMODEKEY_KEY 0 /* LP Key */ +#define BITM_AFE_LPMODEKEY_KEY 0x000FFFFF /* LP Key */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPMODECLKSEL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPMODECLKSEL_LFSYSCLKEN 0 /* Enable Switching System Clock to 32KHz by Sequencer */ +#define BITM_AFE_LPMODECLKSEL_LFSYSCLKEN 0x00000001 /* Enable Switching System Clock to 32KHz by Sequencer */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPMODECON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPMODECON_ALDOEN 8 /* Set High to Power Down of Analog LDO */ +#define BITP_AFE_LPMODECON_V1P1HPADCEN 7 /* Set High to Enable 1.1V HP CM Buffer */ +#define BITP_AFE_LPMODECON_V1P8HPADCEN 6 /* Set High to Enable HP 1.8V Reference Buffer */ +#define BITP_AFE_LPMODECON_PTATEN 5 /* Set to High to Generate Ptat Current Bias */ +#define BITP_AFE_LPMODECON_ZTATEN 4 /* Set High to Generate Ztat Current Bias */ +#define BITP_AFE_LPMODECON_REPEATADCCNVEN_P 3 /* Set High to Enable Repeat ADC Conversion */ +#define BITP_AFE_LPMODECON_ADCCONVEN 2 /* Set High to Enable ADC Conversion */ +#define BITP_AFE_LPMODECON_HPREFDIS 1 /* Set High to Power Down HP Reference */ +#define BITP_AFE_LPMODECON_HFOSCPD 0 /* Set High to Power Down HP Power Oscillator */ +#define BITM_AFE_LPMODECON_ALDOEN 0x00000100 /* Set High to Power Down of Analog LDO */ +#define BITM_AFE_LPMODECON_V1P1HPADCEN 0x00000080 /* Set High to Enable 1.1V HP CM Buffer */ +#define BITM_AFE_LPMODECON_V1P8HPADCEN 0x00000040 /* Set High to Enable HP 1.8V Reference Buffer */ +#define BITM_AFE_LPMODECON_PTATEN 0x00000020 /* Set to High to Generate Ptat Current Bias */ +#define BITM_AFE_LPMODECON_ZTATEN 0x00000010 /* Set High to Generate Ztat Current Bias */ +#define BITM_AFE_LPMODECON_REPEATADCCNVEN_P 0x00000008 /* Set High to Enable Repeat ADC Conversion */ +#define BITM_AFE_LPMODECON_ADCCONVEN 0x00000004 /* Set High to Enable ADC Conversion */ +#define BITM_AFE_LPMODECON_HPREFDIS 0x00000002 /* Set High to Power Down HP Reference */ +#define BITM_AFE_LPMODECON_HFOSCPD 0x00000001 /* Set High to Power Down HP Power Oscillator */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQSLPLOCK Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQSLPLOCK_SEQ_SLP_PW 0 /* Password for SLPBYSEQ Register */ +#define BITM_AFE_SEQSLPLOCK_SEQ_SLP_PW 0x000FFFFF /* Password for SLPBYSEQ Register */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQTRGSLP Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQTRGSLP_TRGSLP 0 /* Trigger Sleep by Sequencer */ +#define BITM_AFE_SEQTRGSLP_TRGSLP 0x00000001 /* Trigger Sleep by Sequencer */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPDACDAT0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPDACDAT0_DACIN6 12 /* 6BITVAL, 1LSB=34.375mV */ +#define BITP_AFE_LPDACDAT0_DACIN12 0 /* 12BITVAL, 1LSB=537uV */ +#define BITM_AFE_LPDACDAT0_DACIN6 0x0003F000 /* 6BITVAL, 1LSB=34.375mV */ +#define BITM_AFE_LPDACDAT0_DACIN12 0x00000FFF /* 12BITVAL, 1LSB=537uV */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPDACSW0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPDACSW0_LPMODEDIS 5 /* Switch Control */ +#define BITP_AFE_LPDACSW0_LPDACSW 0 /* LPDAC0 Switches Matrix */ +#define BITM_AFE_LPDACSW0_LPMODEDIS 0x00000020 /* Switch Control */ +#define BITM_AFE_LPDACSW0_LPDACSW 0x0000001F /* LPDAC0 Switches Matrix */ +#define ENUM_AFE_LPDACSW0_DACCONBIT5 0x00000000 /* LPMODEDIS: REG_AFE_LPDACDAT0 Switch controlled by REG_AFE_LPDACDAT0CON0 bit 5 */ +#define ENUM_AFE_LPDACSW0_OVRRIDE 0x00000020 /* LPMODEDIS: REG_AFE_LPDACDAT0 Switches override */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPDACCON0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPDACCON0_WAVETYPE 6 /* LPDAC Data Source */ +#define BITP_AFE_LPDACCON0_DACMDE 5 /* LPDAC0 Switch Settings */ +#define BITP_AFE_LPDACCON0_VZEROMUX 4 /* VZERO MUX Select */ +#define BITP_AFE_LPDACCON0_VBIASMUX 3 /* VBIAS MUX Select */ +#define BITP_AFE_LPDACCON0_REFSEL 2 /* Reference Select Bit */ +#define BITP_AFE_LPDACCON0_PWDEN 1 /* LPDAC0 Power Down */ +#define BITP_AFE_LPDACCON0_RSTEN 0 /* Enable Writes to REG_AFE_LPDACDAT00 */ +#define BITM_AFE_LPDACCON0_WAVETYPE 0x00000040 /* LPDAC Data Source */ +#define BITM_AFE_LPDACCON0_DACMDE 0x00000020 /* LPDAC0 Switch Settings */ +#define BITM_AFE_LPDACCON0_VZEROMUX 0x00000010 /* VZERO MUX Select */ +#define BITM_AFE_LPDACCON0_VBIASMUX 0x00000008 /* VBIAS MUX Select */ +#define BITM_AFE_LPDACCON0_REFSEL 0x00000004 /* Reference Select Bit */ +#define BITM_AFE_LPDACCON0_PWDEN 0x00000002 /* LPDAC0 Power Down */ +#define BITM_AFE_LPDACCON0_RSTEN 0x00000001 /* Enable Writes to REG_AFE_LPDACDAT00 */ +#define ENUM_AFE_LPDACCON0_MMR 0x00000000 /* WAVETYPE: Direct from REG_AFE_LPDACDAT0DAT0 */ +#define ENUM_AFE_LPDACCON0_WAVEGEN 0x00000040 /* WAVETYPE: Waveform generator */ +#define ENUM_AFE_LPDACCON0_NORM 0x00000000 /* DACMDE: REG_AFE_LPDACDAT00 switches set for normal mode */ +#define ENUM_AFE_LPDACCON0_DIAG 0x00000020 /* DACMDE: REG_AFE_LPDACDAT00 switches set for Diagnostic mode */ +#define ENUM_AFE_LPDACCON0_BITS6 0x00000000 /* VZEROMUX: VZERO 6BIT */ +#define ENUM_AFE_LPDACCON0_BITS12 0x00000010 /* VZEROMUX: VZERO 12BIT */ +#define ENUM_AFE_LPDACCON0_12BIT 0x00000000 /* VBIASMUX: Output 12Bit */ +#define ENUM_AFE_LPDACCON0_EN 0x00000008 /* VBIASMUX: output 6Bit */ +#define ENUM_AFE_LPDACCON0_ULPREF 0x00000000 /* REFSEL: ULP2P5V Ref */ +#define ENUM_AFE_LPDACCON0_AVDD 0x00000004 /* REFSEL: AVDD Reference */ +#define ENUM_AFE_LPDACCON0_PWREN 0x00000000 /* PWDEN: REG_AFE_LPDACDAT00 Powered On */ +#define ENUM_AFE_LPDACCON0_PWRDIS 0x00000002 /* PWDEN: REG_AFE_LPDACDAT00 Powered Off */ +#define ENUM_AFE_LPDACCON0_WRITEDIS 0x00000000 /* RSTEN: Disable REG_AFE_LPDACDAT00 Writes */ +#define ENUM_AFE_LPDACCON0_WRITEEN 0x00000001 /* RSTEN: Enable REG_AFE_LPDACDAT00 Writes */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPDACDAT1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPDACDAT1_DACIN6 12 /* 6BITVAL, 1LSB=34.375mV */ +#define BITP_AFE_LPDACDAT1_DACIN12 0 /* 12BITVAL, 1LSB=537uV */ +#define BITM_AFE_LPDACDAT1_DACIN6 (_ADI_MSK_3(0x0003F000,0x0003F000UL, uint32_t )) /* 6BITVAL, 1LSB=34.375mV */ +#define BITM_AFE_LPDACDAT1_DACIN12 (_ADI_MSK_3(0x00000FFF,0x00000FFFUL, uint32_t )) /* 12BITVAL, 1LSB=537uV */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPDACSW1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPDACSW1_LPMODEDIS 5 /* Switch Control */ +#define BITP_AFE_LPDACSW1_LPDACSW 0 /* ULPDAC0 Switches Matrix */ +#define BITM_AFE_LPDACSW1_LPMODEDIS (_ADI_MSK_3(0x00000020,0x00000020UL, uint32_t )) /* Switch Control */ +#define BITM_AFE_LPDACSW1_LPDACSW (_ADI_MSK_3(0x0000001F,0x0000001FUL, uint32_t )) /* ULPDAC0 Switches Matrix */ +#define ENUM_AFE_LPDACSW1_DACCONBIT5 (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* LPMODEDIS: ULPDAC Switch controlled by ULPDACCON1 bit 5 */ +#define ENUM_AFE_LPDACSW1_OVRRIDE (_ADI_MSK_3(0x00000020,0x00000020UL, uint32_t )) /* LPMODEDIS: ULPDAC Switches override */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_LPDACCON1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_LPDACCON1_WAVETYPE 6 /* DAC Input Source */ +#define BITP_AFE_LPDACCON1_DACMDE 5 /* LPDAC1 Switch Settings */ +#define BITP_AFE_LPDACCON1_VZEROMUX 4 /* VZEROOUT */ +#define BITP_AFE_LPDACCON1_VBIASMUX 3 /* BITSEL */ +#define BITP_AFE_LPDACCON1_REFSEL 2 /* REFSEL */ +#define BITP_AFE_LPDACCON1_PWDEN 1 /* ULPDAC0 Power */ +#define BITP_AFE_LPDACCON1_RSTEN 0 /* Enable Writes to ULPDAC1 */ +#define BITM_AFE_LPDACCON1_WAVETYPE (_ADI_MSK_3(0x00000040,0x00000040UL, uint32_t )) /* DAC Input Source */ +#define BITM_AFE_LPDACCON1_DACMDE (_ADI_MSK_3(0x00000020,0x00000020UL, uint32_t )) /* LPDAC1 Switch Settings */ +#define BITM_AFE_LPDACCON1_VZEROMUX (_ADI_MSK_3(0x00000010,0x00000010UL, uint32_t )) /* VZEROOUT */ +#define BITM_AFE_LPDACCON1_VBIASMUX (_ADI_MSK_3(0x00000008,0x00000008UL, uint32_t )) /* BITSEL */ +#define BITM_AFE_LPDACCON1_REFSEL (_ADI_MSK_3(0x00000004,0x00000004UL, uint32_t )) /* REFSEL */ +#define BITM_AFE_LPDACCON1_PWDEN (_ADI_MSK_3(0x00000002,0x00000002UL, uint32_t )) /* ULPDAC0 Power */ +#define BITM_AFE_LPDACCON1_RSTEN (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* Enable Writes to ULPDAC1 */ +#define ENUM_AFE_LPDACCON1_NORM (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* DACMDE: ULPDAC1 switches set for normal mode */ +#define ENUM_AFE_LPDACCON1_DIAG (_ADI_MSK_3(0x00000020,0x00000020UL, uint32_t )) /* DACMDE: ULPDAC1 switches set for Diagnostic mode */ +#define ENUM_AFE_LPDACCON1_BITS6 (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* VZEROMUX: VZERO 6BIT */ +#define ENUM_AFE_LPDACCON1_BITS12 (_ADI_MSK_3(0x00000010,0x00000010UL, uint32_t )) /* VZEROMUX: VZERO 12BIT */ +#define ENUM_AFE_LPDACCON1_DIS (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* VBIASMUX: 12BIT Output */ +#define ENUM_AFE_LPDACCON1_EN (_ADI_MSK_3(0x00000008,0x00000008UL, uint32_t )) /* VBIASMUX: 6BIT Output */ +#define ENUM_AFE_LPDACCON1_ULPREF (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) +#define ENUM_AFE_LPDACCON1_AVDD (_ADI_MSK_3(0x00000004,0x00000004UL, uint32_t )) +#define ENUM_AFE_LPDACCON1_PWREN (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* PWDEN: ULPDAC1 Powered On */ +#define ENUM_AFE_LPDACCON1_PWRDIS (_ADI_MSK_3(0x00000002,0x00000002UL, uint32_t )) /* PWDEN: ULPDAC1 Powered Off */ +#define ENUM_AFE_LPDACCON1_WRITEDIS (_ADI_MSK_3(0x00000000,0x00000000UL, uint32_t )) /* RSTEN: Disable ULPDAC1 Writes */ +#define ENUM_AFE_LPDACCON1_WRITEEN (_ADI_MSK_3(0x00000001,0x00000001UL, uint32_t )) /* RSTEN: Enable ULPDAC1 Writes */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DSWFULLCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DSWFULLCON_D8 7 /* Control of D8 Switch. */ +#define BITP_AFE_DSWFULLCON_D7 6 /* Control of D7 Switch. */ +#define BITP_AFE_DSWFULLCON_D6 5 /* Control of D6 Switch. */ +#define BITP_AFE_DSWFULLCON_D5 4 /* Control of D5 Switch. */ +#define BITP_AFE_DSWFULLCON_D4 3 /* Control of D4 Switch. */ +#define BITP_AFE_DSWFULLCON_D3 2 /* Control of D3 Switch. */ +#define BITP_AFE_DSWFULLCON_D2 1 /* Control of D2 Switch. */ +#define BITP_AFE_DSWFULLCON_DR0 0 /* Control of Dr0 Switch. */ +#define BITM_AFE_DSWFULLCON_D8 0x00000080 /* Control of D8 Switch. */ +#define BITM_AFE_DSWFULLCON_D7 0x00000040 /* Control of D7 Switch. */ +#define BITM_AFE_DSWFULLCON_D6 0x00000020 /* Control of D6 Switch. */ +#define BITM_AFE_DSWFULLCON_D5 0x00000010 /* Control of D5 Switch. */ +#define BITM_AFE_DSWFULLCON_D4 0x00000008 /* Control of D4 Switch. */ +#define BITM_AFE_DSWFULLCON_D3 0x00000004 /* Control of D3 Switch. */ +#define BITM_AFE_DSWFULLCON_D2 0x00000002 /* Control of D2 Switch. */ +#define BITM_AFE_DSWFULLCON_DR0 0x00000001 /* Control of Dr0 Switch. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_NSWFULLCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_NSWFULLCON_NL2 11 /* Control of NL2 Switch. */ +#define BITP_AFE_NSWFULLCON_NL 10 /* Control of NL Switch. */ +#define BITP_AFE_NSWFULLCON_NR1 9 /* Control of Nr1 Switch. Set Will Close Nr1, Unset Open */ +#define BITP_AFE_NSWFULLCON_N9 8 /* Control of N9 Switch. Set Will Close N9, Unset Open */ +#define BITP_AFE_NSWFULLCON_N8 7 /* Control of N8 Switch. Set Will Close N8, Unset Open */ +#define BITP_AFE_NSWFULLCON_N7 6 /* Control of N7 Switch. Set Will Close N7, Unset Open */ +#define BITP_AFE_NSWFULLCON_N6 5 /* Control of N6 Switch. Set Will Close N6, Unset Open */ +#define BITP_AFE_NSWFULLCON_N5 4 /* Control of N5 Switch. Set Will Close N5, Unset Open */ +#define BITP_AFE_NSWFULLCON_N4 3 /* Control of N4 Switch. Set Will Close N4, Unset Open */ +#define BITP_AFE_NSWFULLCON_N3 2 /* Control of N3 Switch. Set Will Close N3, Unset Open */ +#define BITP_AFE_NSWFULLCON_N2 1 /* Control of N2 Switch. Set Will Close N2, Unset Open */ +#define BITP_AFE_NSWFULLCON_N1 0 /* Control of N1 Switch. Set Will Close N1, Unset Open */ +#define BITM_AFE_NSWFULLCON_NL2 0x00000800 /* Control of NL2 Switch. */ +#define BITM_AFE_NSWFULLCON_NL 0x00000400 /* Control of NL Switch. */ +#define BITM_AFE_NSWFULLCON_NR1 0x00000200 /* Control of Nr1 Switch. Set Will Close Nr1, Unset Open */ +#define BITM_AFE_NSWFULLCON_N9 0x00000100 /* Control of N9 Switch. Set Will Close N9, Unset Open */ +#define BITM_AFE_NSWFULLCON_N8 0x00000080 /* Control of N8 Switch. Set Will Close N8, Unset Open */ +#define BITM_AFE_NSWFULLCON_N7 0x00000040 /* Control of N7 Switch. Set Will Close N7, Unset Open */ +#define BITM_AFE_NSWFULLCON_N6 0x00000020 /* Control of N6 Switch. Set Will Close N6, Unset Open */ +#define BITM_AFE_NSWFULLCON_N5 0x00000010 /* Control of N5 Switch. Set Will Close N5, Unset Open */ +#define BITM_AFE_NSWFULLCON_N4 0x00000008 /* Control of N4 Switch. Set Will Close N4, Unset Open */ +#define BITM_AFE_NSWFULLCON_N3 0x00000004 /* Control of N3 Switch. Set Will Close N3, Unset Open */ +#define BITM_AFE_NSWFULLCON_N2 0x00000002 /* Control of N2 Switch. Set Will Close N2, Unset Open */ +#define BITM_AFE_NSWFULLCON_N1 0x00000001 /* Control of N1 Switch. Set Will Close N1, Unset Open */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_PSWFULLCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_PSWFULLCON_PL2 14 /* PL2 Switch Control */ +#define BITP_AFE_PSWFULLCON_PL 13 /* PL Switch Control */ +#define BITP_AFE_PSWFULLCON_P12 11 /* Control of P12 Switch. Set Will Close P12, Unset Open */ +#define BITP_AFE_PSWFULLCON_P11 10 /* Control of P11 Switch. Set Will Close P11, Unset Open */ +#define BITP_AFE_PSWFULLCON_P10 9 /* P10 Switch Control */ +#define BITP_AFE_PSWFULLCON_P9 8 /* Control of P9 Switch. Set Will Close P9, Unset Open */ +#define BITP_AFE_PSWFULLCON_P8 7 /* Control of P8 Switch. Set Will Close P8, Unset Open */ +#define BITP_AFE_PSWFULLCON_P7 6 /* Control of P7 Switch. Set Will Close P7, Unset Open */ +#define BITP_AFE_PSWFULLCON_P6 5 /* Control of P6 Switch. Set Will Close P6, Unset Open */ +#define BITP_AFE_PSWFULLCON_P5 4 /* Control of P5 Switch. Set Will Close P5, Unset Open */ +#define BITP_AFE_PSWFULLCON_P4 3 /* Control of P4 Switch. Set Will Close P4, Unset Open */ +#define BITP_AFE_PSWFULLCON_P3 2 /* Control of P3 Switch. Set Will Close P3, Unset Open */ +#define BITP_AFE_PSWFULLCON_P2 1 /* Control of P2 Switch. Set Will Close P2, Unset Open */ +#define BITP_AFE_PSWFULLCON_PR0 0 /* PR0 Switch Control */ +#define BITM_AFE_PSWFULLCON_PL2 0x00004000 /* PL2 Switch Control */ +#define BITM_AFE_PSWFULLCON_PL 0x00002000 /* PL Switch Control */ +#define BITM_AFE_PSWFULLCON_P12 0x00000800 /* Control of P12 Switch. Set Will Close P12, Unset Open */ +#define BITM_AFE_PSWFULLCON_P11 0x00000400 /* Control of P11 Switch. Set Will Close P11, Unset Open */ +#define BITM_AFE_PSWFULLCON_P10 0x00000200 /* P10 Switch Control */ +#define BITM_AFE_PSWFULLCON_P9 0x00000100 /* Control of P9 Switch. Set Will Close P9, Unset Open */ +#define BITM_AFE_PSWFULLCON_P8 0x00000080 /* Control of P8 Switch. Set Will Close P8, Unset Open */ +#define BITM_AFE_PSWFULLCON_P7 0x00000040 /* Control of P7 Switch. Set Will Close P7, Unset Open */ +#define BITM_AFE_PSWFULLCON_P6 0x00000020 /* Control of P6 Switch. Set Will Close P6, Unset Open */ +#define BITM_AFE_PSWFULLCON_P5 0x00000010 /* Control of P5 Switch. Set Will Close P5, Unset Open */ +#define BITM_AFE_PSWFULLCON_P4 0x00000008 /* Control of P4 Switch. Set Will Close P4, Unset Open */ +#define BITM_AFE_PSWFULLCON_P3 0x00000004 /* Control of P3 Switch. Set Will Close P3, Unset Open */ +#define BITM_AFE_PSWFULLCON_P2 0x00000002 /* Control of P2 Switch. Set Will Close P2, Unset Open */ +#define BITM_AFE_PSWFULLCON_PR0 0x00000001 /* PR0 Switch Control */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_TSWFULLCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_TSWFULLCON_TR1 11 /* Control of Tr1 Switch. Set Will Close Tr1, Unset Open */ +#define BITP_AFE_TSWFULLCON_T11 10 /* Control of T11 Switch. Set Will Close T11, Unset Open */ +#define BITP_AFE_TSWFULLCON_T10 9 /* Control of T10 Switch. Set Will Close T10, Unset Open */ +#define BITP_AFE_TSWFULLCON_T9 8 /* Control of T9 Switch. Set Will Close T9, Unset Open */ +#define BITP_AFE_TSWFULLCON_T7 6 /* Control of T7 Switch. Set Will Close T7, Unset Open */ +#define BITP_AFE_TSWFULLCON_T5 4 /* Control of T5 Switch. Set Will Close T5, Unset Open */ +#define BITP_AFE_TSWFULLCON_T4 3 /* Control of T4 Switch. Set Will Close T4, Unset Open */ +#define BITP_AFE_TSWFULLCON_T3 2 /* Control of T3 Switch. Set Will Close T3, Unset Open */ +#define BITP_AFE_TSWFULLCON_T2 1 /* Control of T2 Switch. Set Will Close T2, Unset Open */ +#define BITP_AFE_TSWFULLCON_T1 0 /* Control of T1 Switch. Set Will Close T1, Unset Open */ +#define BITM_AFE_TSWFULLCON_TR1 0x00000800 /* Control of Tr1 Switch. Set Will Close Tr1, Unset Open */ +#define BITM_AFE_TSWFULLCON_T11 0x00000400 /* Control of T11 Switch. Set Will Close T11, Unset Open */ +#define BITM_AFE_TSWFULLCON_T10 0x00000200 /* Control of T10 Switch. Set Will Close T10, Unset Open */ +#define BITM_AFE_TSWFULLCON_T9 0x00000100 /* Control of T9 Switch. Set Will Close T9, Unset Open */ +#define BITM_AFE_TSWFULLCON_T7 0x00000040 /* Control of T7 Switch. Set Will Close T7, Unset Open */ +#define BITM_AFE_TSWFULLCON_T5 0x00000010 /* Control of T5 Switch. Set Will Close T5, Unset Open */ +#define BITM_AFE_TSWFULLCON_T4 0x00000008 /* Control of T4 Switch. Set Will Close T4, Unset Open */ +#define BITM_AFE_TSWFULLCON_T3 0x00000004 /* Control of T3 Switch. Set Will Close T3, Unset Open */ +#define BITM_AFE_TSWFULLCON_T2 0x00000002 /* Control of T2 Switch. Set Will Close T2, Unset Open */ +#define BITM_AFE_TSWFULLCON_T1 0x00000001 /* Control of T1 Switch. Set Will Close T1, Unset Open */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_TEMPSENS Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_TEMPSENS_CHOPFRESEL 2 /* Chop Mode Frequency Setting */ +#define BITP_AFE_TEMPSENS_CHOPCON 1 /* Temp Sensor Chop Mode */ +#define BITP_AFE_TEMPSENS_ENABLE 0 /* Unused */ +#define BITM_AFE_TEMPSENS_CHOPFRESEL 0x0000000C /* Chop Mode Frequency Setting */ +#define BITM_AFE_TEMPSENS_CHOPCON 0x00000002 /* Temp Sensor Chop Mode */ +#define BITM_AFE_TEMPSENS_ENABLE 0x00000001 /* Unused */ +#define ENUM_AFE_TEMPSENS_DIS 0x00000000 /* CHOPCON: Disable chop */ +#define ENUM_AFE_TEMPSENS_EN 0x00000002 /* CHOPCON: Enable chop */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_BUFSENCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_BUFSENCON_V1P8THERMSTEN 8 /* Buffered Reference Output */ +#define BITP_AFE_BUFSENCON_V1P1LPADCCHGDIS 6 /* Controls Decoupling Cap Discharge Switch */ +#define BITP_AFE_BUFSENCON_V1P1LPADCEN 5 /* ADC 1.1V LP Buffer */ +#define BITP_AFE_BUFSENCON_V1P1HPADCEN 4 /* Enable 1.1V HP CM Buffer */ +#define BITP_AFE_BUFSENCON_V1P8HPADCCHGDIS 3 /* Controls Decoupling Cap Discharge Switch */ +#define BITP_AFE_BUFSENCON_V1P8LPADCEN 2 /* ADC 1.8V LP Reference Buffer */ +#define BITP_AFE_BUFSENCON_V1P8HPADCILIMITEN 1 /* HP ADC Input Current Limit */ +#define BITP_AFE_BUFSENCON_V1P8HPADCEN 0 /* HP 1.8V Reference Buffer */ +#define BITM_AFE_BUFSENCON_V1P8THERMSTEN 0x00000100 /* Buffered Reference Output */ +#define BITM_AFE_BUFSENCON_V1P1LPADCCHGDIS 0x00000040 /* Controls Decoupling Cap Discharge Switch */ +#define BITM_AFE_BUFSENCON_V1P1LPADCEN 0x00000020 /* ADC 1.1V LP Buffer */ +#define BITM_AFE_BUFSENCON_V1P1HPADCEN 0x00000010 /* Enable 1.1V HP CM Buffer */ +#define BITM_AFE_BUFSENCON_V1P8HPADCCHGDIS 0x00000008 /* Controls Decoupling Cap Discharge Switch */ +#define BITM_AFE_BUFSENCON_V1P8LPADCEN 0x00000004 /* ADC 1.8V LP Reference Buffer */ +#define BITM_AFE_BUFSENCON_V1P8HPADCILIMITEN 0x00000002 /* HP ADC Input Current Limit */ +#define BITM_AFE_BUFSENCON_V1P8HPADCEN 0x00000001 /* HP 1.8V Reference Buffer */ +#define ENUM_AFE_BUFSENCON_DIS 0x00000000 /* V1P8THERMSTEN: Disable 1.8V Buffered Reference output */ +#define ENUM_AFE_BUFSENCON_EN 0x00000100 /* V1P8THERMSTEN: Enable 1.8V Buffered Reference output */ +#define ENUM_AFE_BUFSENCON_ENCHRG 0x00000000 /* V1P1LPADCCHGDIS: Open switch */ +#define ENUM_AFE_BUFSENCON_DISCHRG 0x00000040 /* V1P1LPADCCHGDIS: Close Switch */ +#define ENUM_AFE_BUFSENCON_DISABLE 0x00000000 /* V1P1LPADCEN: Disable ADC 1.8V LP Reference Buffer */ +#define ENUM_AFE_BUFSENCON_ENABLE 0x00000020 /* V1P1LPADCEN: Enable ADC 1.8V LP Reference Buffer */ +#define ENUM_AFE_BUFSENCON_OFF 0x00000000 /* V1P1HPADCEN: Disable 1.1V HP Common Mode Buffer */ +#define ENUM_AFE_BUFSENCON_ON 0x00000010 /* V1P1HPADCEN: Enable 1.1V HP Common Mode Buffer */ +#define ENUM_AFE_BUFSENCON_OPEN 0x00000000 /* V1P8HPADCCHGDIS: Open switch */ +#define ENUM_AFE_BUFSENCON_CLOSED 0x00000008 /* V1P8HPADCCHGDIS: Close Switch */ +#define ENUM_AFE_BUFSENCON_LPADCREF_DIS 0x00000000 /* V1P8LPADCEN: Disable LP 1.8V Reference Buffer */ +#define ENUM_AFE_BUFSENCON_LPADCREF_EN 0x00000004 /* V1P8LPADCEN: Enable LP 1.8V Reference Buffer */ +#define ENUM_AFE_BUFSENCON_LIMIT_DIS 0x00000000 /* V1P8HPADCILIMITEN: Disable buffer Current Limit */ +#define ENUM_AFE_BUFSENCON_LIMIT_EN 0x00000002 /* V1P8HPADCILIMITEN: Enable buffer Current Limit */ +#define ENUM_AFE_BUFSENCON_HPBUF_DIS 0x00000000 /* V1P8HPADCEN: Disable 1.8V HP ADC Reference Buffer */ +#define ENUM_AFE_BUFSENCON_HPBUF_EN 0x00000001 /* V1P8HPADCEN: Enable 1.8V HP ADC Reference Buffer */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCCON_GNPGA 16 /* PGA Gain Setup */ +#define BITP_AFE_ADCCON_GNOFSELPGA 15 /* Internal Offset/Gain Cancellation */ +#define BITP_AFE_ADCCON_GNOFFSEL 13 /* Obsolete */ +#define BITP_AFE_ADCCON_MUXSELN 8 /* Select Negative Input */ +#define BITP_AFE_ADCCON_MUXSELP 0 /* Select Positive Input */ +#define BITM_AFE_ADCCON_GNPGA 0x00070000 /* PGA Gain Setup */ +#define BITM_AFE_ADCCON_GNOFSELPGA 0x00008000 /* Internal Offset/Gain Cancellation */ +#define BITM_AFE_ADCCON_GNOFFSEL 0x00006000 /* Obsolete */ +#define BITM_AFE_ADCCON_MUXSELN 0x00001F00 /* Select Negative Input */ +#define BITM_AFE_ADCCON_MUXSELP 0x0000003F /* Select Positive Input */ +#define ENUM_AFE_ADCCON_RESERVED 0x00000011 /* MUXSELP: Reserved */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DSWSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DSWSTA_D8STA 7 /* Status of D8 Switch. */ +#define BITP_AFE_DSWSTA_D7STA 6 /* Status of D7 Switch. */ +#define BITP_AFE_DSWSTA_D6STA 5 /* Status of D6 Switch. */ +#define BITP_AFE_DSWSTA_D5STA 4 /* Status of D5 Switch. */ +#define BITP_AFE_DSWSTA_D4STA 3 /* Status of D4 Switch. */ +#define BITP_AFE_DSWSTA_D3STA 2 /* Status of D3 Switch. */ +#define BITP_AFE_DSWSTA_D2STA 1 /* Status of D2 Switch. */ +#define BITP_AFE_DSWSTA_D1STA 0 /* Status of Dr0 Switch. */ +#define BITM_AFE_DSWSTA_D8STA 0x00000080 /* Status of D8 Switch. */ +#define BITM_AFE_DSWSTA_D7STA 0x00000040 /* Status of D7 Switch. */ +#define BITM_AFE_DSWSTA_D6STA 0x00000020 /* Status of D6 Switch. */ +#define BITM_AFE_DSWSTA_D5STA 0x00000010 /* Status of D5 Switch. */ +#define BITM_AFE_DSWSTA_D4STA 0x00000008 /* Status of D4 Switch. */ +#define BITM_AFE_DSWSTA_D3STA 0x00000004 /* Status of D3 Switch. */ +#define BITM_AFE_DSWSTA_D2STA 0x00000002 /* Status of D2 Switch. */ +#define BITM_AFE_DSWSTA_D1STA 0x00000001 /* Status of Dr0 Switch. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_PSWSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_PSWSTA_PL2STA 14 /* PL Switch Control */ +#define BITP_AFE_PSWSTA_PLSTA 13 /* PL Switch Control */ +#define BITP_AFE_PSWSTA_P13STA 12 /* Status of P13 Switch. */ +#define BITP_AFE_PSWSTA_P12STA 11 /* Status of P12 Switch. */ +#define BITP_AFE_PSWSTA_P11STA 10 /* Status of P11 Switch. */ +#define BITP_AFE_PSWSTA_P10STA 9 /* Status of P10 Switch. */ +#define BITP_AFE_PSWSTA_P9STA 8 /* Status of P9 Switch. */ +#define BITP_AFE_PSWSTA_P8STA 7 /* Status of P8 Switch. */ +#define BITP_AFE_PSWSTA_P7STA 6 /* Status of P7 Switch. */ +#define BITP_AFE_PSWSTA_P6STA 5 /* Status of P6 Switch. */ +#define BITP_AFE_PSWSTA_P5STA 4 /* Status of P5 Switch. */ +#define BITP_AFE_PSWSTA_P4STA 3 /* Status of P4 Switch. */ +#define BITP_AFE_PSWSTA_P3STA 2 /* Status of P3 Switch. */ +#define BITP_AFE_PSWSTA_P2STA 1 /* Status of P2 Switch. */ +#define BITP_AFE_PSWSTA_PR0STA 0 /* PR0 Switch Control */ +#define BITM_AFE_PSWSTA_PL2STA 0x00004000 /* PL Switch Control */ +#define BITM_AFE_PSWSTA_PLSTA 0x00002000 /* PL Switch Control */ +#define BITM_AFE_PSWSTA_P13STA 0x00001000 /* Status of P13 Switch. */ +#define BITM_AFE_PSWSTA_P12STA 0x00000800 /* Status of P12 Switch. */ +#define BITM_AFE_PSWSTA_P11STA 0x00000400 /* Status of P11 Switch. */ +#define BITM_AFE_PSWSTA_P10STA 0x00000200 /* Status of P10 Switch. */ +#define BITM_AFE_PSWSTA_P9STA 0x00000100 /* Status of P9 Switch. */ +#define BITM_AFE_PSWSTA_P8STA 0x00000080 /* Status of P8 Switch. */ +#define BITM_AFE_PSWSTA_P7STA 0x00000040 /* Status of P7 Switch. */ +#define BITM_AFE_PSWSTA_P6STA 0x00000020 /* Status of P6 Switch. */ +#define BITM_AFE_PSWSTA_P5STA 0x00000010 /* Status of P5 Switch. */ +#define BITM_AFE_PSWSTA_P4STA 0x00000008 /* Status of P4 Switch. */ +#define BITM_AFE_PSWSTA_P3STA 0x00000004 /* Status of P3 Switch. */ +#define BITM_AFE_PSWSTA_P2STA 0x00000002 /* Status of P2 Switch. */ +#define BITM_AFE_PSWSTA_PR0STA 0x00000001 /* PR0 Switch Control */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_NSWSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_NSWSTA_NL2STA 11 /* Status of NL2 Switch. */ +#define BITP_AFE_NSWSTA_NLSTA 10 /* Status of NL Switch. */ +#define BITP_AFE_NSWSTA_NR1STA 9 /* Status of NR1 Switch. */ +#define BITP_AFE_NSWSTA_N9STA 8 /* Status of N9 Switch. */ +#define BITP_AFE_NSWSTA_N8STA 7 /* Status of N8 Switch. */ +#define BITP_AFE_NSWSTA_N7STA 6 /* Status of N7 Switch. */ +#define BITP_AFE_NSWSTA_N6STA 5 /* Status of N6 Switch. */ +#define BITP_AFE_NSWSTA_N5STA 4 /* Status of N5 Switch. */ +#define BITP_AFE_NSWSTA_N4STA 3 /* Status of N4 Switch. */ +#define BITP_AFE_NSWSTA_N3STA 2 /* Status of N3 Switch. */ +#define BITP_AFE_NSWSTA_N2STA 1 /* Status of N2 Switch. */ +#define BITP_AFE_NSWSTA_N1STA 0 /* Status of N1 Switch. */ +#define BITM_AFE_NSWSTA_NL2STA 0x00000800 /* Status of NL2 Switch. */ +#define BITM_AFE_NSWSTA_NLSTA 0x00000400 /* Status of NL Switch. */ +#define BITM_AFE_NSWSTA_NR1STA 0x00000200 /* Status of NR1 Switch. */ +#define BITM_AFE_NSWSTA_N9STA 0x00000100 /* Status of N9 Switch. */ +#define BITM_AFE_NSWSTA_N8STA 0x00000080 /* Status of N8 Switch. */ +#define BITM_AFE_NSWSTA_N7STA 0x00000040 /* Status of N7 Switch. */ +#define BITM_AFE_NSWSTA_N6STA 0x00000020 /* Status of N6 Switch. */ +#define BITM_AFE_NSWSTA_N5STA 0x00000010 /* Status of N5 Switch. */ +#define BITM_AFE_NSWSTA_N4STA 0x00000008 /* Status of N4 Switch. */ +#define BITM_AFE_NSWSTA_N3STA 0x00000004 /* Status of N3 Switch. */ +#define BITM_AFE_NSWSTA_N2STA 0x00000002 /* Status of N2 Switch. */ +#define BITM_AFE_NSWSTA_N1STA 0x00000001 /* Status of N1 Switch. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_TSWSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_TSWSTA_TR1STA 11 /* Status of TR1 Switch. */ +#define BITP_AFE_TSWSTA_T11STA 10 /* Status of T11 Switch. */ +#define BITP_AFE_TSWSTA_T10STA 9 /* Status of T10 Switch. */ +#define BITP_AFE_TSWSTA_T9STA 8 /* Status of T9 Switch. */ +#define BITP_AFE_TSWSTA_T8STA 7 /* Status of T8 Switch. */ +#define BITP_AFE_TSWSTA_T7STA 6 /* Status of T7 Switch. */ +#define BITP_AFE_TSWSTA_T6STA 5 /* Status of T6 Switch. */ +#define BITP_AFE_TSWSTA_T5STA 4 /* Status of T5 Switch. */ +#define BITP_AFE_TSWSTA_T4STA 3 /* Status of T4 Switch. */ +#define BITP_AFE_TSWSTA_T3STA 2 /* Status of T3 Switch. */ +#define BITP_AFE_TSWSTA_T2STA 1 /* Status of T2 Switch. */ +#define BITP_AFE_TSWSTA_T1STA 0 /* Status of T1 Switch. */ +#define BITM_AFE_TSWSTA_TR1STA 0x00000800 /* Status of TR1 Switch. */ +#define BITM_AFE_TSWSTA_T11STA 0x00000400 /* Status of T11 Switch. */ +#define BITM_AFE_TSWSTA_T10STA 0x00000200 /* Status of T10 Switch. */ +#define BITM_AFE_TSWSTA_T9STA 0x00000100 /* Status of T9 Switch. */ +#define BITM_AFE_TSWSTA_T8STA 0x00000080 /* Status of T8 Switch. */ +#define BITM_AFE_TSWSTA_T7STA 0x00000040 /* Status of T7 Switch. */ +#define BITM_AFE_TSWSTA_T6STA 0x00000020 /* Status of T6 Switch. */ +#define BITM_AFE_TSWSTA_T5STA 0x00000010 /* Status of T5 Switch. */ +#define BITM_AFE_TSWSTA_T4STA 0x00000008 /* Status of T4 Switch. */ +#define BITM_AFE_TSWSTA_T3STA 0x00000004 /* Status of T3 Switch. */ +#define BITM_AFE_TSWSTA_T2STA 0x00000002 /* Status of T2 Switch. */ +#define BITM_AFE_TSWSTA_T1STA 0x00000001 /* Status of T1 Switch. */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_STATSVAR Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_STATSVAR_VARIANCE 0 /* Statistical Variance Value */ +#define BITM_AFE_STATSVAR_VARIANCE 0x7FFFFFFF /* Statistical Variance Value */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_STATSCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_STATSCON_STDDEV 7 /* Standard Deviation Configuration */ +#define BITP_AFE_STATSCON_SAMPLENUM 4 /* Sample Size */ +#define BITP_AFE_STATSCON_RESRVED 1 /* Reserved */ +#define BITP_AFE_STATSCON_STATSEN 0 /* Statistics Enable */ +#define BITM_AFE_STATSCON_STDDEV 0x00000F80 /* Standard Deviation Configuration */ +#define BITM_AFE_STATSCON_SAMPLENUM 0x00000070 /* Sample Size */ +#define BITM_AFE_STATSCON_RESRVED 0x0000000E /* Reserved */ +#define BITM_AFE_STATSCON_STATSEN 0x00000001 /* Statistics Enable */ +#define ENUM_AFE_STATSCON_DIS 0x00000000 /* STATSEN: Disable Statistics */ +#define ENUM_AFE_STATSCON_EN 0x00000001 /* STATSEN: Enable Statistics */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_STATSMEAN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_STATSMEAN_MEAN 0 /* Mean Output */ +#define BITM_AFE_STATSMEAN_MEAN 0x0000FFFF /* Mean Output */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQ0INFO Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQ0INFO_LEN 16 /* SEQ0 Instruction Number */ +#define BITP_AFE_SEQ0INFO_ADDR 0 /* SEQ0 Start Address */ +#define BITM_AFE_SEQ0INFO_LEN 0x07FF0000 /* SEQ0 Instruction Number */ +#define BITM_AFE_SEQ0INFO_ADDR 0x000007FF /* SEQ0 Start Address */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQ2INFO Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQ2INFO_LEN 16 /* SEQ2 Instruction Number */ +#define BITP_AFE_SEQ2INFO_ADDR 0 /* SEQ2 Start Address */ +#define BITM_AFE_SEQ2INFO_LEN 0x07FF0000 /* SEQ2 Instruction Number */ +#define BITM_AFE_SEQ2INFO_ADDR 0x000007FF /* SEQ2 Start Address */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_CMDFIFOWADDR Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_CMDFIFOWADDR_WADDR 0 /* Write Address */ +#define BITM_AFE_CMDFIFOWADDR_WADDR 0x000007FF /* Write Address */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_CMDDATACON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_CMDDATACON_DATAMEMMDE 9 /* Data FIFO Mode Select */ +#define BITP_AFE_CMDDATACON_DATA_MEM_SEL 6 /* Data FIFO Size Select */ +#define BITP_AFE_CMDDATACON_CMDMEMMDE 3 /* This is Command Fifo Mode Register */ +#define BITP_AFE_CMDDATACON_CMD_MEM_SEL 0 /* Command Memory Select */ +#define BITM_AFE_CMDDATACON_DATAMEMMDE 0x00000E00 /* Data FIFO Mode Select */ +#define BITM_AFE_CMDDATACON_DATA_MEM_SEL 0x000001C0 /* Data FIFO Size Select */ +#define BITM_AFE_CMDDATACON_CMDMEMMDE 0x00000038 /* This is Command Fifo Mode Register */ +#define BITM_AFE_CMDDATACON_CMD_MEM_SEL 0x00000007 /* Command Memory Select */ +#define ENUM_AFE_CMDDATACON_DFIFO 0x00000400 /* DATAMEMMDE: FIFO MODE */ +#define ENUM_AFE_CMDDATACON_DSTM 0x00000600 /* DATAMEMMDE: STREAM MODE */ +#define ENUM_AFE_CMDDATACON_DMEM32B 0x00000000 /* DATA_MEM_SEL: 32B_1 Local Memory */ +#define ENUM_AFE_CMDDATACON_DMEM2K 0x00000040 /* DATA_MEM_SEL: 2K_2 SRAM */ +#define ENUM_AFE_CMDDATACON_DMEM4K 0x00000080 /* DATA_MEM_SEL: 2K_2~1 SRAM */ +#define ENUM_AFE_CMDDATACON_DMEM6K 0x000000C0 /* DATA_MEM_SEL: 2K_2~0 SRAM */ +#define ENUM_AFE_CMDDATACON_CMEM 0x00000008 /* CMDMEMMDE: MEMORY MODE */ +#define ENUM_AFE_CMDDATACON_CFIFO 0x00000010 /* CMDMEMMDE: FIFO MODE */ +#define ENUM_AFE_CMDDATACON_CSTM 0x00000018 /* CMDMEMMDE: STREAM MODE */ +#define ENUM_AFE_CMDDATACON_CMEM32B 0x00000000 /* CMD_MEM_SEL: 32B_0 Local Memory */ +#define ENUM_AFE_CMDDATACON_CMEM2K 0x00000001 /* CMD_MEM_SEL: 2K_0 SRAM */ +#define ENUM_AFE_CMDDATACON_CMEM4K 0x00000002 /* CMD_MEM_SEL: 2K_0~1 SRAM */ +#define ENUM_AFE_CMDDATACON_CMEM6K 0x00000003 /* CMD_MEM_SEL: 2K_0~2 SRAM */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DATAFIFOTHRES Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DATAFIFOTHRES_HIGHTHRES 16 /* High Threshold */ +#define BITM_AFE_DATAFIFOTHRES_HIGHTHRES 0x07FF0000 /* High Threshold */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQ3INFO Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQ3INFO_LEN 16 /* SEQ3 Instruction Number */ +#define BITP_AFE_SEQ3INFO_ADDR 0 /* SEQ3 Start Address */ +#define BITM_AFE_SEQ3INFO_LEN 0x07FF0000 /* SEQ3 Instruction Number */ +#define BITM_AFE_SEQ3INFO_ADDR 0x000007FF /* SEQ3 Start Address */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SEQ1INFO Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SEQ1INFO_LEN 16 /* SEQ1 Instruction Number */ +#define BITP_AFE_SEQ1INFO_ADDR 0 /* SEQ1 Start Address */ +#define BITM_AFE_SEQ1INFO_LEN 0x07FF0000 /* SEQ1 Instruction Number */ +#define BITM_AFE_SEQ1INFO_ADDR 0x000007FF /* SEQ1 Start Address */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_REPEATADCCNV Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_REPEATADCCNV_NUM 4 /* Repeat Value */ +#define BITP_AFE_REPEATADCCNV_EN 0 /* Enable Repeat ADC Conversions */ +#define BITM_AFE_REPEATADCCNV_NUM 0x00000FF0 /* Repeat Value */ +#define BITM_AFE_REPEATADCCNV_EN 0x00000001 /* Enable Repeat ADC Conversions */ +#define ENUM_AFE_REPEATADCCNV_DIS 0x00000000 /* EN: Disable Repeat ADC Conversions */ +#define ENUM_AFE_REPEATADCCNV_EN 0x00000001 /* EN: Enable Repeat ADC Conversions */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_FIFOCNTSTA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_FIFOCNTSTA_DATAFIFOCNTSTA 16 /* Current Number of Words in the Data FIFO */ +#define BITM_AFE_FIFOCNTSTA_DATAFIFOCNTSTA 0x07FF0000 /* Current Number of Words in the Data FIFO */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_CALDATLOCK Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_CALDATLOCK_KEY 0 /* Password for Calibration Data Registers */ +#define BITM_AFE_CALDATLOCK_KEY 0xFFFFFFFF /* Password for Calibration Data Registers */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETHSTIA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETHSTIA_VALUE 0 /* HSTIA Offset Calibration */ +#define BITM_AFE_ADCOFFSETHSTIA_VALUE 0x00007FFF /* HSTIA Offset Calibration */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINTEMPSENS0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINTEMPSENS0_VALUE 0 /* Gain Calibration Temp Sensor Channel */ +#define BITM_AFE_ADCGAINTEMPSENS0_VALUE 0x00007FFF /* Gain Calibration Temp Sensor Channel */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETTEMPSENS0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETTEMPSENS0_VALUE 0 /* Offset Calibration Temp Sensor */ +#define BITM_AFE_ADCOFFSETTEMPSENS0_VALUE 0x00007FFF /* Offset Calibration Temp Sensor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINGN1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINGN1_VALUE 0 /* Gain Calibration PGA Gain 1x */ +#define BITM_AFE_ADCGAINGN1_VALUE 0x00007FFF /* Gain Calibration PGA Gain 1x */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETGN1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETGN1_VALUE 0 /* Offset Calibration Gain1 */ +#define BITM_AFE_ADCOFFSETGN1_VALUE 0x00007FFF /* Offset Calibration Gain1 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DACGAIN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DACGAIN_VALUE 0 /* HS DAC Gain Correction Factor */ +#define BITM_AFE_DACGAIN_VALUE 0x00000FFF /* HS DAC Gain Correction Factor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DACOFFSETATTEN Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DACOFFSETATTEN_VALUE 0 /* DAC Offset Correction Factor */ +#define BITM_AFE_DACOFFSETATTEN_VALUE 0x00000FFF /* DAC Offset Correction Factor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DACOFFSET Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DACOFFSET_VALUE 0 /* DAC Offset Correction Factor */ +#define BITM_AFE_DACOFFSET_VALUE 0x00000FFF /* DAC Offset Correction Factor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINGN1P5 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINGN1P5_VALUE 0 /* Gain Calibration PGA Gain 1.5x */ +#define BITM_AFE_ADCGAINGN1P5_VALUE 0x00007FFF /* Gain Calibration PGA Gain 1.5x */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINGN2 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINGN2_VALUE 0 /* Gain Calibration PGA Gain 2x */ +#define BITM_AFE_ADCGAINGN2_VALUE 0x00007FFF /* Gain Calibration PGA Gain 2x */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINGN4 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINGN4_VALUE 0 /* Gain Calibration PGA Gain 4x */ +#define BITM_AFE_ADCGAINGN4_VALUE 0x00007FFF /* Gain Calibration PGA Gain 4x */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCPGAOFFSETCANCEL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCPGAOFFSETCANCEL_OFFSETCANCEL 0 /* Offset Cancellation */ +#define BITM_AFE_ADCPGAOFFSETCANCEL_OFFSETCANCEL 0x00007FFF /* Offset Cancellation */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGNHSTIA Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGNHSTIA_VALUE 0 /* Gain Error Calibration HS TIA Channel */ +#define BITM_AFE_ADCGNHSTIA_VALUE 0x00007FFF /* Gain Error Calibration HS TIA Channel */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETLPTIA0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETLPTIA0_VALUE 0 /* Offset Calibration for ULP-TIA0 */ +#define BITM_AFE_ADCOFFSETLPTIA0_VALUE 0x00007FFF /* Offset Calibration for ULP-TIA0 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGNLPTIA0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGNLPTIA0_VALUE 0 /* Gain Error Calibration ULPTIA0 */ +#define BITM_AFE_ADCGNLPTIA0_VALUE 0x00007FFF /* Gain Error Calibration ULPTIA0 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCPGAGN4OFCAL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCPGAGN4OFCAL_ADCGAINAUX 0 /* DC Calibration Gain=4 */ +#define BITM_AFE_ADCPGAGN4OFCAL_ADCGAINAUX 0x00007FFF /* DC Calibration Gain=4 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINGN9 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINGN9_VALUE 0 /* Gain Calibration PGA Gain 9x */ +#define BITM_AFE_ADCGAINGN9_VALUE 0x00007FFF /* Gain Calibration PGA Gain 9x */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETEMPSENS1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETEMPSENS1_VALUE 0 /* Offset Calibration Temp Sensor */ +#define BITM_AFE_ADCOFFSETEMPSENS1_VALUE 0x00007FFF /* Offset Calibration Temp Sensor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGAINDIOTEMPSENS Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGAINDIOTEMPSENS_VALUE 0 /* Gain Calibration for Diode Temp Sensor */ +#define BITM_AFE_ADCGAINDIOTEMPSENS_VALUE 0x00007FFF /* Gain Calibration for Diode Temp Sensor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DACOFFSETATTENHP Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DACOFFSETATTENHP_VALUE 0 /* DAC Offset Correction Factor */ +#define BITM_AFE_DACOFFSETATTENHP_VALUE 0x00000FFF /* DAC Offset Correction Factor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_DACOFFSETHP Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_DACOFFSETHP_VALUE 0 /* DAC Offset Correction Factor */ +#define BITM_AFE_DACOFFSETHP_VALUE 0x00000FFF /* DAC Offset Correction Factor */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETLPTIA1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETLPTIA1_VALUE 0 /* Offset Calibration for ULP-TIA1 */ +#define BITM_AFE_ADCOFFSETLPTIA1_VALUE (_ADI_MSK_3(0x00007FFF,0x00007FFFUL, uint32_t )) /* Offset Calibration for ULP-TIA1 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCGNLPTIA1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCGNLPTIA1_ULPTIA1GN 0 /* Gain Calibration ULP-TIA1 */ +#define BITM_AFE_ADCGNLPTIA1_ULPTIA1GN 0x00007FFF /* Gain Calibration ULP-TIA1 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETGN2 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETGN2_VALUE 0 /* Offset Calibration Auxiliary Channel (PGA Gain =2) */ +#define BITM_AFE_ADCOFFSETGN2_VALUE 0x00007FFF /* Offset Calibration Auxiliary Channel (PGA Gain =2) */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETGN1P5 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETGN1P5_VALUE 0 /* Offset Calibration Gain1.5 */ +#define BITM_AFE_ADCOFFSETGN1P5_VALUE 0x00007FFF /* Offset Calibration Gain1.5 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETGN9 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETGN9_VALUE 0 /* Offset Calibration Gain9 */ +#define BITM_AFE_ADCOFFSETGN9_VALUE 0x00007FFF /* Offset Calibration Gain9 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCOFFSETGN4 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCOFFSETGN4_VALUE 0 /* Offset Calibration Gain4 */ +#define BITM_AFE_ADCOFFSETGN4_VALUE 0x00007FFF /* Offset Calibration Gain4 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_PMBW Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_PMBW_SYSBW 2 /* Configure System Bandwidth */ +#define BITP_AFE_PMBW_SYSHP 0 /* Set High Speed DAC and ADC in High Power Mode */ +#define BITM_AFE_PMBW_SYSBW 0x0000000C /* Configure System Bandwidth */ +#define BITM_AFE_PMBW_SYSHP 0x00000001 /* Set High Speed DAC and ADC in High Power Mode */ +#define ENUM_AFE_PMBW_BWNA 0x00000000 /* SYSBW: no action for system configuration */ +#define ENUM_AFE_PMBW_BW50 0x00000004 /* SYSBW: 50kHz -3dB bandwidth */ +#define ENUM_AFE_PMBW_BW100 0x00000008 /* SYSBW: 100kHz -3dB bandwidth */ +#define ENUM_AFE_PMBW_BW250 0x0000000C /* SYSBW: 250kHz -3dB bandwidth */ +#define ENUM_AFE_PMBW_LP 0x00000000 /* SYSHP: LP mode */ +#define ENUM_AFE_PMBW_HP 0x00000001 /* SYSHP: HP mode */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_SWMUX Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_SWMUX_CMMUX 3 /* CM Resistor Select for Ain2, Ain3 */ +#define BITM_AFE_SWMUX_CMMUX 0x00000008 /* CM Resistor Select for Ain2, Ain3 */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_AFE_TEMPSEN_DIO Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_AFE_TEMPSEN_DIO_TSDIO_PD 17 /* Power Down Control */ +#define BITP_AFE_AFE_TEMPSEN_DIO_TSDIO_EN 16 /* Test Signal Enable */ +#define BITP_AFE_AFE_TEMPSEN_DIO_TSDIO_CON 0 /* Bias Current Selection */ +#define BITM_AFE_AFE_TEMPSEN_DIO_TSDIO_PD 0x00020000 /* Power Down Control */ +#define BITM_AFE_AFE_TEMPSEN_DIO_TSDIO_EN 0x00010000 /* Test Signal Enable */ +#define BITM_AFE_AFE_TEMPSEN_DIO_TSDIO_CON 0x0000FFFF /* Bias Current Selection */ + +/* ------------------------------------------------------------------------------------------------------------------------- + AFE_ADCBUFCON Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_AFE_ADCBUFCON_AMPDIS 4 /* Disable OpAmp. */ +#define BITP_AFE_ADCBUFCON_CHOPDIS 0 /* Disable Chop */ +#define BITM_AFE_ADCBUFCON_AMPDIS 0x000001F0 /* Disable OpAmp. */ +#define BITM_AFE_ADCBUFCON_CHOPDIS 0x0000000F /* Disable Chop */ + + +/* ============================================================================================================================ + Interrupt Controller Register Map + ============================================================================================================================ */ + +/* ============================================================================================================================ + INTC + ============================================================================================================================ */ +#define REG_INTC_INTCPOL_RESET 0x00000000 /* Reset Value for INTCPOL */ +#define REG_INTC_INTCPOL 0x00003000 /* INTC Interrupt Polarity Register */ +#define REG_INTC_INTCCLR_RESET 0x00000000 /* Reset Value for INTCCLR */ +#define REG_INTC_INTCCLR 0x00003004 /* INTC Interrupt Clear Register */ +#define REG_INTC_INTCSEL0_RESET 0x00002000 /* Reset Value for INTCSEL0 */ +#define REG_INTC_INTCSEL0 0x00003008 /* INTC INT0 Select Register */ +#define REG_INTC_INTCSEL1_RESET 0x00000000 /* Reset Value for INTCSEL1 */ +#define REG_INTC_INTCSEL1 0x0000300C /* INTC INT1 Select Register */ +#define REG_INTC_INTCFLAG0_RESET 0x00000000 /* Reset Value for INTCFLAG0 */ +#define REG_INTC_INTCFLAG0 0x00003010 /* INTC INT0 FLAG Register */ +#define REG_INTC_INTCFLAG1_RESET 0x00000000 /* Reset Value for INTCFLAG1 */ +#define REG_INTC_INTCFLAG1 0x00003014 /* INTC INT1 FLAG Register */ + +/* ============================================================================================================================ + INTC Register BitMasks, Positions & Enumerations + ============================================================================================================================ */ +/* ------------------------------------------------------------------------------------------------------------------------- + INTC_INTCPOL Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_INTC_INTCPOL_INTPOL 0 +#define BITM_INTC_INTCPOL_INTPOL 0x00000001 + +/* ------------------------------------------------------------------------------------------------------------------------- + INTC_INTCCLR Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_INTC_INTCCLR_INTCLR31 31 +#define BITP_INTC_INTCCLR_INTCLR30 30 +#define BITP_INTC_INTCCLR_INTCLR29 29 +#define BITP_INTC_INTCCLR_INTCLR28 28 +#define BITP_INTC_INTCCLR_INTCLR27 27 +#define BITP_INTC_INTCCLR_INTCLR26 26 +#define BITP_INTC_INTCCLR_INTCLR25 25 +#define BITP_INTC_INTCCLR_INTCLR24 24 +#define BITP_INTC_INTCCLR_INTCLR23 23 +#define BITP_INTC_INTCCLR_INTCLR22 22 +#define BITP_INTC_INTCCLR_INTCLR21 21 +#define BITP_INTC_INTCCLR_INTCLR20 20 +#define BITP_INTC_INTCCLR_INTCLR19 19 +#define BITP_INTC_INTCCLR_INTCLR18 18 +#define BITP_INTC_INTCCLR_INTCLR17 17 +#define BITP_INTC_INTCCLR_INTCLR16 16 +#define BITP_INTC_INTCCLR_INTCLR15 15 +#define BITP_INTC_INTCCLR_INTCLR14 14 +#define BITP_INTC_INTCCLR_INTCLR13 13 +#define BITP_INTC_INTCCLR_INTCLR12 12 /* Custom IRQ 3. Write 1 to clear. */ +#define BITP_INTC_INTCCLR_INTCLR11 11 /* Custom IRQ 2. Write 1 to clear. */ +#define BITP_INTC_INTCCLR_INTCLR10 10 /* Custom IRQ 1. Write 1 to clear. */ +#define BITP_INTC_INTCCLR_INTCLR9 9 /* Custom IRQ 0. Write 1 to clear */ +#define BITP_INTC_INTCCLR_INTCLR8 8 +#define BITP_INTC_INTCCLR_INTCLR7 7 +#define BITP_INTC_INTCCLR_INTCLR6 6 +#define BITP_INTC_INTCCLR_INTCLR5 5 +#define BITP_INTC_INTCCLR_INTCLR4 4 +#define BITP_INTC_INTCCLR_INTCLR3 3 +#define BITP_INTC_INTCCLR_INTCLR2 2 +#define BITP_INTC_INTCCLR_INTCLR1 1 +#define BITP_INTC_INTCCLR_INTCLR0 0 +#define BITM_INTC_INTCCLR_INTCLR31 0x80000000 +#define BITM_INTC_INTCCLR_INTCLR30 0x40000000 +#define BITM_INTC_INTCCLR_INTCLR29 0x20000000 +#define BITM_INTC_INTCCLR_INTCLR28 0x10000000 +#define BITM_INTC_INTCCLR_INTCLR27 0x08000000 +#define BITM_INTC_INTCCLR_INTCLR26 0x04000000 +#define BITM_INTC_INTCCLR_INTCLR25 0x02000000 +#define BITM_INTC_INTCCLR_INTCLR24 0x01000000 +#define BITM_INTC_INTCCLR_INTCLR23 0x00800000 +#define BITM_INTC_INTCCLR_INTCLR22 0x00400000 +#define BITM_INTC_INTCCLR_INTCLR21 0x00200000 +#define BITM_INTC_INTCCLR_INTCLR20 0x00100000 +#define BITM_INTC_INTCCLR_INTCLR19 0x00080000 +#define BITM_INTC_INTCCLR_INTCLR18 0x00040000 +#define BITM_INTC_INTCCLR_INTCLR17 0x00020000 +#define BITM_INTC_INTCCLR_INTCLR16 0x00010000 +#define BITM_INTC_INTCCLR_INTCLR15 0x00008000 +#define BITM_INTC_INTCCLR_INTCLR14 0x00004000 +#define BITM_INTC_INTCCLR_INTCLR13 0x00002000 +#define BITM_INTC_INTCCLR_INTCLR12 0x00001000 /* Custom IRQ 3. Write 1 to clear. */ +#define BITM_INTC_INTCCLR_INTCLR11 0x00000800 /* Custom IRQ 2. Write 1 to clear. */ +#define BITM_INTC_INTCCLR_INTCLR10 0x00000400 /* Custom IRQ 1. Write 1 to clear. */ +#define BITM_INTC_INTCCLR_INTCLR9 0x00000200 /* Custom IRQ 0. Write 1 to clear */ +#define BITM_INTC_INTCCLR_INTCLR8 0x00000100 +#define BITM_INTC_INTCCLR_INTCLR7 0x00000080 +#define BITM_INTC_INTCCLR_INTCLR6 0x00000040 +#define BITM_INTC_INTCCLR_INTCLR5 0x00000020 +#define BITM_INTC_INTCCLR_INTCLR4 0x00000010 +#define BITM_INTC_INTCCLR_INTCLR3 0x00000008 +#define BITM_INTC_INTCCLR_INTCLR2 0x00000004 +#define BITM_INTC_INTCCLR_INTCLR1 0x00000002 +#define BITM_INTC_INTCCLR_INTCLR0 0x00000001 + +/* ------------------------------------------------------------------------------------------------------------------------- + INTC_INTCSEL0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_INTC_INTCSEL0_INTSEL31 31 +#define BITP_INTC_INTCSEL0_INTSEL30 30 +#define BITP_INTC_INTCSEL0_INTSEL29 29 +#define BITP_INTC_INTCSEL0_INTSEL28 28 +#define BITP_INTC_INTCSEL0_INTSEL27 27 +#define BITP_INTC_INTCSEL0_INTSEL26 26 +#define BITP_INTC_INTCSEL0_INTSEL25 25 +#define BITP_INTC_INTCSEL0_INTSEL24 24 +#define BITP_INTC_INTCSEL0_INTSEL23 23 +#define BITP_INTC_INTCSEL0_INTSEL22 22 +#define BITP_INTC_INTCSEL0_INTSEL21 21 +#define BITP_INTC_INTCSEL0_INTSEL20 20 +#define BITP_INTC_INTCSEL0_INTSEL19 19 +#define BITP_INTC_INTCSEL0_INTSEL18 18 +#define BITP_INTC_INTCSEL0_INTSEL17 17 +#define BITP_INTC_INTCSEL0_INTSEL16 16 +#define BITP_INTC_INTCSEL0_INTSEL15 15 +#define BITP_INTC_INTCSEL0_INTSEL14 14 +#define BITP_INTC_INTCSEL0_INTSEL13 13 +#define BITP_INTC_INTCSEL0_INTSEL12 12 /* Custom IRQ 3 Enable */ +#define BITP_INTC_INTCSEL0_INTSEL11 11 /* Custom IRQ 2 Enable */ +#define BITP_INTC_INTCSEL0_INTSEL10 10 /* Custom IRQ 1 Enable */ +#define BITP_INTC_INTCSEL0_INTSEL9 9 /* Custom IRQ 0 Enable */ +#define BITP_INTC_INTCSEL0_INTSEL8 8 +#define BITP_INTC_INTCSEL0_INTSEL7 7 +#define BITP_INTC_INTCSEL0_INTSEL6 6 +#define BITP_INTC_INTCSEL0_INTSEL5 5 +#define BITP_INTC_INTCSEL0_INTSEL4 4 +#define BITP_INTC_INTCSEL0_INTSEL3 3 +#define BITP_INTC_INTCSEL0_INTSEL2 2 +#define BITP_INTC_INTCSEL0_INTSEL1 1 +#define BITP_INTC_INTCSEL0_INTSEL0 0 +#define BITM_INTC_INTCSEL0_INTSEL31 0x80000000 +#define BITM_INTC_INTCSEL0_INTSEL30 0x40000000 +#define BITM_INTC_INTCSEL0_INTSEL29 0x20000000 +#define BITM_INTC_INTCSEL0_INTSEL28 0x10000000 +#define BITM_INTC_INTCSEL0_INTSEL27 0x08000000 +#define BITM_INTC_INTCSEL0_INTSEL26 0x04000000 +#define BITM_INTC_INTCSEL0_INTSEL25 0x02000000 +#define BITM_INTC_INTCSEL0_INTSEL24 0x01000000 +#define BITM_INTC_INTCSEL0_INTSEL23 0x00800000 +#define BITM_INTC_INTCSEL0_INTSEL22 0x00400000 +#define BITM_INTC_INTCSEL0_INTSEL21 0x00200000 +#define BITM_INTC_INTCSEL0_INTSEL20 0x00100000 +#define BITM_INTC_INTCSEL0_INTSEL19 0x00080000 +#define BITM_INTC_INTCSEL0_INTSEL18 0x00040000 +#define BITM_INTC_INTCSEL0_INTSEL17 0x00020000 +#define BITM_INTC_INTCSEL0_INTSEL16 0x00010000 +#define BITM_INTC_INTCSEL0_INTSEL15 0x00008000 +#define BITM_INTC_INTCSEL0_INTSEL14 0x00004000 +#define BITM_INTC_INTCSEL0_INTSEL13 0x00002000 +#define BITM_INTC_INTCSEL0_INTSEL12 0x00001000 /* Custom IRQ 3 Enable */ +#define BITM_INTC_INTCSEL0_INTSEL11 0x00000800 /* Custom IRQ 2 Enable */ +#define BITM_INTC_INTCSEL0_INTSEL10 0x00000400 /* Custom IRQ 1 Enable */ +#define BITM_INTC_INTCSEL0_INTSEL9 0x00000200 /* Custom IRQ 0 Enable */ +#define BITM_INTC_INTCSEL0_INTSEL8 0x00000100 +#define BITM_INTC_INTCSEL0_INTSEL7 0x00000080 +#define BITM_INTC_INTCSEL0_INTSEL6 0x00000040 +#define BITM_INTC_INTCSEL0_INTSEL5 0x00000020 +#define BITM_INTC_INTCSEL0_INTSEL4 0x00000010 +#define BITM_INTC_INTCSEL0_INTSEL3 0x00000008 +#define BITM_INTC_INTCSEL0_INTSEL2 0x00000004 +#define BITM_INTC_INTCSEL0_INTSEL1 0x00000002 +#define BITM_INTC_INTCSEL0_INTSEL0 0x00000001 + +/* ------------------------------------------------------------------------------------------------------------------------- + INTC_INTCSEL1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_INTC_INTCSEL1_INTSEL31 31 +#define BITP_INTC_INTCSEL1_INTSEL30 30 +#define BITP_INTC_INTCSEL1_INTSEL29 29 +#define BITP_INTC_INTCSEL1_INTSEL28 28 +#define BITP_INTC_INTCSEL1_INTSEL27 27 +#define BITP_INTC_INTCSEL1_INTSEL26 26 +#define BITP_INTC_INTCSEL1_INTSEL25 25 +#define BITP_INTC_INTCSEL1_INTSEL24 24 +#define BITP_INTC_INTCSEL1_INTSEL23 23 +#define BITP_INTC_INTCSEL1_INTSEL22 22 +#define BITP_INTC_INTCSEL1_INTSEL21 21 +#define BITP_INTC_INTCSEL1_INTSEL20 20 +#define BITP_INTC_INTCSEL1_INTSEL19 19 +#define BITP_INTC_INTCSEL1_INTSEL18 18 +#define BITP_INTC_INTCSEL1_INTSEL17 17 +#define BITP_INTC_INTCSEL1_INTSEL16 16 +#define BITP_INTC_INTCSEL1_INTSEL15 15 +#define BITP_INTC_INTCSEL1_INTSEL14 14 +#define BITP_INTC_INTCSEL1_INTSEL13 13 +#define BITP_INTC_INTCSEL1_INTSEL12 12 /* Custom IRQ 3 Enable */ +#define BITP_INTC_INTCSEL1_INTSEL11 11 /* Custom IRQ 2 Enable */ +#define BITP_INTC_INTCSEL1_INTSEL10 10 /* Custom IRQ 1 Enable */ +#define BITP_INTC_INTCSEL1_INTSEL9 9 /* Custom IRQ 0 Enable */ +#define BITP_INTC_INTCSEL1_INTSEL8 8 +#define BITP_INTC_INTCSEL1_INTSEL7 7 +#define BITP_INTC_INTCSEL1_INTSEL6 6 +#define BITP_INTC_INTCSEL1_INTSEL5 5 +#define BITP_INTC_INTCSEL1_INTSEL4 4 +#define BITP_INTC_INTCSEL1_INTSEL3 3 +#define BITP_INTC_INTCSEL1_INTSEL2 2 +#define BITP_INTC_INTCSEL1_INTSEL1 1 +#define BITP_INTC_INTCSEL1_INTSEL0 0 +#define BITM_INTC_INTCSEL1_INTSEL31 0x80000000 +#define BITM_INTC_INTCSEL1_INTSEL30 0x40000000 +#define BITM_INTC_INTCSEL1_INTSEL29 0x20000000 +#define BITM_INTC_INTCSEL1_INTSEL28 0x10000000 +#define BITM_INTC_INTCSEL1_INTSEL27 0x08000000 +#define BITM_INTC_INTCSEL1_INTSEL26 0x04000000 +#define BITM_INTC_INTCSEL1_INTSEL25 0x02000000 +#define BITM_INTC_INTCSEL1_INTSEL24 0x01000000 +#define BITM_INTC_INTCSEL1_INTSEL23 0x00800000 +#define BITM_INTC_INTCSEL1_INTSEL22 0x00400000 +#define BITM_INTC_INTCSEL1_INTSEL21 0x00200000 +#define BITM_INTC_INTCSEL1_INTSEL20 0x00100000 +#define BITM_INTC_INTCSEL1_INTSEL19 0x00080000 +#define BITM_INTC_INTCSEL1_INTSEL18 0x00040000 +#define BITM_INTC_INTCSEL1_INTSEL17 0x00020000 +#define BITM_INTC_INTCSEL1_INTSEL16 0x00010000 +#define BITM_INTC_INTCSEL1_INTSEL15 0x00008000 +#define BITM_INTC_INTCSEL1_INTSEL14 0x00004000 +#define BITM_INTC_INTCSEL1_INTSEL13 0x00002000 +#define BITM_INTC_INTCSEL1_INTSEL12 0x00001000 /* Custom IRQ 3 Enable */ +#define BITM_INTC_INTCSEL1_INTSEL11 0x00000800 /* Custom IRQ 2 Enable */ +#define BITM_INTC_INTCSEL1_INTSEL10 0x00000400 /* Custom IRQ 1 Enable */ +#define BITM_INTC_INTCSEL1_INTSEL9 0x00000200 /* Custom IRQ 0 Enable */ +#define BITM_INTC_INTCSEL1_INTSEL8 0x00000100 +#define BITM_INTC_INTCSEL1_INTSEL7 0x00000080 +#define BITM_INTC_INTCSEL1_INTSEL6 0x00000040 +#define BITM_INTC_INTCSEL1_INTSEL5 0x00000020 +#define BITM_INTC_INTCSEL1_INTSEL4 0x00000010 +#define BITM_INTC_INTCSEL1_INTSEL3 0x00000008 +#define BITM_INTC_INTCSEL1_INTSEL2 0x00000004 +#define BITM_INTC_INTCSEL1_INTSEL1 0x00000002 +#define BITM_INTC_INTCSEL1_INTSEL0 0x00000001 + +/* ------------------------------------------------------------------------------------------------------------------------- + INTC_INTCFLAG0 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_INTC_INTCFLAG0_FLAG31 31 +#define BITP_INTC_INTCFLAG0_FLAG30 30 +#define BITP_INTC_INTCFLAG0_FLAG29 29 +#define BITP_INTC_INTCFLAG0_FLAG28 28 +#define BITP_INTC_INTCFLAG0_FLAG27 27 +#define BITP_INTC_INTCFLAG0_FLAG26 26 +#define BITP_INTC_INTCFLAG0_FLAG25 25 +#define BITP_INTC_INTCFLAG0_FLAG24 24 +#define BITP_INTC_INTCFLAG0_FLAG23 23 +#define BITP_INTC_INTCFLAG0_FLAG22 22 +#define BITP_INTC_INTCFLAG0_FLAG21 21 +#define BITP_INTC_INTCFLAG0_FLAG20 20 +#define BITP_INTC_INTCFLAG0_FLAG19 19 +#define BITP_INTC_INTCFLAG0_FLAG18 18 +#define BITP_INTC_INTCFLAG0_FLAG17 17 +#define BITP_INTC_INTCFLAG0_FLAG16 16 +#define BITP_INTC_INTCFLAG0_FLAG15 15 +#define BITP_INTC_INTCFLAG0_FLAG14 14 +#define BITP_INTC_INTCFLAG0_FLAG13 13 +#define BITP_INTC_INTCFLAG0_FLAG12 12 /* Custom IRQ 3 Status */ +#define BITP_INTC_INTCFLAG0_FLAG11 11 /* Custom IRQ 2 Status */ +#define BITP_INTC_INTCFLAG0_FLAG10 10 /* Custom IRQ 1 Status */ +#define BITP_INTC_INTCFLAG0_FLAG9 9 /* Custom IRQ 0 Status */ +#define BITP_INTC_INTCFLAG0_FLAG8 8 /* Variance IRQ status. */ +#define BITP_INTC_INTCFLAG0_FLAG7 7 +#define BITP_INTC_INTCFLAG0_FLAG6 6 +#define BITP_INTC_INTCFLAG0_FLAG5 5 +#define BITP_INTC_INTCFLAG0_FLAG4 4 +#define BITP_INTC_INTCFLAG0_FLAG3 3 +#define BITP_INTC_INTCFLAG0_FLAG2 2 +#define BITP_INTC_INTCFLAG0_FLAG1 1 +#define BITP_INTC_INTCFLAG0_FLAG0 0 +#define BITM_INTC_INTCFLAG0_FLAG31 0x80000000 +#define BITM_INTC_INTCFLAG0_FLAG30 0x40000000 +#define BITM_INTC_INTCFLAG0_FLAG29 0x20000000 +#define BITM_INTC_INTCFLAG0_FLAG28 0x10000000 +#define BITM_INTC_INTCFLAG0_FLAG27 0x08000000 +#define BITM_INTC_INTCFLAG0_FLAG26 0x04000000 +#define BITM_INTC_INTCFLAG0_FLAG25 0x02000000 +#define BITM_INTC_INTCFLAG0_FLAG24 0x01000000 +#define BITM_INTC_INTCFLAG0_FLAG23 0x00800000 +#define BITM_INTC_INTCFLAG0_FLAG22 0x00400000 +#define BITM_INTC_INTCFLAG0_FLAG21 0x00200000 +#define BITM_INTC_INTCFLAG0_FLAG20 0x00100000 +#define BITM_INTC_INTCFLAG0_FLAG19 0x00080000 +#define BITM_INTC_INTCFLAG0_FLAG18 0x00040000 +#define BITM_INTC_INTCFLAG0_FLAG17 0x00020000 +#define BITM_INTC_INTCFLAG0_FLAG16 0x00010000 +#define BITM_INTC_INTCFLAG0_FLAG15 0x00008000 +#define BITM_INTC_INTCFLAG0_FLAG14 0x00004000 +#define BITM_INTC_INTCFLAG0_FLAG13 0x00002000 +#define BITM_INTC_INTCFLAG0_FLAG12 0x00001000 /* Custom IRQ 3 Status */ +#define BITM_INTC_INTCFLAG0_FLAG11 0x00000800 /* Custom IRQ 2 Status */ +#define BITM_INTC_INTCFLAG0_FLAG10 0x00000400 /* Custom IRQ 1 Status */ +#define BITM_INTC_INTCFLAG0_FLAG9 0x00000200 /* Custom IRQ 0 Status */ +#define BITM_INTC_INTCFLAG0_FLAG8 0x00000100 /* Variance IRQ status. */ +#define BITM_INTC_INTCFLAG0_FLAG7 0x00000080 +#define BITM_INTC_INTCFLAG0_FLAG6 0x00000040 +#define BITM_INTC_INTCFLAG0_FLAG5 0x00000020 +#define BITM_INTC_INTCFLAG0_FLAG4 0x00000010 +#define BITM_INTC_INTCFLAG0_FLAG3 0x00000008 +#define BITM_INTC_INTCFLAG0_FLAG2 0x00000004 +#define BITM_INTC_INTCFLAG0_FLAG1 0x00000002 +#define BITM_INTC_INTCFLAG0_FLAG0 0x00000001 + +/* ------------------------------------------------------------------------------------------------------------------------- + INTC_INTCFLAG1 Pos/Masks Description + ------------------------------------------------------------------------------------------------------------------------- */ +#define BITP_INTC_INTCFLAG1_FLAG31 31 +#define BITP_INTC_INTCFLAG1_FLAG30 30 +#define BITP_INTC_INTCFLAG1_FLAG29 29 +#define BITP_INTC_INTCFLAG1_FLAG28 28 +#define BITP_INTC_INTCFLAG1_FLAG27 27 +#define BITP_INTC_INTCFLAG1_FLAG26 26 +#define BITP_INTC_INTCFLAG1_FLAG25 25 +#define BITP_INTC_INTCFLAG1_FLAG24 24 +#define BITP_INTC_INTCFLAG1_FLAG23 23 +#define BITP_INTC_INTCFLAG1_FLAG22 22 +#define BITP_INTC_INTCFLAG1_FLAG21 21 +#define BITP_INTC_INTCFLAG1_FLAG20 20 +#define BITP_INTC_INTCFLAG1_FLAG19 19 +#define BITP_INTC_INTCFLAG1_FLAG18 18 +#define BITP_INTC_INTCFLAG1_FLAG17 17 +#define BITP_INTC_INTCFLAG1_FLAG16 16 +#define BITP_INTC_INTCFLAG1_FLAG15 15 +#define BITP_INTC_INTCFLAG1_FLAG14 14 +#define BITP_INTC_INTCFLAG1_FLAG13 13 +#define BITP_INTC_INTCFLAG1_FLAG12 12 /* Custom IRQ 3 Status */ +#define BITP_INTC_INTCFLAG1_FLAG11 11 /* Custom IRQ 2 Status */ +#define BITP_INTC_INTCFLAG1_FLAG10 10 /* Custom IRQ 1 Status */ +#define BITP_INTC_INTCFLAG1_FLAG9 9 /* Custom IRQ 0 Status */ +#define BITP_INTC_INTCFLAG1_FLAG8 8 /* Variance IRQ status. */ +#define BITP_INTC_INTCFLAG1_FLAG7 7 +#define BITP_INTC_INTCFLAG1_FLAG6 6 +#define BITP_INTC_INTCFLAG1_FLAG5 5 +#define BITP_INTC_INTCFLAG1_FLAG4 4 +#define BITP_INTC_INTCFLAG1_FLAG3 3 +#define BITP_INTC_INTCFLAG1_FLAG2 2 +#define BITP_INTC_INTCFLAG1_FLAG1 1 +#define BITP_INTC_INTCFLAG1_FLAG0 0 +#define BITM_INTC_INTCFLAG1_FLAG31 0x80000000 +#define BITM_INTC_INTCFLAG1_FLAG30 0x40000000 +#define BITM_INTC_INTCFLAG1_FLAG29 0x20000000 +#define BITM_INTC_INTCFLAG1_FLAG28 0x10000000 +#define BITM_INTC_INTCFLAG1_FLAG27 0x08000000 +#define BITM_INTC_INTCFLAG1_FLAG26 0x04000000 +#define BITM_INTC_INTCFLAG1_FLAG25 0x02000000 +#define BITM_INTC_INTCFLAG1_FLAG24 0x01000000 +#define BITM_INTC_INTCFLAG1_FLAG23 0x00800000 +#define BITM_INTC_INTCFLAG1_FLAG22 0x00400000 +#define BITM_INTC_INTCFLAG1_FLAG21 0x00200000 +#define BITM_INTC_INTCFLAG1_FLAG20 0x00100000 +#define BITM_INTC_INTCFLAG1_FLAG19 0x00080000 +#define BITM_INTC_INTCFLAG1_FLAG18 0x00040000 +#define BITM_INTC_INTCFLAG1_FLAG17 0x00020000 +#define BITM_INTC_INTCFLAG1_FLAG16 0x00010000 +#define BITM_INTC_INTCFLAG1_FLAG15 0x00008000 +#define BITM_INTC_INTCFLAG1_FLAG14 0x00004000 +#define BITM_INTC_INTCFLAG1_FLAG13 0x00002000 +#define BITM_INTC_INTCFLAG1_FLAG12 0x00001000 /* Custom IRQ 3 Status */ +#define BITM_INTC_INTCFLAG1_FLAG11 0x00000800 /* Custom IRQ 2 Status */ +#define BITM_INTC_INTCFLAG1_FLAG10 0x00000400 /* Custom IRQ 1 Status */ +#define BITM_INTC_INTCFLAG1_FLAG9 0x00000200 /* Custom IRQ 0 Status */ +#define BITM_INTC_INTCFLAG1_FLAG8 0x00000100 /* Variance IRQ status. */ +#define BITM_INTC_INTCFLAG1_FLAG7 0x00000080 +#define BITM_INTC_INTCFLAG1_FLAG6 0x00000040 +#define BITM_INTC_INTCFLAG1_FLAG5 0x00000020 +#define BITM_INTC_INTCFLAG1_FLAG4 0x00000010 +#define BITM_INTC_INTCFLAG1_FLAG3 0x00000008 +#define BITM_INTC_INTCFLAG1_FLAG2 0x00000004 +#define BITM_INTC_INTCFLAG1_FLAG1 0x00000002 +#define BITM_INTC_INTCFLAG1_FLAG0 0x00000001 +/** + * @} AD5940RegistersBitfields + * @endcond + * */ + +/** + * @addtogroup SPI_Block + * @{ + * @defgroup SPI_Block_Const + * @{ + * +*/ +#define SPICMD_SETADDR 0x20 /**< set the register address that is going to operate. */ +#define SPICMD_READREG 0x6d /**< command to read register */ +#define SPICMD_WRITEREG 0x2d /**< command to write register */ +#define SPICMD_READFIFO 0x5f /**< command to read FIFO */ +/** + * @} SPI_Block_Const + * @} SPI_Block +*/ + +/** + * @addtogroup AFE_Control + * @{ + * */ + +/** + * @defgroup AFE_Control_Const + * @{ + * */ + +/** + * @defgroup AFEINTC_Const + * @brief AD5940 has two interrupt controller INTC0 and INTC1. Both of them have ability to generate interrupt signal from GPIO. + * @{ + * */ +/* AFE Interrupt controller selection */ +#define AFEINTC_0 0 /**< Interrupt controller 0 */ +#define AFEINTC_1 1 /**< Interrupt controller 1 */ +/** @} */ + +/** + * @defgroup AFEINTC_SRC_Const + * @brief Interrupt source selection. These sources are defined as bit mask. They are available for register INTCCLR, INTCSEL0/1, INTCFLAG0/1 + * @{ + * */ +#define AFEINTSRC_ADCRDY 0x00000001 /**< Bit0, ADC Result Ready Status */ +#define AFEINTSRC_DFTRDY 0x00000002 /**< Bit1, DFT Result Ready Status */ +#define AFEINTSRC_SINC2RDY 0x00000004 /**< Bit2, SINC2/Low Pass Filter Result Status */ +#define AFEINTSRC_TEMPRDY 0x00000008 /**< Bit3, Temp Sensor Result Ready */ +#define AFEINTSRC_ADCMINERR 0x00000010 /**< Bit4, ADC Minimum Value */ +#define AFEINTSRC_ADCMAXERR 0x00000020 /**< Bit5, ADC Maximum Value */ +#define AFEINTSRC_ADCDIFFERR 0x00000040 /**< Bit6, ADC Delta Ready */ +#define AFEINTSRC_MEANRDY 0x00000080 /**< Bit7, Mean Result Ready */ +#define AFEINTSRC_VARRDY 0x00000100 /**< Bit8, Variance Result Ready */ +#define AFEINTSRC_CUSTOMINT0 0x00000200 /**< Bit9, Custom interrupt source 0. It happens when **sequencer** writes 1 to register AFEGENINTSTA.BIT0 */ +#define AFEINTSRC_CUSTOMINT1 0x00000400 /**< Bit10, Custom interrupt source 1. It happens when **sequencer** writes 1 to register AFEGENINTSTA.BIT1*/ +#define AFEINTSRC_CUSTOMINT2 0x00000800 /**< Bit11, Custom interrupt source 2. It happens when **sequencer** writes 1 to register AFEGENINTSTA.BIT2 */ +#define AFEINTSRC_CUSTOMINT3 0x00001000 /**< Bit12, Custom interrupt source 3. It happens when **sequencer** writes 1 to register AFEGENINTSTA.BIT3 */ +#define AFEINTSRC_BOOTLDDONE 0x00002000 /**< Bit13, OTP Boot Loading Done */ +#define AFEINTSRC_WAKEUP 0x00004000 /**< Bit14, AFE Woken up*/ +#define AFEINTSRC_ENDSEQ 0x00008000 /**< Bit15, End of Sequence Interrupt. */ +#define AFEINTSRC_SEQTIMEOUT 0x00010000 /**< Bit16, Sequencer Timeout Command Finished. */ +#define AFEINTSRC_SEQTIMEOUTERR 0x00020000 /**< Bit17, Sequencer Timeout Command Error. */ +#define AFEINTSRC_CMDFIFOFULL 0x00040000 /**< Bit18, Command FIFO Full Interrupt. */ +#define AFEINTSRC_CMDFIFOEMPTY 0x00080000 /**< Bit19, Command FIFO Empty */ +#define AFEINTSRC_CMDFIFOTHRESH 0x00100000 /**< Bit20, Command FIFO Threshold Interrupt. */ +#define AFEINTSRC_CMDFIFOOF 0x00200000 /**< Bit21, Command FIFO Overflow Interrupt. */ +#define AFEINTSRC_CMDFIFOUF 0x00400000 /**< Bit22, Command FIFO Underflow Interrupt. */ +#define AFEINTSRC_DATAFIFOFULL 0x00800000 /**< Bit23, Data FIFO Full Interrupt. */ +#define AFEINTSRC_DATAFIFOEMPTY 0x01000000 /**< Bit24, Data FIFO Empty */ +#define AFEINTSRC_DATAFIFOTHRESH 0x02000000 /**< Bit25, Data FIFO Threshold Interrupt. */ +#define AFEINTSRC_DATAFIFOOF 0x04000000 /**< Bit26, Data FIFO Overflow Interrupt. */ +#define AFEINTSRC_DATAFIFOUF 0x08000000 /**< Bit27, Data FIFO Underflow Interrupt. */ +#define AFEINTSRC_WDTIRQ 0x10000000 /**< Bit28, WDT Timeout Interrupt. */ +#define AFEINTSRC_CRC_OUTLIER 0x20000000 /**< Bit29, CRC interrupt for M355, Outlier Int for AD5940 */ +#define AFEINTSRC_GPT0INT_SLPWUT 0x40000000 /**< Bit30, Gneral Pupose Timer0 IRQ for M355. Sleep or Wakeup Tiemr timeout for AD5940*/ +#define AFEINTSRC_GPT1INT_TRYBRK 0x80000000 /**< Bit31, Gneral Pupose Timer1 IRQ for M355. Tried to Break IRQ for AD5940*/ +#define AFEINTSRC_ALLINT 0xffffffff /**< mask of all interrupt */ +/** @} */ + +/** + * @defgroup AFEPWR_Const + * @brief AFE power mode. + * @details It will set the whole analog system power mode include HSDAC, Excitation Buffer, HSTIA, ADC front-buffer etc. + * @{ +*/ +#define AFEPWR_LP 0 /**< Set AFE to Low Power mode. For signal <80kHz, use it. */ +#define AFEPWR_HP 1 /**< Set AFE to High Power mode. For signal >80kHz, use it. */ +/** + * @} +*/ + +/** + * @defgroup AFEBW_Const + * @brief AFE system bandwidth. + * @details It will set the whole analog bandwidth include HSDAC, Excitation Buffer, HSTIA, ADC front-buffer etc. + * @{ +*/ +#define AFEBW_AUTOSET 0 /**< Set the bandwidth automatically based on WGFCW frequency word. */ +#define AFEBW_50KHZ 1 /**< 50kHZ system bandwidth(DAC/ADC) */ +#define AFEBW_100KHZ 2 /**< 100kHZ system bandwidth(DAC/ADC) */ +#define AFEBW_250KHZ 3 /**< 250kHZ system bandwidth(DAC/ADC) */ +/** + * @} +*/ + +/** + * @defgroup AFECTRL_Const + * @brief AFE Control signal set. Bit masks for register AFECON. + * @details This is all the available control signal for function @ref AD5940_AFECtrlS + * @warning Bit field in register AFECON has some opposite meaning as below definitions. We use all positive word here + * like HPREF instead of HPREFDIS. This set is only used in function @ref AD5940_AFECtrlS, the second parameter + * decides whether enable it or disable it. + * @{ +*/ +#define AFECTRL_HPREFPWR (1L<<5) /**< High power reference on-off control */ +#define AFECTRL_HSDACPWR (1L<<6) /**< High speed DAC on-off control */ +#define AFECTRL_ADCPWR (1L<<7) /**< ADC power on-off control */ +#define AFECTRL_ADCCNV (1L<<8) /**< Start ADC convert enable */ +#define AFECTRL_EXTBUFPWR (1L<<9) /**< Excitation buffer power control */ +#define AFECTRL_INAMPPWR (1L<<10) /**< Excitation loop input amplifier before P/N node power control */ +#define AFECTRL_HSTIAPWR (1L<<11) /**< High speed TIA amplifier power control */ +#define AFECTRL_TEMPSPWR (1L<<12) /**< Temperature sensor power */ +#define AFECTRL_TEMPCNV (1L<<13) /**< Start Temperature sensor convert */ +#define AFECTRL_WG (1L<<14) /**< Waveform generator on-off control */ +#define AFECTRL_DFT (1L<<15) /**< DFT engine on-off control */ +#define AFECTRL_SINC2NOTCH (1L<<16) /**< SIN2+Notch block on-off control */ +#define AFECTRL_ALDOLIMIT (1L<<19) /**< ALDO current limit on-off control */ +#define AFECTRL_DACREFPWR (1L<<20) /**< DAC reference buffer power control */ +#define AFECTRL_DCBUFPWR (1L<<21) /**< Excitation loop DC offset buffer sourced from LPDAC power control */ +#define AFECTRL_ALL 0x39ffe0 /**< All control signals */ +/** + * @} +*/ + +/** + * @defgroup LPMODECTRL_Const + * @brief LP Control signal(bit mask) for register LPMODECON + * @details This is all the available control signal for function @ref AD5940_LPModeCtrlS + * @warning Bit field in register LPMODECON has some opposite meaning as below definitions. We use all positive word here + * like HPREFPWR instead of HPREFDIS. This set is only used in function @ref AD5940_AFECtrlS, the second parameter + * decides whether enable or disable selected block(s). + * @{ +*/ +#define LPMODECTRL_HFOSCEN (1<<0) /**< Enable internal HFOSC. Note: the register defination is set this bit to 1 to disable it. */ +#define LPMODECTRL_HPREFPWR (1<<1) /**< High power reference power EN. Note: the register defination is set this bit to 1 to disable it. */ +#define LPMODECTRL_ADCCNV (1<<2) /**< Start ADC convert enable */ +#define LPMODECTRL_REPEATEN (1<<3) /**< Enable repeat convert function. This will enable ADC power automatically */ +#define LPMODECTRL_GLBBIASZ (1<<4) /**< Enable Global ZTAT bias. Disable it to save more power */ +#define LPMODECTRL_GLBBIASP (1<<5) /**< Enable Global PTAT bias. Disable it to save more power */ +#define LPMODECTRL_BUFHP1P8V (1<<6) /**< High power 1.8V reference buffer */ +#define LPMODECTRL_BUFHP1P1V (1<<7) /**< High power 1.1V reference buffer */ +#define LPMODECTRL_ALDOPWR (1<<8) /**< Enable ALDO. Note: register defination is set this bit to 1 to disable ALDO. */ +#define LPMODECTRL_ALL 0x1ff /**< All Control signal Or'ed together*/ +#define LPMODECTRL_NONE 0 /**< No blocks selected */ +/** @} */ + +/** + * @defgroup AFERESULT_Const + * @brief The available AFE results type. Used for function @ref AD5940_ReadAfeResult + * @{ +*/ +#define AFERESULT_SINC3 0 /**< SINC3 result */ +#define AFERESULT_SINC2 1 /**< SINC2+NOTCH result */ +#define AFERESULT_TEMPSENSOR 2 /**< Temperature sensor result */ +#define AFERESULT_DFTREAL 3 /**< DFT Real result */ +#define AFERESULT_DFTIMAGE 4 /**< DFT Imaginary result */ +#define AFERESULT_STATSMEAN 5 /**< Statistic Mean result */ +#define AFERESULT_STATSVAR 6 /**< Statistic Variance result */ +/** @} */ + +/** + * @} AFE_Control_Const + * @} AFE_Control + * */ + +/** + * @addtogroup High_Speed_Loop + * @{ + * @defgroup High_Speed_Loop_Const + * @{ +*/ + +/** + * @defgroup Switch_Matrix_Block_Const + * @{ + * @defgroup SWD_Const + * @brief Switch D set. This is bit mask for register DSWFULLCON. + * @details + * It's used to initialize structure @ref SWMatrixCfg_Type + * The bit masks can be OR'ed together. For example + * - `SWD_AIN1|SWD_RCAL0` means close SWD_AIN1 and SWD_RCAL0 in same time, and open all other D switches. + * - `SWD_AIN2` means close SWD_AIN2 and open all other D switches. + * @{ +*/ +#define SWD_OPEN (0<<0) /**< Open all D switch. */ +#define SWD_RCAL0 (1<<0) /**< pin RCAL0 */ +#define SWD_AIN1 (1<<1) /**< Pin AIN1 */ +#define SWD_AIN2 (1<<2) /**< Pin AIN2 */ +#define SWD_AIN3 (1<<3) /**< Pin AIN3 */ +#define SWD_CE0 (1<<4) /**< Pin CE0 */ +#define SWD_CE1 (1<<5) /**< CE1 in ADuCM355 */ +#define SWD_AFE1 (1<<5) /**< AFE1 in AD594x */ +#define SWD_SE0 (1<<6) /**< Pin SE0 */ +#define SWD_SE1 (1<<7) /**< SE1 in ADuCM355 */ +#define SWD_AFE3 (1<<7) /**< AFE3 in AD594x */ +/** @} */ + +/** + * @defgroup SWP_Const + * @brief Switch P set. This is bit mask for register PSWFULLCON. + * @details + * It's used to initialize structure @ref SWMatrixCfg_Type. + * The bit masks can be OR'ed together. For example + * - `SWP_RCAL0|SWP_AIN1` means close SWP_RCAL0 and SWP_AIN1 in same time, and open all other P switches. + * - `SWP_SE0` means close SWP_SE0 and open all other P switches. + * @{ +*/ +#define SWP_OPEN 0 /**< Open all P switches */ +#define SWP_RCAL0 (1<<0) /**< Pin RCAL0 */ +#define SWP_AIN1 (1<<1) /**< Pin AIN1 */ +#define SWP_AIN2 (1<<2) /**< Pin AIN2 */ +#define SWP_AIN3 (1<<3) /**< Pin AIN3 */ +#define SWP_RE0 (1<<4) /**< Pin RE0 */ +#define SWP_RE1 (1<<5) /**< RE1 in ADuCM355 */ +#define SWP_AFE2 (1<<5) /**< AFE2 in AD5940 */ +#define SWP_SE0 (1<<6) /**< Pin SE0 */ +#define SWP_DE0 (1<<7) /**< Pin DE0 */ +#define SWP_SE1 (1<<8) /**< SE1 in ADuCM355 */ +#define SWP_AFE3 (1<<8) /**< AFE3 in AD5940 */ +#define SWP_DE1 (1<<9) /**< ADuCM355 Only. */ +#define SWP_CE0 (1<<10) /**< Pin CE0 */ +#define SWP_CE1 (1<<11) /**< CE1 in ADuCM355 */ +#define SWP_AFE1 (1<<11) /**< AFE1 in AD5940 */ +#define SWP_PL (1<<13) /**< Internal PL switch */ +#define SWP_PL2 (1<<14) /**< Internal PL2 switch */ +/** @} */ + +/** + * @defgroup SWN_Const + * @brief Switch N set. This is bit mask for register NSWFULLCON. + * @details + * It's used to initialize structure @ref SWMatrixCfg_Type. + * The bit masks can be OR'ed together. For example + * - `SWN_RCAL0|SWN_AIN1` means close SWN_RCAL0 and SWN_AIN1 in same time, and open all other N switches. + * - `SWN_SE0` means close SWN_SE0 and open all other N switches. + * @{ +*/ +#define SWN_OPEN 0 /**< Open all N switches */ +#define SWN_RCAL1 (1<<9) /**< Pin RCAL1 */ +#define SWN_AIN0 (1<<0) /**< Pin AIN0 */ +#define SWN_AIN1 (1<<1) /**< Pin AIN1 */ +#define SWN_AIN2 (1<<2) /**< Pin AIN2 */ +#define SWN_AIN3 (1<<3) /**< Pin AIN3 */ +#define SWN_SE0LOAD (1<<4) /**< SE0_LOAD is different from PIN SE0. It's the point after 100Ohm load resistor */ +#define SWN_DE0LOAD (1<<5) /**< DE0_Load is after Rload resistor */ +#define SWN_SE1LOAD (1<<6) /**< SE1_LOAD in ADuCM355 */ +#define SWN_AFE3LOAD (1<<6) /**< AFE3LOAD in ADuCM355 */ +#define SWN_DE1LOAD (1<<7) /**< ADuCM355 Only*/ +#define SWN_SE0 (1<<8) /**< SE0 here means the PIN SE0. */ +#define SWN_NL (1<<10) /**< Internal NL switch */ +#define SWN_NL2 (1<<11) /**< Internal NL2 switch */ +/** @} */ + +/** + * @defgroup SWT_Const + * @brief Switch T set. This is bit mask for register TSWFULLCON. + * @details + * It's used to initialize structure @ref SWMatrixCfg_Type. + * The bit masks can be OR'ed together. For example + * - SWT_RCAL0|SWT_AIN1 means close SWT_RCAL0 and SWT_AIN1 in same time, and open all other T switches. + * - SWT_SE0LOAD means close SWT_SE0LOAD and open all other T switches. + * @{ +*/ +#define SWT_OPEN 0 /**< Open all T switches */ +#define SWT_RCAL1 (1<<11) /**< Pin RCAL1 */ +#define SWT_AIN0 (1<<0) /**< Pin AIN0 */ +#define SWT_AIN1 (1<<1) /**< Pin AIN1 */ +#define SWT_AIN2 (1<<2) /**< Pin AIN2 */ +#define SWT_AIN3 (1<<3) /**< Pin AIN3 */ +#define SWT_SE0LOAD (1<<4) /**< SE0_LOAD is different from PIN SE0. It's the point after 100Ohm load resistor */ +#define SWT_DE0 (1<<5) /**< DE0 pin. */ +#define SWT_SE1LOAD (1<<6) /**< SE1_LOAD on ADuCM355*/ +#define SWT_AFE3LOAD (1<<6) /**< AFE3_LOAD on ADuCM355*/ +#define SWT_DE1 (1<<7) /**< ADuCM355 Only*/ +#define SWT_TRTIA (1<<8) /**< T9 switch. Connect RTIA to T matrix */ +#define SWT_DE0LOAD (1<<9) /**< DE0Load is the position after Rload Resisor */ +#define SWT_DE1LOAD (1<<10) /**< DE1Load is the position after Rload Resisor */ +/** @} */ + +/** @} Switch_Matrix_Block_Const */ + + +/** + * @defgroup Waveform_Generator_Block_Const + * @{ +*/ +/** + * @defgroup WGTYPE_Const + * @brief Waveform generator signal type + * @{ +*/ +#define WGTYPE_MMR 0 /**< Direct write to DAC using register */ +#define WGTYPE_SIN 2 /**< Sine wave generator */ +#define WGTYPE_TRAPZ 3 /**< Trapezoid generator */ +/** @} */ +/** @} Waveform_Generator_Block_Const */ + +/** + * @defgroup HSDAC_Block_Const + * @{ +*/ +/* Excitation buffer gain selection */ +/** + * @defgroup EXCITBUFGAIN_Const + * @{ +*/ +#define EXCITBUFGAIN_2 0 /**< Excitation buffer gain is x2 */ +#define EXCITBUFGAIN_0P25 1 /**< Excitation buffer gain is x1/4 */ +/** @} */ + +/** + * @defgroup HSDACGAIN_Const + * @{ +*/ +/* HSDAC PGA Gain selection(DACCON.BIT0) */ +#define HSDACGAIN_1 0 /**< Gain is x1 */ +#define HSDACGAIN_0P2 1 /**< Gain is x1/5 */ +/** @} */ +/** @} */ //HSDAC_Block_Const + +/** + * @defgroup HSTIA_Block_Const + * @{ + * */ +/* HSTIA Amplifier Positive Input selection */ + +/** + * @defgroup HSTIABIAS_Const + * @warning When select Vzero0 as bias, close LPDAC switch + * @{ +*/ +#define HSTIABIAS_1P1 0 /**< Internal 1.1V common voltage from internal 1.1V reference buffer */ +#define HSTIABIAS_VZERO0 1 /**< From LPDAC0 Vzero0 output */ +#define HSTIABIAS_VZERO1 2 /**< From LPDAC1 Vzero1 output. Only available on ADuCM355. */ +/** @} */ + + +/* HSTIA Internal RTIA selection */ + +/** + * @defgroup HSTIARTIA_Const + * @{ +*/ +#define HSTIARTIA_200 0 /**< HSTIA Internal RTIA resistor 200 */ +#define HSTIARTIA_1K 1 /**< HSTIA Internal RTIA resistor 1K */ +#define HSTIARTIA_5K 2 /**< HSTIA Internal RTIA resistor 5K */ +#define HSTIARTIA_10K 3 /**< HSTIA Internal RTIA resistor 10K */ +#define HSTIARTIA_20K 4 /**< HSTIA Internal RTIA resistor 20K */ +#define HSTIARTIA_40K 5 /**< HSTIA Internal RTIA resistor 40K */ +#define HSTIARTIA_80K 6 /**< HSTIA Internal RTIA resistor 80K */ +#define HSTIARTIA_160K 7 /**< HSTIA Internal RTIA resistor 160K */ +#define HSTIARTIA_OPEN 8 /**< Open internal resistor */ +/** @} */ + +/** + * @defgroup HSTIADERTIA_Const + * @{ +*/ +#define HSTIADERTIA_50 0 /**< 50Ohm Settings depends on RLOAD resistor. */ +#define HSTIADERTIA_100 1 /**< 100Ohm Settings depends on RLOAD resistor.*/ +#define HSTIADERTIA_200 2 /**< 200Ohm Settings depends on RLOAD resistor.*/ +#define HSTIADERTIA_1K 3 /**< set bit[7:3] to 0x0b(11) */ +#define HSTIADERTIA_5K 4 /**< set bit[7:3] to 0x0c(12) */ +#define HSTIADERTIA_10K 5 /**< set bit[7:3] to 0x0d(13) */ +#define HSTIADERTIA_20K 6 /**< set bit[7:3] to 0x0e(14) */ +#define HSTIADERTIA_40K 7 /**< set bit[7:3] to 0x0f(15) */ +#define HSTIADERTIA_80K 8 /**< set bit[7:3] to 0x10(16) */ +#define HSTIADERTIA_160K 9 /**< set bit[7:3] to 0x11(17) */ +#define HSTIADERTIA_TODE 10 /**< short HSTIA output to DE0 pin. set bit[7:3] to 0x12(18) */ +#define HSTIADERTIA_OPEN 11 /**< Default state is set to OPEN RTIA by setting bit[7:3] to 0x1f */ +/** @} */ + +/* HSTIA DE0 Terminal internal RLOAD selection */ +/** + * @defgroup HSTIADERLOAD_Const + * @{ +*/ +#define HSTIADERLOAD_0R 0 /**< set bit[2:0] to 0x00 */ +#define HSTIADERLOAD_10R 1 /**< set bit[2:0] to 0x01 */ +#define HSTIADERLOAD_30R 2 /**< set bit[2:0] to 0x02 */ +#define HSTIADERLOAD_50R 3 /**< set bit[2:0] to 0x03 */ +#define HSTIADERLOAD_100R 4 /**< set bit[2:0] to 0x04 */ +#define HSTIADERLOAD_OPEN 5 /**< RLOAD open means open switch between HSTIA negative input and Rload resistor().Default state is OPEN RLOAD by setting HSTIARES03CON[2:0] to 0x5, 0x6 or 0x7 */ +/** @} */ + +/** + * @defgroup HSTIAPWRMOE_Const + * @{ +*/ +#define HSTIAPWRMOE_LP 0 /**< HSTIA in LP mode */ +#define HSTIAPWRMOE_HP 1 /**< HSTIA in HP mode */ +/** @} */ + + +/** @} HSTIA_Block_Const */ +/** + * @} High_Speed_Loop_Const + * @} High_Speed_Loop +*/ + +/** + * @addtogroup Low_Power_Loop + * Low power includes low power DAC and two low power amplifiers(PA and TIA) + * @{ + * @defgroup Low_Power_Loop_Const + * The constant used in Low power loop. + * @{ +*/ + +/** + * @defgroup LPDAC_Block_Const + * @{ + * */ +/** + * @defgroup LPDAC_Const + * Select which LPDAC is accessing. + * @note This parameter must be configured correctly + * @{ +*/ +#define LPDAC0 0 /**< LPDAC0 */ +#define LPDAC1 1 /**< LPDAC1, ADuCM355 Only */ +/** @} */ +/** + * @defgroup LPDACSRC_Const + * LPDAC data source selection. Either from MMR or from waveform generator. + * @{ +*/ +#define LPDACSRC_MMR 0 /**< Get data from register REG_AFE_LPDACDAT0DATA0 */ +#define LPDACSRC_WG 1 /**< Get data from waveform generator */ +/** @} */ + +/** + * @defgroup LPDACSW_Const + * @brief LPDAC switch settings + * @{ +*/ +#define LPDACSW_VBIAS2LPPA 0x10 /**< switch between LPDAC Vbias output and LPPA(low power PA(Potential Amplifier)) */ +#define LPDACSW_VBIAS2PIN 0x08 /**< Switch between LPDAC Vbias output and Vbias pin */ +#define LPDACSW_VZERO2LPTIA 0x04 /**< Switch between LPDAC Vzero output and LPTIA positive input */ +#define LPDACSW_VZERO2PIN 0x02 /**< Switch between LPDAC Vzero output and Vzero pin */ +#define LPDACSW_VZERO2HSTIA 0x01 /**< Switch between LPDAC Vzero output and HSTIA positive input MUX */ +/** @} */ + +/** + * @defgroup LPDACVZERO_Const + * @brief Vzero MUX selection + * @{ +*/ +#define LPDACVZERO_6BIT 0 /**< Connect Vzero to 6bit LPDAC output */ +#define LPDACVZERO_12BIT 1 /**< Connect Vzero to 12bit LPDAC output */ +/** @} */ + +/** + * @defgroup LPDACVBIAS_Const + * @brief Vbias MUX selection + * @{ +*/ +#define LPDACVBIAS_6BIT 1 /**< Connect Vbias to 6bit LPDAC output */ +#define LPDACVBIAS_12BIT 0 /**< Connect Vbias to 12bit LPDAC output */ +/** @} */ + + +/** + * @defgroup LPDACREF_Const + * @brief LPDAC reference selection + * @{ +*/ +#define LPDACREF_2P5 0 /**< Internal 2.5V reference */ +#define LPDACREF_AVDD 1 /**< Use AVDD as reference */ +/** @} */ + +/** @} */ //LPDAC_Block_Const + +/** + * @defgroup LPAMP_Block_Const + * @brief Low power amplifies include potential-state amplifier(PA in short) and TIA. + * @{ + * */ + +/** + * @defgroup LPTIA_Const + * @brief LPTIA selecion + * @{ + * */ +#define LPTIA0 0 /**< LPTIA0 */ +#define LPTIA1 1 /**< LPTIA1, ADuCM355 Only */ +/** @} */ + +/** + * @defgroup LPTIARF_Const + * @brief LPTIA LPF Resistor selection + * @{ + * */ +#define LPTIARF_OPEN 0 /**< Disconnect Rf resistor */ +#define LPTIARF_SHORT 1 /**< Bypass Rf resistor */ +#define LPTIARF_20K 2 /**< 20kOhm Rf */ +#define LPTIARF_100K 3 /**< Rf resistor 100kOhm */ +#define LPTIARF_200K 4 /**< Rf resistor 200kOhm */ +#define LPTIARF_400K 5 /**< Rf resistor 400kOhm */ +#define LPTIARF_600K 6 /**< Rf resistor 600kOhm */ +#define LPTIARF_1M 7 /**< Rf resistor 1MOhm */ +/** @} */ + +/** + * @defgroup LPTIARLOAD_Const + * @brief LPTIA Rload Selection + * @{ +*/ +#define LPTIARLOAD_SHORT 0 /**< 0Ohm Rload */ +#define LPTIARLOAD_10R 1 /**< 10Ohm Rload */ +#define LPTIARLOAD_30R 2 /**< Rload resistor 30Ohm */ +#define LPTIARLOAD_50R 3 /**< Rload resistor 50Ohm */ +#define LPTIARLOAD_100R 4 /**< Rload resistor 100Ohm */ +#define LPTIARLOAD_1K6 5 /**< Only available when RTIA setting >= 2KOHM */ +#define LPTIARLOAD_3K1 6 /**< Only available when RTIA setting >= 4KOHM */ +#define LPTIARLOAD_3K6 7 /**< Only available when RTIA setting >= 4KOHM */ +/** @} */ + +/** + * @defgroup LPTIARTIA_Const + * @brief LPTIA RTIA Selection + * @note The real RTIA resistor value dependents on Rload settings. + * @{ +*/ +#define LPTIARTIA_OPEN 0 /**< Disconnect LPTIA Internal RTIA */ +#define LPTIARTIA_200R 1 /**< 200Ohm Internal RTIA */ +#define LPTIARTIA_1K 2 /**< 1KOHM */ +#define LPTIARTIA_2K 3 /**< 2KOHM */ +#define LPTIARTIA_3K 4 /**< 3KOHM */ +#define LPTIARTIA_4K 5 /**< 4KOHM */ +#define LPTIARTIA_6K 6 /**< 6KOHM */ +#define LPTIARTIA_8K 7 /**< 8KOHM */ +#define LPTIARTIA_10K 8 /**< 10KOHM */ +#define LPTIARTIA_12K 9 /**< 12KOHM */ +#define LPTIARTIA_16K 10 /**< 16KOHM */ +#define LPTIARTIA_20K 11 /**< 20KOHM */ +#define LPTIARTIA_24K 12 /**< 24KOHM */ +#define LPTIARTIA_30K 13 /**< 30KOHM */ +#define LPTIARTIA_32K 14 /**< 32KOHM */ +#define LPTIARTIA_40K 15 /**< 40KOHM */ +#define LPTIARTIA_48K 16 /**< 48KOHM */ +#define LPTIARTIA_64K 17 /**< 64KOHM */ +#define LPTIARTIA_85K 18 /**< 85KOHM */ +#define LPTIARTIA_96K 19 /**< 96KOHM */ +#define LPTIARTIA_100K 20 /**< 100KOHM */ +#define LPTIARTIA_120K 21 /**< 120KOHM */ +#define LPTIARTIA_128K 22 /**< 128KOHM */ +#define LPTIARTIA_160K 23 /**< 160KOHM */ +#define LPTIARTIA_196K 24 /**< 196KOHM */ +#define LPTIARTIA_256K 25 /**< 256KOHM */ +#define LPTIARTIA_512K 26 /**< 512KOHM */ +/** @} */ + +/** + * @defgroup LPAMP_Const + * LPAMP selecion. On AD594x, only LPAMP0 is available. + * @note This parameter must be configured correctly. + * @{ + * */ +#define LPAMP0 0 /**< LPAMP0, AMP include both LPTIA and Potentio-stat amplifiers */ +#define LPAMP1 1 /**< LPAMP1, ADuCM355 Only */ +/** @} */ + +/** + * @defgroup LPAMPPWR_Const + * @brief Low power amplifier(PA and TIA) power mode selection. + * @{ +*/ +#define LPAMPPWR_NORM 0 /**< Normal Power mode */ +#define LPAMPPWR_BOOST1 1 /**< Boost power to level 1 */ +#define LPAMPPWR_BOOST2 2 /**< Boost power to level 2 */ +#define LPAMPPWR_BOOST3 3 /**< Boost power to level 3 */ +#define LPAMPPWR_HALF 4 /**< Put PA and TIA in half power mode */ +/** @} */ + +#define LPTIASW(n) (1L<>2)&0x7f)<<24) \ + |(((uint32_t)(data))&0xffffff)) + +/* Some commands used frequently */ +#define SEQ_NOP() SEQ_WAIT(0) /**< SEQ_NOP is just a simple wait command that wait one system clock */ +#define SEQ_HALT() SEQ_WR(REG_AFE_SEQCON,0x12) /**< Can halt sequencer. Used for debug */ +#define SEQ_STOP() SEQ_WR(REG_AFE_SEQCON,0x00) /**< Disable sequencer, this will generate End of Sequence interrupt */ + +#define SEQ_SLP() SEQ_WR(REG_AFE_SEQTRGSLP, 1) /**< Trigger sleep. If sleep is allowed, AFE will go to sleep/hibernate mode */ + +#define SEQ_INT0() SEQ_WR(REG_AFE_AFEGENINTSTA, (1L<<0)) /**< Generate custom interrupt 0 */ +#define SEQ_INT1() SEQ_WR(REG_AFE_AFEGENINTSTA, (1L<<1)) /**< Generate custom interrupt 1 */ +#define SEQ_INT2() SEQ_WR(REG_AFE_AFEGENINTSTA, (1L<<2)) /**< Generate custom interrupt 2 */ +#define SEQ_INT3() SEQ_WR(REG_AFE_AFEGENINTSTA, (1L<<3)) /**< Generate custom interrupt 3 */ + +/* Helper to calculate sequence length in array */ +#define SEQ_LEN(n) (sizeof(n)/4) /**< Calculate how many commands are in sepecified array. */ +/** @} */ //Sequencer_Helper + +/* FIFO */ +/** + * @defgroup FIFOMODE_Const + * @{ +*/ +#define FIFOMODE_FIFO 2 /**< Standard FIFO mode. If FIFO is full, reject all comming data and put FIFO to fault state, report interrupt if enabled */ +#define FIFOMODE_STREAM 3 /**< Stream mode. If FIFO is full, discard older data. Report FIFO full interrupt if enabled */ +/** @} */ + +/** + * @defgroup FIFOSRC_Const + * @{ +*/ +#define FIFOSRC_SINC3 0 /**< SINC3 data */ +#define FIFOSRC_DFT 2 /**< DFT real and imaginary part */ +#define FIFOSRC_SINC2NOTCH 3 /**< SINC2+NOTCH block. Notch can be bypassed, so SINC2 data can be feed to FIFO */ +#define FIFOSRC_VAR 4 /**< Statistic variarance output */ +#define FIFOSRC_MEAN 5 /**< Statistic mean output */ +/** @} */ + +/** + * @defgroup FIFO_Helper + * @{ +*/ +/** + * Method to identify FIFO channel ID: + * [31:25][24:23][22:16][15:0] + * [ ECC ][SEQID][CH_ID][DATA] + * + * CH_ID: [22:16] 7bit in total: + * xxxxx_xx + * 11111_xx : DFT results + * 11110_xx : Mean of statistic block + * 11101_xx : Variance of statistic block + * 1xxxx_xx : Notch filter result, where xxx_xx is the ADC MUX P settings(6bits of reg ADCCON[5:0]). + * 0xxxx_xx : SINC3 filter result, where xxx_xx is the ADC MUX P settings(6bits of reg ADCCON[5:0]). +*/ +#define FIFO_SEQID(data) ((((uint32_t)data)>>23)&0x3) /**< Return seqid of this FIFO result */ +#define FIFO_ECC(data) ((((uint32_t)data)>>25)&0x7f) /**< Return ECC of this FIFO result */ +#define FIFO_CHANID(data) ((((uint32_t)data)>>16)&0x7f) /**< Return Channel ID */ +#define FIFOCHANID_MUXP(data) ((((uint32_t)data)>>16)&0x3f) /**< Return the ADC MUXP selection */ + +#define ISCHANID_DFT(data) ((((((uint32_t)data)>>18)&0x1f)==0x1f)?bTRUE:bFALSE) /**< If the channel id is DFT */ +#define ISCHANID_MEAN(data) ((((((uint32_t)data)>>18)&0x1f)==0x1e)?bTRUE:bFALSE) /**< If the channel id is MEAN */ +#define ISCHANID_VAR(data) ((((((uint32_t)data)>>18)&0x1f)==0x1d)?bTRUE:bFALSE) /**< If the channel id is Variance */ +#define ISCHANID_SINC3(data) ((((((uint32_t)data)>>18)&0x1f)< 0x10)?bTRUE:bFALSE) /**< If the channel id is SINC3 */ +#define ISCHANID_NOTCH(data) ((((((uint32_t)data)>>18)&0x1f)>=0x10)&&(((((uint32_t)data>>18)&0x1f) < 0x1d)?bTRUE:bFALSE)) /**< If the channel id is Notch */ +/** @} */ + +/** + * @defgroup FIFOSIZE_Const + * @brief Set FIFO size. + * @warning The total available SRAM is 6kB. It's shared by FIFO and sequencer. + * @{ +*/ +#define FIFOSIZE_32B 0 /**< The selfbuild in 32Byte for data FIFO. All 6kB SRAM for sequencer */ +#define FIFOSIZE_2KB 1 /**< DATA FIFO use 2kB. The reset 4kB is used for sequencer */ +#define FIFOSIZE_4KB 2 /**< 4kB for Data FIFO. 2kB for sequencer */ +#define FIFOSIZE_6KB 3 /**< All 6kB for Data FIFO. Build in 32Bytes memory for sequencer */ +/** @} */ + +/* Wake up timer */ +/** + * @defgroup WUPTENDSEQ_Const + * @{ +*/ +#define WUPTENDSEQ_A 0 /**< End at slot A */ +#define WUPTENDSEQ_B 1 /**< End at slot B */ +#define WUPTENDSEQ_C 2 /**< End at slot C */ +#define WUPTENDSEQ_D 3 /**< End at slot D */ +#define WUPTENDSEQ_E 4 /**< End at slot E */ +#define WUPTENDSEQ_F 5 /**< End at slot F */ +#define WUPTENDSEQ_G 6 /**< End at slot G */ +#define WUPTENDSEQ_H 7 /**< End at slot H */ +/** @} */ + +/** + * @} End of sequencer_and_FIFO block + * @} Sequencer_FIFO + * */ + +/** + * @addtogroup MISC_Block + * @{ + * @defgroup MISC_Block_Const + * @brief This block includes clock, GPIO, configuration. + * @{ +*/ + +/* Helper for calculate clocks needed for various of data type */ +/** + * @defgroup DATATYPE_Const + * @{ +*/ +#define DATATYPE_ADCRAW 0 /**< ADC raw data */ +#define DATATYPE_SINC3 1 /**< SINC3 data */ +#define DATATYPE_SINC2 2 /**< SINC2 Data */ +#define DATATYPE_DFT 3 /**< DFT */ +#define DATATYPE_NOTCH 4 /**< Notch filter output. (when notch is not bypassed) */ +//#define DATATYPE_MEAN +/** @} */ + + +/** + * @defgroup SLPKEY_Const + * @{ +*/ +#define SLPKEY_LOCK 0 /**< any incorrect value will lock the key */ +#define SLPKEY_UNLOCK 0xa47e5 /**< The correct key for register SEQSLPLOCK */ +/** @} */ + +/** + * @defgroup HPOSCOUT_Const + * @brief Set HPOSC output clock frequency, 16MHz or 32MHz. + * @{ +*/ +#define HPOSCOUT_32MHZ 0 /**< Configure internal HFOSC output 32MHz clock */ +#define HPOSCOUT_16MHZ 1 /**< 16MHz Clock */ +/** @} */ + +/* GPIO */ +/** + * @defgroup AGPIOPIN_Const + * @brief The pin masks for register GP0OEN, GP0PE, GP0IEN,..., GP0TGL + * @{ +*/ +#define AGPIO_Pin0 0x01 /**< AFE GPIO0, only available on AD5940 and AD5941, not ADuCM355 */ +#define AGPIO_Pin1 0x02 /**< AFE GPIO1, only available on AD5940 and AD5941, not ADuCM355 */ +#define AGPIO_Pin2 0x04 /**< AFE GPIO2, only available on AD5940 and AD5941, not ADuCM355 */ +#define AGPIO_Pin3 0x08 /**< AFE GPIO3, only available on AD5941. */ +#define AGPIO_Pin4 0x10 /**< AFE GPIO4, only available on AD5941. */ +#define AGPIO_Pin5 0x20 /**< AFE GPIO5, only available on AD5941. */ +#define AGPIO_Pin6 0x40 /**< AFE GPIO6, only available on AD5941. */ +#define AGPIO_Pin7 0x80 /**< AFE GPIO7, only available on AD5941. */ +/** @} */ + +/** + * @defgroup GP0FUNC_Const + * @{ +*/ +#define GP0_INT 0 /**< Interrupt Controller 0 output */ +#define GP0_TRIG 1 /**< Sequence0 trigger */ +#define GP0_SYNC 2 /**< Use Sequencer to controll GP0 output level */ +#define GP0_GPIO 3 /**< Normal GPIO function */ +/** @} */ + +/** + * @defgroup GP1FUNC_Const + * @{ +*/ +#define GP1_GPIO (0<<2) /**< Normal GPIO function */ +#define GP1_TRIG (1<<2) /**< Sequence1 trigger */ +#define GP1_SYNC (2<<2) /**< Use Sequencer to controll GP1 output level */ +#define GP1_SLEEP (3<<2) /**< Internal Sleep Signal */ +/** @} */ + +/** + * @defgroup GP2FUNC_Const + * @{ +*/ +#define GP2_PORB (0<<4) /**< Internal Power ON reset signal */ +#define GP2_TRIG (1<<4) /**< Sequence1 trigger */ +#define GP2_SYNC (2<<4) /**< Use Sequencer to controll GP2 output level */ +#define GP2_EXTCLK (3<<4) /**< External Clock input(32kHz/16MHz/32MHz) */ +/** @} */ + +/** + * @defgroup GP3FUNC_Const + * @{ +*/ +#define GP3_GPIO (0<<6) /**< Normal GPIO function */ +#define GP3_TRIG (1<<6) /**< Sequence3 trigger */ +#define GP3_SYNC (2<<6) /**< Use Sequencer to controll GP3 output level */ +#define GP3_INT0 (3<<6) /**< Interrupt Controller 0 output */ +/** @} */ + +/** + * @defgroup GP4FUNC_Const + * @note GP4 (Not available on AD5941) + * @{ +*/ +#define GP4_GPIO (0<<8) /**< Normal GPIO function */ +#define GP4_TRIG (1<<8) /**< Sequence0 trigger */ +#define GP4_SYNC (2<<8) /**< Use Sequencer to controll GP4 output level */ +#define GP4_INT1 (3<<8) /**< Interrupt Controller 1 output */ +/** @} */ + +/** + * @defgroup GP5FUNC_Const + * @note GP5 (Not available on AD5941) + * @{ +*/ +#define GP5_GPIO (0<<10) /**< Internal Power ON reset signal */ +#define GP5_TRIG (1<<10) /**< Sequence1 trigger */ +#define GP5_SYNC (2<<10) /**< Use Sequencer to controll GP5 output level */ +#define GP5_EXTCLK (3<<10) /**< External Clock input(32kHz/16MHz/32MHz) */ +/** @} */ + +/** + * @defgroup GP6FUNC_Const + * @note GP6 (Not available on AD5941) + * @{ +*/ +#define GP6_GPIO (0<<12) /**< Normal GPIO function */ +#define GP6_TRIG (1<<12) /**< Sequence2 trigger */ +#define GP6_SYNC (2<<12) /**< Use Sequencer to controll GP6 output level */ +#define GP6_INT0 (3<<12) /**< Interrupt Controller 0 output */ +/** @} */ + +/** + * @defgroup GP7FUNC_Const + * @note GP7 (Not available on AD5941) + * @{ +*/ +#define GP7_GPIO (0<<14) /**< Normal GPIO function */ +#define GP7_TRIG (1<<14) /**< Sequence2 trigger */ +#define GP7_SYNC (2<<14) /**< Use Sequencer to controll GP7 output level */ +#define GP7_INT (3<<14) /**< Interrupt Controller 1 output */ +/** @} */ + +//LPModeClk +/** + * @defgroup LPMODECLK_Const + * @{ +*/ +#define LPMODECLK_HFOSC 0 /**< Use HFOSC 16MHz/32MHz clock as system clock */ +#define LPMODECLK_LFOSC 1 /**< Use LFOSC 32kHz clock as system clock */ +/** @} */ + +/* Clock */ +/** + * @defgroup SYSCLKSRC_Const + * @brief Select system clock source. The clock must be available. If unavailable clock is selected, we can reset AD5940. + * The system clock should be limited to 32MHz. If external clock or XTAL is faster than 16MHz, we use system clock divider to ensure it's always in range of 16MHz. + * @warning Maximum SPI clock has relation with system clock. Limit the SPI clock to ensure SPI clock is slower than system clock. + * @{ +*/ +#define SYSCLKSRC_HFOSC 0 /**< Internal HFOSC. CLock is 16MHz or 32MHz configurable. Set clock divider to ensure system clock is always 16MHz */ +#define SYSCLKSRC_XTAL 1 /**< External crystal. It can be 16MHz or 32MHz.Set clock divider to ensure system clock is always 16MHz */ +#define SYSCLKSRC_LFOSC 2 /**< Internal 32kHz clock. Note the SPI clock also sourced with 32kHz so the register read/write frequency is lower down. */ +#define SYSCLKSRC_EXT 3 /**< External clock from GPIO, AD594x Only */ +/** @} */ + +/** + * @defgroup ADCCLKSRC_Const + * @brief Select ADC clock source. + * The maximum clock is 32MHz. + * @warning The ADC raw data update rate is equal to ADCClock/20. When ADC clock is 32MHz, sample rate is 1.6MSPS. + * The SINC3 filter clock are sourced from ADC clock and should be limited to 16MHz. When ADC clock is set to 32MHz. Clear bit ADCFILTERCON.BIT0 + * to enable the SINC3 clock divider. + * @{ +*/ +#define ADCCLKSRC_HFOSC 0 /**< Internal HFOSC. 16MHz or 32MHz which is configurable */ +#define ADCCLKSRC_XTAL 1 /**< External crystal. Set ADC clock divider to get either 16MHz or 32MHz clock */ +//#define ADCCLKSRC_LFOSC 2 /**< Do not use */ +#define ADCCLKSRC_EXT 3 /**< External clock from GPIO. Set ADC clock divider to get the clock you want */ +/** @} */ + + +/** + * @defgroup ADCCLKDIV_Const + * @brief The divider for ADC clock. ADC clock = ClockSrc/Divider. + * @{ +*/ +#define ADCCLKDIV_1 1 /**< Divider ADCClk = ClkSrc/1 */ +#define ADCCLKDIV_2 2 /**< Divider ADCClk = ClkSrc/2 */ +/** @} */ + +/** + * @defgroup SYSCLKDV_Const + * @brief The divider for system clock. System clock = ClockSrc/Divider. + * @{ +*/ +#define SYSCLKDIV_1 1 /**< Divider SysClk = ClkSrc/1 */ +#define SYSCLKDIV_2 2 /**< Divider SysClk = ClkSrc/2 */ +/** @} */ + +/** + * @defgroup PGACALTYPE_Const + * @brief Calibration Type + * @{ +*/ +#define PGACALTYPE_OFFSET 0 /**< Calibrate offset */ +#define PGACALTYPE_GAIN 1 /**< Calibrate gain */ +#define PGACALTYPE_OFFSETGAIN 2 /**< Calibrate offset and gain */ +/** @} */ + +/** + * @defgroup AD5940ERR_Const + * @brief AD5940 error code used by library and example codes. + * @{ +*/ +#define AD5940ERR_OK 0 /**< No error */ +#define AD5940ERR_ERROR -1 /**< General error message */ +#define AD5940ERR_PARA -2 /**< Parameter is illegal */ +#define AD5940ERR_NULLP -3 /**< Null pointer */ +#define AD5940ERR_BUFF -4 /**< Buffer limited. */ +#define AD5940ERR_ADDROR -5 /**< Out of Range. Register address is out of range. */ +#define AD5940ERR_SEQGEN -6 /**< Sequence generator error */ +#define AD5940ERR_SEQREG -7 /**< Register info is not found */ +#define AD5940ERR_SEQLEN -8 /**< Sequence length is too long. */ +#define AD5940ERR_WAKEUP -9 /**< Unable to wakeup AFE in specified time */ +#define AD5940ERR_TIMEOUT -10 /**< Time out error. */ +#define AD5940ERR_CALOR -11 /**< calibration out of range. */ +#define AD5940ERR_APPERROR -100 /**< Used in example code to indicated the application has not been initialized. */ +/** @} */ + +#ifndef NULL + #define NULL (void *) 0 /**< Null, if it's not defined. */ +#endif +#define MATH_PI 3.1415926f /**< Pi defination. */ + +#define AD5940_ADIID 0x4144 /**< ADIID is fixed to 0x4144 */ +#define AD5940_CHIPID 0x0000 /**< CHIPID is changing with silicon version */ +#define M355_ADIID 0x4144 /**< ADIID is fixed to 0x4144 */ +#define M355_CHIPID 0x0000 /**< CHIPID is changing with silicon version */ + +#define AD5940_SWRST 0xa158 /**< AD594x only. The value to perform software reset via reigster SWRSTCON */ +#define KEY_OSCCON 0xcb14 /**< key of register OSCCON. The key is auto locked after writing to any other register */ +#define KEY_CALDATLOCK 0xde87a5af /**< Calibration key. */ +#define KEY_LPMODEKEY 0xc59d6 /**< LP mode key */ + +#define PARA_CHECK(n) /** add parameter check, Add DEBUG switch */ + +/** + * @} MISC_Block_Const + * @} MISC_Block + * */ +/** + * @defgroup TypeDefinitions + * @{ +*/ + +typedef int32_t AD5940Err; /**< error number defination */ + +/** + * bool definition for ad5940lib. +*/ +typedef enum +{ + bFALSE = 0, bTRUE = !bFALSE, /**< True and False definition*/ +}BoolFlag; + +typedef struct +{ + /* ADC/DAC/TIA reference and buffer */ + BoolFlag HpBandgapEn; /**< Enable High power band-gap. Clear bit AFECON.HPREFDIS will enable Bandgap, while set this bit will disable bandgap */ + BoolFlag Hp1V8BuffEn; /**< High power 1.8V reference buffer enable */ + BoolFlag Hp1V1BuffEn; /**< High power 1.1V reference buffer enable */ + BoolFlag Lp1V8BuffEn; /**< Low power 1.8V reference buffer enable */ + BoolFlag Lp1V1BuffEn; /**< Low power 1.1V reference buffer enable */ + /* Low bandwidth loop reference and buffer */ + BoolFlag LpBandgapEn; /**< Enable Low power band-gap. */ + BoolFlag LpRefBufEn; /**< Enable the 2.5V low power reference buffer */ + BoolFlag LpRefBoostEn; /**< Boost buffer current */ + /* DAC Reference Buffer */ + BoolFlag HSDACRefEn; /**< Enable DAC reference buffer from HP Bandgap */ + /* Misc. control */ + BoolFlag Hp1V8ThemBuff; /**< Thermal Buffer for internal 1.8V reference to AIN3 pin */ + BoolFlag Hp1V8Ilimit; /**< Current limit for High power 1.8V reference buffer */ + BoolFlag Disc1V8Cap; /**< Discharge 1.8V capacitor. Short external 1.8V decouple capacitor to ground. Be careful when use this bit */ + BoolFlag Disc1V1Cap; /**< Discharge 1.1V capacitor. Short external 1.1V decouple capacitor to ground. Be careful when use this bit */ +}AFERefCfg_Type; + +/** + * @defgroup ADC_BlockType + * @{ +*/ + +/** + * Structure for ADC Basic settings include MUX and PGA. +*/ +typedef struct +{ + uint32_t ADCMuxP; /**< ADC Positive input channel selection. select from @ref ADCMUXP */ + uint32_t ADCMuxN; /**< ADC negative input channel selection. select from @ref ADCMUXN */ + uint32_t ADCPga; /**< ADC PGA settings, select from @ref ADCPGA */ +}ADCBaseCfg_Type; + +/** + * Structure for ADC filter settings. +*/ +typedef struct +{ + uint32_t ADCSinc3Osr; + uint32_t ADCSinc2Osr; + uint32_t ADCAvgNum; /**< Average filter is enabled when DFT source is @ref DFTSRC_AVG in function @ref AD5940_DFTCfgS. This average filter is only used by DFT engine. */ + uint32_t ADCRate; /**< ADC Core sample rate */ + BoolFlag BpNotch; /**< Bypass Notch filter in SINC2+Notch block, so only SINC2 is used. ADCFILTERCON.BIT4 */ + BoolFlag BpSinc3; /**< Bypass SINC3 Module */ + BoolFlag Sinc2NotchEnable; /**< Enable SINC2+Notch block */ +}ADCFilterCfg_Type; +/** @} */ + +/** + * DFT Configuration structure. +*/ +typedef struct +{ + uint32_t DftNum; /**< DFT number */ + uint32_t DftSrc; /**< DFT Source */ + BoolFlag HanWinEn; /**< Enable Hanning window */ +}DFTCfg_Type; + +/** + * ADC digital comparator +*/ +typedef struct +{ + uint16_t ADCMin; /**< The ADC code minimum limit value */ + uint16_t ADCMinHys; + uint16_t ADCMax; /**< The ADC code maximum limit value */ + uint16_t ADCMaxHys; +}ADCDigComp_Type; + +/** + * Statistic function +*/ +typedef struct +{ + uint32_t StatDev; /**< Statistic standard deviation configure */ + uint32_t StatSample; /**< Sample size */ + BoolFlag StatEnable; /**< Set true to enable statistic block */ +}StatCfg_Type; + +/** + * Switch matrix configure */ +typedef struct +{ + uint32_t Dswitch; /**< D switch settings. Select from @ref SWD_Const*/ + uint32_t Pswitch; /**< P switch settings. Select from @ref SWP_Const */ + uint32_t Nswitch; /**< N switch settings. Select from @ref SWN_Const */ + uint32_t Tswitch; /**< T switch settings. Select from @ref SWT_Const */ +}SWMatrixCfg_Type; + +/** HSTIA Configure */ +typedef struct +{ + uint32_t HstiaBias; /**< When select Vzero as bias, the related switch(VZERO2HSTIA) at LPDAC should be closed */ + uint32_t HstiaRtiaSel; /**< RTIA selection @ref HSTIARTIA_Const */ + uint32_t HstiaCtia; /**< Set internal CTIA value from 1 to 32 pF */ + BoolFlag DiodeClose; /**< Close the switch for internal back to back diode */ + uint32_t HstiaDeRtia; /**< DE0 node RTIA selection @ref HSTIADERTIA_Const */ + uint32_t HstiaDeRload; /**< DE0 node Rload selection @ref HSTIADERLOAD_Const */ + uint32_t HstiaDe1Rtia; /**< (ADuCM355 only, ignored on AD594x)DE1 node RTIA selection @ref HSTIADERTIA_Const */ + uint32_t HstiaDe1Rload; /**< (ADuCM355 only)DE1 node Rload selection @ref HSTIADERLOAD_Const */ +}HSTIACfg_Type; + +/** HSDAC Configure */ +typedef struct +{ + uint32_t ExcitBufGain; /**< Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + uint32_t HsDacGain; /**< Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; /**< Divider for DAC update. Available range is 7~255. */ +}HSDACCfg_Type; + +/** LPDAC Configure + * @note The LPDAC structure: + * @code + * Switch to select DAC output to Vzero and Vbias nodes. Vzero and Vbias can select from DAC6BIT and DAC12BIT output freely. + * LPDAC >DAC6BIT ---- Vzero LPDACVZERO_12BIT + * \--- Vbias LPDACVBIAS_6BIT + * >DAC12BIT---- Vzero LPDACVZERO_6BIT + * \--- Vbias LPDACVBIAS_12BIT + * Vzero/Vbias switch, controlled by @ref LPDACCfg_Type LpDacSW + * Vzero ------PIN + * \-----LPTIA LPDACSW_VZERO2LPTIA. LPTIA positive input + * \----HSTIA LPDACSW_VZERO2LPAMP. HSTIA positive input. Note, there is a MUX on HSTIA positive input pin to select the bias voltage between Vzero and 1.1V fixed internal reference. + * Vbias ------PIN LPDACSW_VBIAS2PIN + * \-----LPAMP LPDACSW_VBIAS2LPAMP positive input. The potential state amplifier input, or called LPAMP or PA(potential amplifier). + * @endcode +*/ +typedef struct +{ + uint32_t LpdacSel; /**< Selectr from LPDAC0 or LPDAC1. LPDAC1 is only available on ADuCM355. */ + uint32_t LpDacSrc; /**< LPDACSRC_MMR or LPDACSRC_WG. Note: HSDAC is always connects to WG. Disable HSDAC if there is need. */ + uint32_t LpDacVzeroMux; /**< Select which DAC output connects to Vzero. 6Bit or 12Bit DAC */ + uint32_t LpDacVbiasMux; /**< Select which DAC output connects to Vbias */ + uint32_t LpDacSW; /**< LPDAC switch set. Only available from Si2 */ + uint32_t LpDacRef; /**< Reference selection. Either internal 2.5V LPRef or AVDD. select from @ref LPDACREF_Const*/ + BoolFlag DataRst; /**< Keep Reset register REG_AFE_LPDACDAT0DATA */ + BoolFlag PowerEn; /**< Power up REG_AFE_LPDACDAT0 */ + uint16_t DacData12Bit; /**< Data for 12bit DAC */ + uint16_t DacData6Bit; /**< Data for 6bit DAC */ +}LPDACCfg_Type; + +/** + * Low power amplifiers(PA and TIA) +*/ +typedef struct +{ + uint32_t LpAmpSel; /**< Select from LPAMP0 and LPAMP1. LPAMP1 is only available on ADuCM355. */ + uint32_t LpTiaRf; /**< The one order RC filter resistor selection. Select from @ref LPTIARF_Const */ + uint32_t LpTiaRload; /**< The Rload resistor right in front of LPTIA negative input terminal. Select from @ref LPTIARLOAD_Const*/ + uint32_t LpTiaRtia; /**< LPTIA RTIA resistor selection. Set it to open(@ref LPTIARTIA_Const) when use external resistor. */ + uint32_t LpAmpPwrMod; /**< Power mode for LP PA and LPTIA */ + uint32_t LpTiaSW; /**< Set of switches, using macro LPTIASW() to close switch */ + BoolFlag LpPaPwrEn; /**< Enable(bTRUE) or disable(bFALSE) power of PA(potential amplifier) */ + BoolFlag LpTiaPwrEn; /**< Enable(bTRUE) or Disable(bFALSE) power of LPTIA amplifier */ +}LPAmpCfg_Type; + +/** + * @brief Trapezoid Generator parameters + * The definition of the Trapezoid waveform is shown below. Note the Delay and Slope are all in clock unit. + * @code + * + * DCLevel2 _________ + * / \ + * / \ + * DCLevel1 _____/ \______ + * | | | | | + * Delay1|S1|Delay2 |S2| Delay1 repeat... + * Where S1 is slope1 and S2 is slop2 + * @endcode + * The DAC update rate from Trapezoid generator is SystemClock/50. The default SystemClock + * is internal HFOSC 16MHz. So the update rate is 320kHz. + * The time parameter specifies in clock number. + * For example, if Delay1 is set to 10, S1 is set 20, the time for Delay1 period is 10/320kHz = 31.25us, + * and time for S1 period is 20/320kHz = 62.5us. +*/ +typedef struct +{ + uint32_t WGTrapzDCLevel1; /**< Trapezoid generator DC level1, this value is written directly to corresponding register */ + uint32_t WGTrapzDCLevel2; /**< DC level2, similar to DCLevel1 */ + uint32_t WGTrapzDelay1; /**< Trapezoid generator delay 1 */ + uint32_t WGTrapzDelay2; /**< Trapezoid generator delay 2 */ + uint32_t WGTrapzSlope1; /**< Trapezoid generator Slope 1 */ + uint32_t WGTrapzSlope2; /**< Trapezoid generator Slope 2 */ +}WGTrapzCfg_Type; + +/** + * Sin wave generator parameters +*/ +typedef struct +{ + uint32_t SinFreqWord; /**< Frequency word */ + uint32_t SinAmplitudeWord; /**< Amplitude word, range is 0 to 2047 */ + uint32_t SinOffsetWord; /**< Offset word, range is 0 to 4095 */ + uint32_t SinPhaseWord; /**< the start phase of sine wave. Use to tune start phase of signal. */ +}WGSinCfg_Type; + +/** + * Waveform generator configuration +*/ +typedef struct +{ + uint32_t WgType; /**< Select from WGTYPE_MMR, WGTYPE_SIN, WGTYPE_TRAPZ. HSDAC is always connected to WG. */ + BoolFlag GainCalEn; /**< Enable Gain calibration */ + BoolFlag OffsetCalEn; /**< Enable offset calibration */ + WGTrapzCfg_Type TrapzCfg; /**< Configure Trapezoid generator */ + WGSinCfg_Type SinCfg; /**< Configure Sine wave generator */ + uint32_t WgCode; /**< The 12bit data WG will move to DAC data register. */ +}WGCfg_Type; + +/** + * High speed loop configuration + * */ +typedef struct +{ + SWMatrixCfg_Type SWMatCfg; /**< switch matrix configuration. */ + HSDACCfg_Type HsDacCfg; /**< HSDAC configuration. */ + WGCfg_Type WgCfg; /**< Waveform generator configuration. */ + HSTIACfg_Type HsTiaCfg; /**< HSTIA configuration. */ +}HSLoopCfg_Type; + +/** + * Low power loop Configure + * */ +typedef struct +{ + LPDACCfg_Type LpDacCfg; /**< LPDAC configuration. @note Must select LPDAC0 or LPDAC1 in structure. */ + LPAmpCfg_Type LpAmpCfg; /**< LPAMP(LPTIA and PA) configuration. @note Must select LPAMP0 or LPAMP1 in structure. */ +}LPLoopCfg_Type; + +/** + * DSP Configure + * */ +typedef struct +{ + ADCBaseCfg_Type ADCBaseCfg; /**< ADC base configuration */ + ADCFilterCfg_Type ADCFilterCfg; /**< ADC filter configuration include SINC3/SINC2/Notch/Average(for DFT only) */ + ADCDigComp_Type ADCDigCompCfg; /**< ADC digital comparator */ + DFTCfg_Type DftCfg; /**< DFT configuration include data source, DFT number and Hanning Window */ + StatCfg_Type StatCfg; /**< Statistic block */ +}DSPCfg_Type; + +/** + * GPIO Configure + * */ +typedef struct +{ + uint32_t FuncSet; /**< AGP0 to AGP7 function sets */ + uint32_t OutputEnSet; /**< AGPIO_Pin0|AGPIO_Pin1|...|AGPIO_Pin7, Enable output of selected pins, disable other pins */ + uint32_t InputEnSet; /**< Enable input of selected pins, disable other pins */ + uint32_t PullEnSet; /**< Enable pull up or down on selected pin. disable other pins */ + uint32_t OutVal; /**< Value for GPIOOUT register */ +}AGPIOCfg_Type; + +/** + * FIFO configure +*/ +typedef struct +{ + BoolFlag FIFOEn; /**< Enable DATAFIFO. Disable FIFO will reset FIFO */ + uint32_t FIFOMode; /**< Stream mode or standard FIFO mode */ + uint32_t FIFOSize; /**< How to allocate the internal 6kB SRAM. Data FIFO and sequencer share all 6kB SRAM */ + uint32_t FIFOSrc; /**< Select which data source will be stored to FIFO */ + uint32_t FIFOThresh; /**< FIFO threshold value, 0 to 1023. Threshold can be used to generate interrupt so MCU can read back data before FIFO is full */ +}FIFOCfg_Type; + +/** + * Sequencer configure +*/ +typedef struct +{ + uint32_t SeqMemSize; /**< Sequencer memory size. SRAM is used by both FIFO and Sequencer. Make sure the total SRAM used is less than 6kB. */ + BoolFlag SeqEnable; /**< Enable sequencer. Only with valid trigger, sequencer can run */ + BoolFlag SeqBreakEn; /**< Do not use it */ + BoolFlag SeqIgnoreEn; /**< Do not use it */ + BoolFlag SeqCntCRCClr; /**< Clear sequencer count and CRC */ + uint32_t SeqWrTimer; /**< Set wait how much clocks after every commands executed */ +}SEQCfg_Type; + +/** + * Sequence info structure +*/ +typedef struct +{ + uint32_t SeqId; /**< The Sequence ID @ref SEQID_Const */ + uint32_t SeqRamAddr; /**< The start address that in AF5940 SRAM */ + uint32_t SeqLen; /**< Sequence length */ + BoolFlag WriteSRAM; /**< Write command to SRAM or not. */ + const uint32_t *pSeqCmd; /**< Pointer to the sequencer commands that stored in MCU */ +}SEQInfo_Type; + +typedef struct +{ + uint32_t PinSel; /**< Select which pin are going to be configured. @ref AGPIOPIN_Const */ + uint32_t SeqPinTrigMode; /**< The pin detect mode. Select from @ref SEQPINTRIGMODE_Const */ + BoolFlag bEnable; /**< Allow detected pin action to trigger corresponding sequence. */ +}SeqGpioTrig_Cfg; + +/** + * Wakeup Timer Configure + * */ +typedef struct +{ + uint32_t WuptEndSeq; /**< end sequence selection @ref WUPTENDSEQ_Const. Wupt will go back to slot A after this one is executed. */ + uint32_t WuptOrder[8]; /**< The 8 slots for WakeupTimer. Place @ref SEQID_Const to this array. */ + uint32_t SeqxSleepTime[4]; /**< Time before put AFE to sleep. 0 to 0x000f_ffff. We normally don't use this feature and it's disabled in @ref AD5940_Initialize */ + uint32_t SeqxWakeupTime[4]; /**< Time before Wakeup AFE. */ + BoolFlag WuptEn; /**< Timer enable. Once enabled, it starts to run. */ +}WUPTCfg_Type; + +/** + * Clock configure +*/ +typedef struct +{ + uint32_t SysClkSrc; /**< System clock source @ref SYSCLKSRC_Const */ + uint32_t ADCCLkSrc; /**< ADC clock source @ref ADCCLKSRC_Const */ + uint32_t SysClkDiv; /**< System clock divider. Use this to ensure System clock < 16MHz. */ + uint32_t ADCClkDiv; /**< ADC control clock divider. ADC core clock is @ADCCLkSrc, but control clock should be <16MHz. */ + BoolFlag HFOSCEn; /**< Enable internal 16MHz/32MHz HFOSC */ + BoolFlag HfOSC32MHzMode; /**< Enable internal HFOSC to output 32MHz */ + BoolFlag LFOSCEn; /**< Enable internal 32kHZ OSC */ + BoolFlag HFXTALEn; /**< Enable XTAL driver */ +}CLKCfg_Type; + +/** + * HSTIA internal RTIA calibration structure + * @note ADC filter settings and DFT should be configured properly based on signal frequency. +*/ +typedef struct +{ + float fFreq; /**< Calibration frequency */ + float fRcal; /**< Rcal resistor value in Ohm*/ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + + HSTIACfg_Type HsTiaCfg; /**< HSTIA configuration */ + uint32_t ADCSinc3Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCSinc2Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + DFTCfg_Type DftCfg; /**< DFT configuration. */ + uint32_t bPolarResult; /**< bTRUE-Polar coordinate:Return results in Magnitude and Phase. bFALSE-Cartesian coordinate: Return results in Real part and Imaginary Part */ +}HSRTIACal_Type; + +/** + * LPTIA internal RTIA calibration structure +*/ +typedef struct +{ + float fFreq; /**< Calibration frequency. Set it to 0.0 for DC calibration */ + float fRcal; /**< Rcal resistor value in Ohm*/ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + + uint32_t LpAmpSel; /**< Select from LPAMP0 and LPAMP1. LPAMP1 is only available on ADuCM355. */ + BoolFlag bWithCtia; /**< Connect external CTIA or not. */ + uint32_t LpTiaRtia; /**< LPTIA RTIA selection. */ + uint32_t LpAmpPwrMod; /**< Amplifiers power mode setting */ + uint32_t ADCSinc3Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCSinc2Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + DFTCfg_Type DftCfg; /**< DFT configuration */ + uint32_t bPolarResult; /**< bTRUE-Polar coordinate:Return results in Magnitude and Phase. bFALSE-Cartesian coordinate: Return results in Real part and Imaginary Part */ +}LPRTIACal_Type; + +/** + * HSDAC calibration structure. +*/ +typedef struct +{ + float fRcal; /**< Rcal resistor value in Ohm*/ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + + uint32_t AfePwrMode; /**< Calibrate DAC in High power mode */ + uint32_t ExcitBufGain; /**< Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + uint32_t HsDacGain; /**< Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + + uint32_t ADCSinc3Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCSinc2Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ +}HSDACCal_Type; + +/** + * LPDAC calibration structure. +*/ +typedef struct +{ + uint32_t LpdacSel; /**< Select from LPDAC0 and LPDAC1. LPDAC1 is ADuCM355 only. */ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + float ADCRefVolt; /**< ADC reference voltage. Default is 1.82V*/ + uint32_t ADCSinc3Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCSinc2Osr; /**< SINC2 OSR settings. */ + int32_t SettleTime10us; /**< Wait how much time after TIA is enabled? */ + int32_t TimeOut10us; /**< ADC converts signal need time. Specify the maximum time allowed. Timeout in 10us. negative number means wait no time. */ +}LPDACCal_Type; + +/** + * LPDAC parameters: LPDAC code to voltage transfer function. + * Voltage(mV) = kC2V_DACxB * Code + bC2V_DACxB; + * where x is 12 or 6 represent 12Bit DAC and 6Bit DAC. C2V means code to voltage. + * Code is the data register value for LPDAC. The equation gives real output voltage of LPDAC. + * Similarly, Code(LSB) = kV2C_DACxB * Voltage(mV) + bC2V_DAC12B; + * + * Apparently, kV2C_DACxB = 1/kC2V_DACxB; + * bC2V_DACxB = -bC2V_DACxB/kC2V_DACxB; +*/ +typedef struct +{ + /* Code to voltage equation parameters */ + float kC2V_DAC12B; /**< the k factor of code to voltage(in mV) transfer function */ + float bC2V_DAC12B; /**< the offset of code to voltage transfer function. It's the voltage in mV when code is zero. */ + float kC2V_DAC6B; /**< the k factor for LPDAC 6 bit output. */ + float bC2V_DAC6B; /**< the offset for LPDAC 6 bit output. */ + /* Code to voltage equation parameters */ + float kV2C_DAC12B; /**< the k factor for converting voltage to code for LPDAC 12bit output. */ + float bV2C_DAC12B; /**< the offset for converting voltage to code for LPDAC 12bit output. */ + float kV2C_DAC6B; /**< the k factor for converting voltage to code for LPDAC 6bit output. */ + float bV2C_DAC6B; /**< the offset for converting voltage to code for LPDAC 6bit output. */ +}LPDACPara_Type; + +/** + * LFOSC frequency measure structure +*/ +typedef struct +{ + uint32_t CalSeqAddr; /**< Sequence start address */ + float CalDuration; /**< Time can be used for calibration in unit of ms. Recommend to use tens of millisecond like 10ms */ + float SystemClkFreq; /**< System clock frequency. */ +}LFOSCMeasure_Type; + +/** + * ADC PGA calibration type +*/ +typedef struct +{ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + float VRef1p82; /**< The real voltage of 1.82 reference. Unit is volt. */ + float VRef1p11; /**< The real voltage of 1.1 reference. Unit is volt. */ + uint32_t ADCSinc3Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCSinc2Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCPga; /**< Which PGA gain we are going to calibrate? */ + uint32_t PGACalType; /**< Calibrate gain of offset or gain+offset? */ + int32_t TimeOut10us; /**< Timeout in 10us. -1 means no time-out*/ +}ADCPGACal_Type; + +/** + * LPTIA Offset calibration type +*/ +typedef struct +{ + uint32_t LpAmpSel; /**< Select from LPAMP0 and LPAMP1. LPAMP1 is only available on ADuCM355. */ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + uint32_t ADCSinc3Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCSinc2Osr; /**< SINC3OSR_5, SINC3OSR_4 or SINC3OSR_2 */ + uint32_t ADCPga; /**< PGA Gain selection */ + uint32_t DacData12Bit; /**< 12Bit DAC data */ + uint32_t DacData6Bit; /**< 6Bit DAC data */ + uint32_t LpDacVzeroMux; /**< Vzero is used as LPTIA bias voltage, select 12Bit/6Bit DAC */ + uint32_t LpAmpPwrMod; /**< LP amplifiers power mode, select from LPAMPPWR_NORM, LPAMPPWR_BOOSTn*/ + uint32_t LpTiaSW; /**< Switch configuration for LPTIA. Normally for SW(5) and SW(9).*/ + uint32_t LpTiaRtia; /**< LPTIA RTIA resistor selection. */ + int32_t SettleTime10us; /**< Wait how much time after TIA is enabled? */ + int32_t TimeOut10us; /**< ADC converts signal need time. Specify the maximum time allowed. Timeout in 10us. negative number means wait no time. */ +}LPTIAOffsetCal_Type; + +/** + * Structure for calculating how much system clocks needed for specified number of data +*/ +typedef struct +{ + uint32_t DataType; /**< The final data output selection. @ref DATATYPE_Const */ + uint32_t DataCount; /**< How many data you want. */ + uint32_t ADCSinc3Osr; /**< ADC SINC3 filter OSR setting */ + uint32_t ADCSinc2Osr; /**< ADC SINC2 filter OSR setting */ + uint32_t ADCAvgNum; /**< Average number for DFT engine. Only used when data type is DATATYPE_DFT and DftSrc is DFTSRC_AVG */ + uint32_t DftSrc; /**< The DFT source. Only used when data type is DATATYPE_DFT */ + uint8_t ADCRate; /**< ADCRate @ref ADCRATE_Const. Only used when data type is DATATYPE_NOTCH */ + BoolFlag BpNotch; /**< Bypass notch filter or not. Only used when data type is DATATYPE_DFT and DftSrc is DFTSRC_SINC2NOTCH */ + float RatioSys2AdcClk; /**< Ratio of system clock to ADC clock frequency */ +}ClksCalInfo_Type; + +/** + * Software controlled Sweep Function + * */ +typedef struct +{ + BoolFlag SweepEn; /**< Software can automatically sweep frequency from following parameters. Set value to 1 to enable it. */ + float SweepStart; /**< Sweep start frequency. Software will go back to the start frequency when it reaches SWEEP_STOP */ + float SweepStop; /**< Sweep end frequency. */ + uint32_t SweepPoints; /**< How many points from START to STOP frequency */ + BoolFlag SweepLog; /**< The step is linear or logarithmic. 0: Linear, 1: Logarithmic*/ + uint32_t SweepIndex; /**< Current position of sweep */ +}SoftSweepCfg_Type; + +/** + * Impedance result in Polar coordinate +*/ +typedef struct +{ + float Magnitude; /**< The magnitude in polar coordinate */ + float Phase; /**< The phase in polar coordinate */ +}fImpPol_Type; //Polar + +/** + * Impedance result in Cartesian coordinate +*/ +typedef struct +{ + float Real; /**< The real part in Cartesian coordinate */ + float Image; /**< The imaginary in Cartesian coordinate */ +}fImpCar_Type; //Cartesian + +/** + * int32_t type Impedance result in Cartesian coordinate +*/ +typedef struct +{ + int32_t Real; /**< The real part in Cartesian coordinate */ + int32_t Image; /**< The real imaginary in Cartesian coordinate */ +}iImpCar_Type; + +/** + * FreqParams_Type - Structure to store optimum filter settings +*/ +typedef struct +{ + BoolFlag HighPwrMode; + uint32_t DftNum; + uint32_t DftSrc; + uint32_t ADCSinc3Osr; + uint32_t ADCSinc2Osr; + uint32_t NumClks; +}FreqParams_Type; + +/** + * @} TypeDefinitions +*/ + +/** + * @defgroup Exported_Functions + * @{ +*/ +/* 1. Basic SPI functions */ +void AD5940_WriteReg(uint16_t RegAddr, uint32_t RegData); +uint32_t AD5940_ReadReg(uint16_t RegAddr); +void AD5940_FIFORd(uint32_t *pBuffer,uint32_t uiReadCount); + +/* 2. AD5940 Top Control functions */ +void AD5940_Initialize(void); /* Call this function firstly once AD5940 power on or come from soft reset */ +void AD5940_AFECtrlS(uint32_t AfeCtrlSet, BoolFlag State); +AD5940Err AD5940_LPModeCtrlS(uint32_t EnSet); +void AD5940_AFEPwrBW(uint32_t AfePwr, uint32_t AfeBw); /* AFE power mode and system bandwidth control */ +void AD5940_REFCfgS(AFERefCfg_Type *pBufCfg); + +/* 3. High_Speed_Loop Functions */ +void AD5940_HSLoopCfgS(HSLoopCfg_Type *pHsLoopCfg); +void AD5940_SWMatrixCfgS(SWMatrixCfg_Type *pSwMatrix); +void AD5940_HSDacCfgS(HSDACCfg_Type *pHsDacCfg); +AD5940Err AD5940_HSTIACfgS(HSTIACfg_Type *pHsTiaCfg); +void AD5940_HSRTIACfgS(uint32_t HSTIARtia); + +/* 4. Low_Power_Loop Functions*/ +void AD5940_LPLoopCfgS(LPLoopCfg_Type *pLpLoopCfg); +void AD5940_LPDACCfgS(LPDACCfg_Type *pLpDacCfg); +//void AD5940_LPDACWriteS(uint16_t Data12Bit, uint8_t Data6Bit); +void AD5940_LPDAC0WriteS(uint16_t Data12Bit, uint8_t Data6Bit); +void AD5940_LPDAC1WriteS(uint16_t Data12Bit, uint8_t Data6Bit); +void AD5940_LPAMPCfgS(LPAmpCfg_Type *pLpAmpCfg); + +/* 5. DSP_Block_Functions */ +void AD5940_DSPCfgS(DSPCfg_Type *pDSPCfg); +uint32_t AD5940_ReadAfeResult(uint32_t AfeResultSel); +/* 5.1 ADC Block */ +void AD5940_ADCBaseCfgS(ADCBaseCfg_Type *pADCInit); +void AD5940_ADCFilterCfgS(ADCFilterCfg_Type *pFiltCfg); +void AD5940_ADCPowerCtrlS(BoolFlag State); +void AD5940_ADCConvtCtrlS(BoolFlag State); +void AD5940_ADCMuxCfgS(uint32_t ADCMuxP, uint32_t ADCMuxN); +void AD5940_ADCDigCompCfgS(ADCDigComp_Type *pCompCfg); +void AD5940_StatisticCfgS(StatCfg_Type *pStatCfg); +void AD5940_ADCRepeatCfgS(uint32_t Number); +void AD5940_DFTCfgS(DFTCfg_Type *pDftCfg); +/* 5.2 Waveform Generator Block */ +void AD5940_WGCfgS(WGCfg_Type *pWGInit); +AD5940Err AD5940_WGDACCodeS(uint32_t code); /* Directly write DAC Code */ +void AD5940_WGFreqCtrlS(float SinFreqHz, float WGClock); +uint32_t AD5940_WGFreqWordCal(float SinFreqHz, float WGClock); +//uint32_t AD5940_WGAmpWordCal(float Amp, BoolFlag DacGain, BoolFlag ExcitGain); + +/* 6. Sequencer_FIFO */ +void AD5940_FIFOCfg(FIFOCfg_Type *pFifoCfg); +AD5940Err AD5940_FIFOGetCfg(FIFOCfg_Type *pFifoCfg); /* Read back current configuration */ +void AD5940_FIFOCtrlS(uint32_t FifoSrc, BoolFlag FifoEn); /* Configure FIFO data source. And disable/enable it.*/ +void AD5940_FIFOThrshSet(uint32_t FIFOThresh); +uint32_t AD5940_FIFOGetCnt(void); /* Get current FIFO count */ +void AD5940_SEQCfg(SEQCfg_Type *pSeqCfg); +AD5940Err AD5940_SEQGetCfg(SEQCfg_Type *pSeqCfg); /* Read back current configuration */ +void AD5940_SEQCtrlS(BoolFlag SeqEn); +void AD5940_SEQHaltS(void); +void AD5940_SEQMmrTrig(uint32_t SeqId); /* Manually trigger sequence */ +void AD5940_SEQCmdWrite(uint32_t StartAddr, const uint32_t *pCommand, uint32_t CmdCnt); +void AD5940_SEQInfoCfg(SEQInfo_Type *pSeq); +AD5940Err AD5940_SEQInfoGet(uint32_t SeqId, SEQInfo_Type *pSeqInfo); +void AD5940_SEQGpioCtrlS(uint32_t GpioSet); /* Sequencer can control GPIO0~7 if the GPIO function is set to SYNC */ +uint32_t AD5940_SEQTimeOutRd(void); /* Read back current sequence time out value */ +AD5940Err AD5940_SEQGpioTrigCfg(SeqGpioTrig_Cfg *pSeqGpioTrigCfg); +void AD5940_WUPTCfg(WUPTCfg_Type *pWuptCfg); +void AD5940_WUPTCtrl(BoolFlag Enable); /* Enable or disable Wakeup timer */ +AD5940Err AD5940_WUPTTime(uint32_t SeqId, uint32_t SleepTime, uint32_t WakeupTime); + +/* 7. MISC_Block */ +/* 7.1 Clock system */ +void AD5940_CLKCfg(CLKCfg_Type *pClkCfg); +void AD5940_HFOSC32MHzCtrl(BoolFlag Mode32MHz); +void AD5940_HPModeEn(BoolFlag Enable); /* Switch system clocks to high power mode for EIS >80kHz)*/ +/* 7.2 AFE Interrupt */ +void AD5940_INTCCfg(uint32_t AfeIntcSel, uint32_t AFEIntSrc, BoolFlag State); +uint32_t AD5940_INTCGetCfg(uint32_t AfeIntcSel); +void AD5940_INTCClrFlag(uint32_t AfeIntSrcSel); +BoolFlag AD5940_INTCTestFlag(uint32_t AfeIntcSel, uint32_t AfeIntSrcSel); /* Check if selected interrupt happened */ +uint32_t AD5940_INTCGetFlag(uint32_t AfeIntcSel); /* Get current INTC interrupt flag */ +/* 7.3 GPIO */ +void AD5940_AGPIOCfg(AGPIOCfg_Type *pAgpioCfg); +void AD5940_AGPIOFuncCfg(uint32_t uiCfgSet); +void AD5940_AGPIOOen(uint32_t uiPinSet); +void AD5940_AGPIOIen(uint32_t uiPinSet); +uint32_t AD5940_AGPIOIn(void); +void AD5940_AGPIOPen(uint32_t uiPinSet); +void AD5940_AGPIOSet(uint32_t uiPinSet); +void AD5940_AGPIOClr(uint32_t uiPinSet); +void AD5940_AGPIOToggle(uint32_t uiPinSet); + +/* 7.4 LPMODE */ +AD5940Err AD5940_LPModeEnS(BoolFlag LPModeEn); /* Enable LP mode or disable it. */ +void AD5940_LPModeClkS(uint32_t LPModeClk); +void AD5940_ADCRepeatCfg(uint32_t Number); +/* 7.5 Power */ +void AD5940_SleepKeyCtrlS(uint32_t SlpKey); /* enter the correct key to allow AFE to enter sleep mode */ +void AD5940_EnterSleepS(void); /* Put AFE to hibernate/sleep mode and keep LP loop as the default settings. */ +void AD5940_ShutDownS(void); /* Unlock the key, turn off LP loop and enter sleep/hibernate mode */ +uint32_t AD5940_WakeUp(int32_t TryCount); /* Try to wakeup AFE by read register */ +uint32_t AD5940_GetADIID(void); /* Read ADIID */ +uint32_t AD5940_GetChipID(void); /* Read Chip ID */ +AD5940Err AD5940_SoftRst(void); +void AD5940_HWReset(void); /* Do hardware reset to AD5940 using RESET pin */ +/* Calibration functions */ +/* 8. Calibration */ +AD5940Err AD5940_ADCPGACal(ADCPGACal_Type *ADCPGACal); +AD5940Err AD5940_LPDACCal(LPDACCal_Type *pCalCfg, LPDACPara_Type *pResult); +AD5940Err AD5940_LPTIAOffsetCal(LPTIAOffsetCal_Type *pLPTIAOffsetCal); +AD5940Err AD5940_HSRtiaCal(HSRTIACal_Type *pCalCfg, void *pResult); +AD5940Err AD5940_HSDACCal(HSDACCal_Type *pCalCfg); +AD5940Err AD5940_LPRtiaCal(LPRTIACal_Type *pCalCfg, void *pResult); +AD5940Err AD5940_LFOSCMeasure(LFOSCMeasure_Type *pCfg, float *pFreq); +//void AD5940_LFOSCTrim(uint32_t TrimValue); /* TrimValue: 0 to 15 */ +//void AD5940_HFOSC16MHzTrim(uint32_t TrimValue); +//void AD5940_HFOSC32MHzTrim(uint32_t TrimValue); + +/* 9. Pure software functions. Functions with no register access. These functions are helpers */ + /* Sequence Generator */ +void AD5940_SEQGenInit(uint32_t *pBuffer, uint32_t BufferSize);/* Initialize sequence generator workspace */ +void AD5940_SEQGenCtrl(BoolFlag bFlag); /* Enable or disable sequence generator */ +void AD5940_SEQGenInsert(uint32_t CmdWord); /* Manually insert a sequence command */ +AD5940Err AD5940_SEQGenFetchSeq(const uint32_t **ppSeqCmd, uint32_t *pSeqCount); /* Fetch generated sequence and start a new sequence */ +void AD5940_ClksCalculate(ClksCalInfo_Type *pFilterInfo, uint32_t *pClocks); +uint32_t AD5940_SEQCycleTime(void); +void AD5940_SweepNext(SoftSweepCfg_Type *pSweepCfg, float *pNextFreq); +void AD5940_StructInit(void *pStruct, uint32_t StructSize); +float AD5940_ADCCode2Volt(uint32_t code, uint32_t ADCPga, float VRef1p82); /* Calculate ADC code to voltage */ +BoolFlag AD5940_Notch50HzAvailable(ADCFilterCfg_Type *pFilterInfo, uint8_t *dl); +BoolFlag AD5940_Notch60HzAvailable(ADCFilterCfg_Type *pFilterInfo, uint8_t *dl); +fImpCar_Type AD5940_ComplexDivFloat(fImpCar_Type *a, fImpCar_Type *b); +fImpCar_Type AD5940_ComplexMulFloat(fImpCar_Type *a, fImpCar_Type *b); +fImpCar_Type AD5940_ComplexAddFloat(fImpCar_Type *a, fImpCar_Type *b); +fImpCar_Type AD5940_ComplexSubFloat(fImpCar_Type *a, fImpCar_Type *b); + +fImpCar_Type AD5940_ComplexDivInt(iImpCar_Type *a, iImpCar_Type *b); +fImpCar_Type AD5940_ComplexMulInt(iImpCar_Type *a, iImpCar_Type *b); +float AD5940_ComplexMag(fImpCar_Type *a); +float AD5940_ComplexPhase(fImpCar_Type *a); +FreqParams_Type AD5940_GetFreqParameters(float freq); +/** + * @} Exported_Functions +*/ + +/** + * @defgroup Library_Interface + * The functions user should provide for specific MCU platform + * @{ +*/ +void AD5940_CsClr(void); +void AD5940_CsSet(void); +void AD5940_RstClr(void); +void AD5940_RstSet(void); +void AD5940_Delay10us(uint32_t time); +/* (Not used for now.)AD5940 has 8 GPIOs, some of them are connected to MCU. MCU can set or read the status of these pins. */ +void AD5940_MCUGpioWrite(uint32_t data); /* */ +uint32_t AD5940_MCUGpioRead(uint32_t); +void AD5940_MCUGpioCtrl(uint32_t, BoolFlag); +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length); +/* Below functions are frequently used in example code but not necessary for library */ +uint32_t AD5940_GetMCUIntFlag(void); +uint32_t AD5940_ClrMCUIntFlag(void); +uint32_t AD5940_MCUResourceInit(void *pCfg); +/** + * @} Library_Interface +*/ + + +/** + * @} AD5940_Library + */ + +#endif diff --git a/examples/AD5940_BIA/AD5940Main.c b/examples/AD5940_BIA/AD5940Main.c new file mode 100644 index 0000000..bda0cda --- /dev/null +++ b/examples/AD5940_BIA/AD5940Main.c @@ -0,0 +1,158 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Used to control specific application and process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** + * @addtogroup AD5940_System_Examples + * @{ + * @defgroup BioElec_Example + * @{ + */ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "BodyImpedance.h" + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +/* It's your choice here how to do with the data. Here is just an example to print them to UART */ +int32_t BIAShowResult(uint32_t *pData, uint32_t DataCount) +{ + float freq; + + fImpPol_Type *pImp = (fImpPol_Type*)pData; + AppBIACtrl(BIACTRL_GETFREQ, &freq); + + printf("Freq:%.2f ", freq); + /*Process data*/ + for(int i=0;iSeqStartAddr = 0; + pBIACfg->MaxSeqLen = 512; /** @todo add checker in function */ + + pBIACfg->RcalVal = 10000.0; + pBIACfg->DftNum = DFTNUM_8192; + pBIACfg->NumOfData = -1; /* Never stop until you stop it manually by AppBIACtrl() function */ + pBIACfg->BiaODR = 20; /* ODR(Sample Rate) 20Hz */ + pBIACfg->FifoThresh = 4; /* 4 */ + pBIACfg->ADCSinc3Osr = ADCSINC3OSR_2; +} + +void AD5940_Main(void) +{ + static uint32_t IntCount; + static uint32_t count; + uint32_t temp; + + AD5940PlatformCfg(); + + AD5940BIAStructInit(); /* Configure your parameters in this function */ + + AppBIAInit(AppBuff, APPBUFF_SIZE); /* Initialize BIA application. Provide a buffer, which is used to store sequencer commands */ + AppBIACtrl(BIACTRL_START, 0); /* Control BIA measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + IntCount++; + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppBIAISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + BIAShowResult(AppBuff, temp); /* Show the results to UART */ + + if(IntCount == 240) + { + IntCount = 0; + //AppBIACtrl(BIACTRL_SHUTDOWN, 0); + } + } + count++; + if(count > 1000000) + { + count = 0; + //AppBIAInit(0, 0); /* Re-initialize BIA application. Because sequences are ready, no need to provide a buffer, which is used to store sequencer commands */ + //AppBIACtrl(BIACTRL_START, 0); /* Control BIA measurement to start. Second parameter has no meaning with this command. */ + } + } +} + +/** + * @} + * @} + * */ + diff --git a/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.ewd b/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + 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+ + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + + AD5940Lib + + $PROJ_DIR$\..\..\ad5940lib\ad5940.c + + + $PROJ_DIR$\ADICUP3029Port.c + + + + application + + $PROJ_DIR$\..\AD5940Main.c + + + $PROJ_DIR$\..\BodyImpedance.c + + + $PROJ_DIR$\main.c + + + + CMSIS-Pack + CMSISPack.Component + + $PROJ_DIR$\RTE\RTE_Components.h + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.uvoptx b/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.uvoptx new file mode 100644 index 0000000..6d68fc9 --- /dev/null +++ b/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BodyImpedance.c + BodyImpedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.uvprojx b/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.uvprojx new file mode 100644 index 0000000..d3a0fe5 --- /dev/null +++ b/examples/AD5940_BIA/ADICUP3029/AD5940_BIA.uvprojx @@ -0,0 +1,505 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::..\..\Program Files (x86)\ARM_Compiler_5.06u7 + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.1 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BodyImpedance.c + 1 + ..\BodyImpedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_BIA/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_BIA/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_BIA/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_BIA/ADICUP3029/main.c b/examples/AD5940_BIA/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_BIA/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_BIA/BodyImpedance.c b/examples/AD5940_BIA/BodyImpedance.c new file mode 100644 index 0000000..ed06803 --- /dev/null +++ b/examples/AD5940_BIA/BodyImpedance.c @@ -0,0 +1,609 @@ +/*! + ***************************************************************************** + @file: BodyComposition.c + @author: Neo Xu + @brief: BIA measurement sequences. + ----------------------------------------------------------------------------- +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "BodyImpedance.h" + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppBIACfg_Type AppBIACfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ReDoRtiaCal = bFALSE, + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .BiaODR = 20.0, /* 20.0 Hz*/ + .NumOfData = -1, + .RcalVal = 10000.0, /* 10kOhm */ + + .PwrMod = AFEPWR_LP, + .HstiaRtiaSel = HSTIARTIA_1K, + .CtiaSel = 16, + .ExcitBufGain = EXCITBUFGAIN_2, + .HsDacGain = HSDACGAIN_1, + .HsDacUpdateRate = 7, + .DacVoltPP = 800.0, + + .SinFreq = 50000.0, /* 50kHz */ + + .ADCPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .DftNum = DFTNUM_8192, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .SweepCfg.SweepEn = bFALSE, + .SweepCfg.SweepStart = 10000, + .SweepCfg.SweepStop = 150000.0, + .SweepCfg.SweepPoints = 100, + .SweepCfg.SweepLog = bTRUE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 4, + .BIAInited = bFALSE, + .StopRequired = bFALSE, + .MeasSeqCycleCount = 0, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppBIAGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppBIACfg_Type**)pCfg = &AppBIACfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +AD5940Err AppBIACtrl(int32_t BcmCtrl, void *pPara) +{ + switch (BcmCtrl) + { + case BIACTRL_START: + { + WUPTCfg_Type wupt_cfg; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppBIACfg.BIAInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = (uint32_t)(AppBIACfg.WuptClkFreq/AppBIACfg.BiaODR)-2-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = 1; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + AD5940_WUPTCfg(&wupt_cfg); + + AppBIACfg.FifoDataCount = 0; /* restart */ + break; + } + case BIACTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case BIACTRL_STOPSYNC: + { + AppBIACfg.StopRequired = bTRUE; + break; + } + case BIACTRL_GETFREQ: + if(pPara) + { + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppBIACfg.FreqofData; + else + *(float*)pPara = AppBIACfg.SinFreq; + } + break; + case BIACTRL_SHUTDOWN: + { + AppBIACtrl(BIACTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by sleep operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppBIASeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type hs_loop; + LPLoopCfg_Type lp_loop; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + //AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + hs_loop.HsDacCfg.ExcitBufGain = AppBIACfg.ExcitBufGain; + hs_loop.HsDacCfg.HsDacGain = AppBIACfg.HsDacGain; + hs_loop.HsDacCfg.HsDacUpdateRate = AppBIACfg.HsDacUpdateRate; + + hs_loop.HsTiaCfg.DiodeClose = bFALSE; + hs_loop.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hs_loop.HsTiaCfg.HstiaCtia = AppBIACfg.CtiaSel; /* 31pF + 2pF */ + hs_loop.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaRtiaSel = AppBIACfg.HstiaRtiaSel; + + hs_loop.SWMatCfg.Dswitch = SWD_OPEN; + hs_loop.SWMatCfg.Pswitch = SWP_PL|SWP_PL2; + hs_loop.SWMatCfg.Nswitch = SWN_NL|SWN_NL2; + hs_loop.SWMatCfg.Tswitch = SWT_TRTIA; + + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bFALSE; + hs_loop.WgCfg.OffsetCalEn = bFALSE; + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + AppBIACfg.SweepCfg.SweepIndex = 0; + AppBIACfg.FreqofData = AppBIACfg.SweepCfg.SweepStart; + AppBIACfg.SweepCurrFreq = AppBIACfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppBIACfg.SweepCfg, &AppBIACfg.SweepNextFreq); + sin_freq = AppBIACfg.SweepCurrFreq; + } + else + { + sin_freq = AppBIACfg.SinFreq; + AppBIACfg.FreqofData = sin_freq; + } + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppBIACfg.SysClkFreq); + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppBIACfg.DacVoltPP/800.0f*2047 + 0.5f); + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&hs_loop); + + lp_loop.LpDacCfg.LpdacSel = LPDAC0; + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp_loop.LpDacCfg.DataRst = bFALSE; + lp_loop.LpDacCfg.PowerEn = bTRUE; + lp_loop.LpDacCfg.DacData12Bit = (uint32_t)((1100-200)/2200.0*4095); + lp_loop.LpDacCfg.DacData6Bit = 31; + + lp_loop.LpAmpCfg.LpAmpSel = LPAMP0; + lp_loop.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp_loop.LpAmpCfg.LpPaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaRf = LPTIARF_20K; + lp_loop.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lp_loop.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(6)|LPTIASW(7)|LPTIASW(8)|LPTIASW(9)|LPTIASW(12)|LPTIASW(13); /** @todo Optimization needed for new silicon */ + AD5940_LPLoopCfgS(&lp_loop); + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppBIACfg.ADCPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppBIACfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppBIACfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppBIACfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppBIACfg.InitSeqInfo.SeqId = SEQID_1; + AppBIACfg.InitSeqInfo.SeqRamAddr = AppBIACfg.SeqStartAddr; + AppBIACfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppBIACfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIACfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIASeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppBIACfg.DftSrc; + clks_cal.DataCount = 1L<<(AppBIACfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBIACfg.SysClkFreq/AppBIACfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* @todo wait 250us?? */ + sw_cfg.Dswitch = SWD_CE0; + sw_cfg.Pswitch = SWP_CE0; + sw_cfg.Nswitch = SWN_AIN1; + sw_cfg.Tswitch = SWT_AIN1|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_ADCMuxCfgS(ADCMUXP_HSTIA_P, ADCMUXN_HSTIA_N); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + + AD5940_ADCMuxCfgS(ADCMUXP_AIN3, ADCMUXN_AIN2); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); //delay for signal settling DFT_WAIT + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + + sw_cfg.Dswitch = SWD_OPEN; + sw_cfg.Pswitch = SWP_PL|SWP_PL2; + sw_cfg.Nswitch = SWN_NL|SWN_NL2; + sw_cfg.Tswitch = SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); /* Float switches */ + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + AppBIACfg.MeasSeqCycleCount = AD5940_SEQCycleTime(); + AppBIACfg.MaxODR = 1/(((AppBIACfg.MeasSeqCycleCount + 10) / 16.0)* 1E-6) ; + if(AppBIACfg.BiaODR > AppBIACfg.MaxODR) + { + /* We have requested a sampling rate that cannot be achieved with the time it + takes to acquire a sample. + */ + AppBIACfg.BiaODR = AppBIACfg.MaxODR; + } + + if(error == AD5940ERR_OK) + { + AppBIACfg.MeasureSeqInfo.SeqId = SEQID_0; + AppBIACfg.MeasureSeqInfo.SeqRamAddr = AppBIACfg.InitSeqInfo.SeqRamAddr + AppBIACfg.InitSeqInfo.SeqLen ; + AppBIACfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppBIACfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIACfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIARtiaCal(void) +{ + HSRTIACal_Type hsrtia_cal; + + hsrtia_cal.AdcClkFreq = AppBIACfg.AdcClkFreq; + hsrtia_cal.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + hsrtia_cal.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + hsrtia_cal.bPolarResult = bTRUE; /* We need magnitude and phase here */ + hsrtia_cal.DftCfg.DftNum = AppBIACfg.DftNum; + hsrtia_cal.DftCfg.DftSrc = AppBIACfg.DftSrc; + hsrtia_cal.DftCfg.HanWinEn = AppBIACfg.HanWinEn; + hsrtia_cal.fRcal= AppBIACfg.RcalVal; + hsrtia_cal.HsTiaCfg.DiodeClose = bFALSE; + hsrtia_cal.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hsrtia_cal.HsTiaCfg.HstiaCtia = AppBIACfg.CtiaSel; + hsrtia_cal.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hsrtia_cal.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_TODE; + hsrtia_cal.HsTiaCfg.HstiaRtiaSel = AppBIACfg.HstiaRtiaSel; + hsrtia_cal.SysClkFreq = AppBIACfg.SysClkFreq; + hsrtia_cal.fFreq = AppBIACfg.SweepCfg.SweepStart; + + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + uint32_t i; + AppBIACfg.SweepCfg.SweepIndex = 0; /* Reset index */ + for(i=0;i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Do RTIA calibration */ + + if((AppBIACfg.ReDoRtiaCal == bTRUE) || \ + AppBIACfg.BIAInited == bFALSE) /* Do calibration on the first initializaion */ + { + AppBIARtiaCal(); + AppBIACfg.ReDoRtiaCal = bFALSE; + } + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppBIACfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppBIACfg.BIAInited == bFALSE)||\ + (AppBIACfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppBIASeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppBIASeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppBIACfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppBIACfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIACfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppBIACfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppBIACfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIACfg.MeasureSeqInfo); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppBIACfg.PwrMod, AFEBW_250KHZ); + AD5940_WriteReg(REG_AFE_SWMUX, 1<<3); + AppBIACfg.BIAInited = bTRUE; /* BIA application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppBIARegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppBIACfg.NumOfData > 0) + { + AppBIACfg.FifoDataCount += *pDataCount/4; + if(AppBIACfg.FifoDataCount >= AppBIACfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppBIACfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppBIACfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AD5940_WGFreqCtrlS(AppBIACfg.SweepNextFreq, AppBIACfg.SysClkFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppBIADataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/4; + + fImpPol_Type * const pOut = (fImpPol_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/4)*4;/* We expect RCAL data together with Rz data. One DFT result has two data in FIFO, real part and imaginary part. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal*pDftVolt->Real+(float)pDftVolt->Image*pDftVolt->Image); + VoltPhase = atan2(-pDftVolt->Image,pDftVolt->Real); + CurrMag = sqrt((float)pDftCurr->Real*pDftCurr->Real+(float)pDftCurr->Image*pDftCurr->Image); + CurrPhase = atan2(-pDftCurr->Image,pDftCurr->Real); + + VoltMag = VoltMag/CurrMag*AppBIACfg.RtiaCurrValue[0]; + VoltPhase = VoltPhase - CurrPhase + AppBIACfg.RtiaCurrValue[1]; + + pOut[i].Magnitude = VoltMag; + pOut[i].Phase = VoltPhase; + } + *pDataCount = ImpResCount; + /* Calculate next frequency point */ + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + AppBIACfg.FreqofData = AppBIACfg.SweepCurrFreq; + AppBIACfg.SweepCurrFreq = AppBIACfg.SweepNextFreq; + AppBIACfg.RtiaCurrValue[0] = AppBIACfg.RtiaCalTable[AppBIACfg.SweepCfg.SweepIndex][0]; + AppBIACfg.RtiaCurrValue[1] = AppBIACfg.RtiaCalTable[AppBIACfg.SweepCfg.SweepIndex][1]; + AD5940_SweepNext(&AppBIACfg.SweepCfg, &AppBIACfg.SweepNextFreq); + } + return AD5940ERR_OK; +} + +/** +*/ +AD5940Err AppBIAISR(void *pBuff, uint32_t *pCount) +{ + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + if(AppBIACfg.BIAInited == bFALSE) + return AD5940ERR_APPERROR; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Don't enter hibernate */ + *pCount = 0; + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppBIARegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter hibernate mode */ + /* Process data */ + AppBIADataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + +/** + * @} + */ diff --git a/examples/AD5940_BIA/BodyImpedance.h b/examples/AD5940_BIA/BodyImpedance.h new file mode 100644 index 0000000..5a93e51 --- /dev/null +++ b/examples/AD5940_BIA/BodyImpedance.h @@ -0,0 +1,94 @@ +/*! + @file: ImpSeqs.h + @author: $Author: nxu2 $ + @brief: 4-wire BIA measurement header file. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#ifndef _BODYCOMPOSITION_H_ +#define _BODYCOMPOSITION_H_ +#include "ad5940.h" +#include "stdio.h" +#include "string.h" +#include "math.h" + +#define MAXSWEEP_POINTS 100 /* Need to know how much buffer is needed to save RTIA calibration result */ + +/* + Note: this example will use SEQID_0 as measurement sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration. +*/ + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + //BoolFlag bBioElecBoard; /* The code is same for BioElec board and AD5941Sens1 board. No changes are needed */ + BoolFlag ReDoRtiaCal; /* Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /* The real frequency of system clock */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ + float BiaODR; /* in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically. DFT number and sample frequency decides the maxim ODR. */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float SinFreq; /* Frequency of excitation signal */ + float RcalVal; /* Rcal value in Ohm */ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + float DacVoltPP; /* Final excitation voltage is DAC_VOLTpp*DAC_PGA*EXCIT_GAIN, DAC_PGA= 1 or 0.2, EXCIT_GAIN=2 or 0.25. DAC output voltage in mV peak to peak. Maximum value is 800mVpp. Peak to peak voltage */ + uint32_t ExcitBufGain; /* Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; /* DAC update rate is SystemCLoock/Divider. The available value is 7 to 255. Set to 7 for better performance */ + uint32_t ADCPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /* SINC3 OSR selection. ADCSINC3OSR_2, ADCSINC3OSR_4 */ + uint8_t ADCSinc2Osr; /* SINC2 OSR selection. ADCSINC2OSR_22...ADCSINC2OSR_1333 */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t CtiaSel; /* Select CTIA in pF unit from 0 to 31pF */ + + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + float RtiaCurrValue[2]; /* Calibrated Rtia value of current frequency */ + float RtiaCalTable[MAXSWEEP_POINTS][2]; /* Calibrated Rtia Value table */ + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag BIAInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ + uint32_t MeasSeqCycleCount; /* How long the measurement sequence will take */ + float MaxODR; /* Max ODR for sampling in this config */ +/* End */ +}AppBIACfg_Type; + +#define BIACTRL_START 0 +#define BIACTRL_STOPNOW 1 +#define BIACTRL_STOPSYNC 2 +#define BIACTRL_GETFREQ 3 /* Get Current frequency of returned data from ISR */ +#define BIACTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + +AD5940Err AppBIAGetCfg(void *pCfg); +AD5940Err AppBIAInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppBIAISR(void *pBuff, uint32_t *pCount); +AD5940Err AppBIACtrl(int32_t BcmCtrl, void *pPara); + +#endif diff --git a/examples/AD5940_BIA/NUCLEO-F411/AD5940_BIA.uvoptx b/examples/AD5940_BIA/NUCLEO-F411/AD5940_BIA.uvoptx new file mode 100644 index 0000000..c722152 --- /dev/null +++ b/examples/AD5940_BIA/NUCLEO-F411/AD5940_BIA.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BodyImpedance.c + BodyImpedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BIA/NUCLEO-F411/AD5940_BIA.uvprojx b/examples/AD5940_BIA/NUCLEO-F411/AD5940_BIA.uvprojx new file mode 100644 index 0000000..ced63fe --- /dev/null +++ b/examples/AD5940_BIA/NUCLEO-F411/AD5940_BIA.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X, ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BodyImpedance.c + 1 + ..\BodyImpedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_BIA/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_BIA/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_BIA/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_BIA/NUCLEO-F411/main.c b/examples/AD5940_BIA/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_BIA/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_BIA_HiZ_Electrodes/AD5940Main.c b/examples/AD5940_BIA_HiZ_Electrodes/AD5940Main.c new file mode 100644 index 0000000..8923287 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/AD5940Main.c @@ -0,0 +1,193 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: ADI + @brief: Used to control specific application and process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** + * @addtogroup AD5940_System_Examples + * @{ + * @defgroup BIA_Pro_Example + * @{ + */ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "BodyImpedance-HiZ_Electrodes.h" + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +#define REAL_IMAG 0 +#define MAG_PAHSE 1 + +#define REAL_IMAG_OR_MAG_PAHSE MAG_PAHSE /*SKR you can chose what you want to print*/ + +/* It's your choice here how to do with the data. Here is just an example to print them to UART */ +int32_t BIAShowResult(uint32_t *pData, uint32_t DataCount) +{ + float freq; + + fImpCar_Type *pImp = (fImpCar_Type*)pData; + AppBIACtrl(BIACTRL_GETFREQ, &freq); + + printf("Freq:%.2f, ", freq); + /*Process data*/ + +#if REAL_IMAG_OR_MAG_PAHSE == REAL_IMAG + for(int i=0;iAdcClkFreq = 32000000.0; /*DO NOT MODIFY*/ /*High Power Mode and external Xtal.*/ + + pBIACfg->SeqStartAddr = 0; + pBIACfg->MaxSeqLen = 512; /** @todo add checker in function */ + + pBIACfg->RcalVal = 10000.0; + pBIACfg->DftNum = DFTNUM_16384; + pBIACfg->NumOfData = -1; /* Never stop until you stop it mannually by AppBIACtrl() function */ + pBIACfg->BiaODR = 2.5; /* ODR(Sample Rate) 20Hz */ + pBIACfg->FifoThresh = 12; /*SKR: this parameter needs to be changed... but it should not be visible*/ /* 4 */ + pBIACfg->ADCSinc3Osr = ADCSINC3OSR_2; + + pBIACfg->SinFreq = 50000.0; /*50kHz */ + pBIACfg->SweepCfg.SweepEn = bFALSE; + pBIACfg->SweepCfg.SweepStart = 10000; + pBIACfg->SweepCfg.SweepStop = 150000.0; + pBIACfg->SweepCfg.SweepPoints = 100; + pBIACfg->SweepCfg.SweepLog = bTRUE; +} + +void AD5940_Main(void) +{ + static uint32_t IntCount; + static uint32_t count; + uint32_t temp; + + AD5940PlatformCfg(); + + AD5940BIAStructInit(); /* Configure your parameters in this function */ + + AppBIAInit(AppBuff, APPBUFF_SIZE); /* Initialize BIA application. Provide a buffer, which is used to store sequencer commands */ /*SKR this needs to be invisible by the final user*/ + AppBIACtrl(BIACTRL_START, 0); /* Control BIA measurment to start. Second parameter has no meaning with this command. */ + + while(1) + { + /* Check if interrupt flag which will be set when interrupt occured. */ + if(AD5940_GetMCUIntFlag()) + { + IntCount++; + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppBIAISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + BIAShowResult(AppBuff, temp); /* Show the results to UART */ + + if(IntCount == 240) + { + IntCount = 0; + //AppBIACtrl(BIACTRL_SHUTDOWN, 0); + } + } + count++; + if(count > 1000000) + { + count = 0; + //AppBIAInit(0, 0); /* Re-initialize BIA application. Because sequences are ready, no need to provide a buffer, which is used to store sequencer commands */ + //AppBIACtrl(BIACTRL_START, 0); /* Control BIA measurment to start. Second parameter has no meaning with this command. */ + } + } +} + +/** + * @} + * @} + * */ + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.rteconfig b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.rteconfig new file mode 100644 index 0000000..06593ae --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.rteconfig @@ -0,0 +1,56 @@ + + + + + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.uvoptx b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.uvoptx new file mode 100644 index 0000000..9559b03 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BodyImpedance-HiZ_Electrodes.c + BodyImpedance-HiZ_Electrodes.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.uvprojx b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.uvprojx new file mode 100644 index 0000000..485bf25 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/AD5940_BIA_HiZ_Electrodes.uvprojx @@ -0,0 +1,505 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::..\..\Program Files (x86)\ARM_Compiler_5.06u7 + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.1 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BodyImpedance-HiZ_Electrodes.c + 1 + ..\BodyImpedance-HiZ_Electrodes.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/main.c b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_BIA_HiZ_Electrodes/BodyImpedance-HiZ_Electrodes.c b/examples/AD5940_BIA_HiZ_Electrodes/BodyImpedance-HiZ_Electrodes.c new file mode 100644 index 0000000..3f0023a --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/BodyImpedance-HiZ_Electrodes.c @@ -0,0 +1,680 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: ADI + @brief: Used to control specific application and process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "BodyImpedance-HiZ_Electrodes.h" +#include +DSPCfg_Type dsp_cfg; /*SKR: this variable needs to be global since the DFTlength is modified several times*/ + + +/* This file contains auto generated source code that user defined */ + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppBIACfg_Type AppBIACfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ReDoRtiaCal = bFALSE, + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 32000000.0, + .BiaODR = 2.5, /* 20.0 Hz*/ + .NumOfData = -1, + .RcalVal = 10000.0, /* 10kOhm */ + + .PwrMod = AFEPWR_HP, + .HstiaRtiaSel = HSTIARTIA_1K, + .CtiaSel = 16, + .ExcitBufGain = EXCITBUFGAIN_2, + .HsDacGain = HSDACGAIN_1, + .HsDacUpdateRate = 7, + .DacVoltPP = 800.0, + + .SinFreq = 50000.0, /* 1000Hz */ + + .ADCPgaGain = ADCPGA_1P5, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .DftNum = DFTNUM_16384, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .SweepCfg.SweepEn = bFALSE, + .SweepCfg.SweepStart = 10000, + .SweepCfg.SweepStop = 150000.0, + .SweepCfg.SweepPoints = 100, + .SweepCfg.SweepLog = bTRUE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 12, + .BIAInited = bFALSE, + .StopRequired = bFALSE, + +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppBIAGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppBIACfg_Type**)pCfg = &AppBIACfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +AD5940Err AppBIACtrl(int32_t BcmCtrl, void *pPara) +{ + switch (BcmCtrl) + { + case BIACTRL_START: + { + WUPTCfg_Type wupt_cfg; + if(AD5940_WakeUp(10) > 10) /* Wakup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppBIACfg.BIAInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = (uint32_t)(AppBIACfg.WuptClkFreq/AppBIACfg.BiaODR)-2-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = 1; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + AD5940_WUPTCfg(&wupt_cfg); + + AppBIACfg.FifoDataCount = 0; /* restart */ + printf("BIA Start...\n"); + break; + } + case BIACTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + AD5940_WUPTCtrl(bFALSE); /* @todo is it sure this will stop Wupt? */ + printf("BIA Stop Now...\n"); + break; + } + case BIACTRL_STOPSYNC: + { + printf("BIA Stop SYNC...\n"); + AppBIACfg.StopRequired = bTRUE; + break; + } + case BIACTRL_GETFREQ: + if(pPara) + { + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppBIACfg.FreqofData; + else + *(float*)pPara = AppBIACfg.SinFreq; + } + break; + case BIACTRL_SHUTDOWN: + { + AppBIACtrl(BIACTRL_STOPNOW, 0); /* Stop the measurment if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by sleep operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + printf("BIA Shut down...\n"); + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppBIASeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type hs_loop; + LPLoopCfg_Type lp_loop; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->control external mux, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save powr*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + hs_loop.HsDacCfg.ExcitBufGain = AppBIACfg.ExcitBufGain; + hs_loop.HsDacCfg.HsDacGain = AppBIACfg.HsDacGain; + hs_loop.HsDacCfg.HsDacUpdateRate = AppBIACfg.HsDacUpdateRate; + + hs_loop.HsTiaCfg.DiodeClose = bFALSE; + hs_loop.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hs_loop.HsTiaCfg.HstiaCtia = AppBIACfg.CtiaSel; /* 16pF */ + hs_loop.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaRtiaSel = AppBIACfg.HstiaRtiaSel; + + hs_loop.SWMatCfg.Dswitch = SWD_OPEN; + hs_loop.SWMatCfg.Pswitch = SWP_PL|SWP_PL2; + hs_loop.SWMatCfg.Nswitch = SWN_NL|SWN_NL2; + hs_loop.SWMatCfg.Tswitch = SWT_TRTIA; + + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bFALSE; + hs_loop.WgCfg.OffsetCalEn = bFALSE; + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + AppBIACfg.FreqofData = AppBIACfg.SweepCfg.SweepStart; + AppBIACfg.SweepCurrFreq = AppBIACfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppBIACfg.SweepCfg, &AppBIACfg.SweepNextFreq); + sin_freq = AppBIACfg.SweepCurrFreq; + } + else + { + sin_freq = AppBIACfg.SinFreq; + AppBIACfg.FreqofData = sin_freq; + } + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppBIACfg.SysClkFreq); + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppBIACfg.DacVoltPP/800.0f*2047 + 0.5f); + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&hs_loop); + + lp_loop.LpDacCfg.LpdacSel = LPDAC0; + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp_loop.LpDacCfg.DataRst = bFALSE; + lp_loop.LpDacCfg.PowerEn = bTRUE; + lp_loop.LpDacCfg.DacData12Bit = (uint32_t)((1100-200)/2200.0*4095); + lp_loop.LpDacCfg.DacData6Bit = 31; + + lp_loop.LpAmpCfg.LpAmpSel = LPAMP0; + lp_loop.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp_loop.LpAmpCfg.LpPaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaRf = LPTIARF_20K; + lp_loop.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lp_loop.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(6)|LPTIASW(7)|LPTIASW(8)|LPTIASW(9)|LPTIASW(12)|LPTIASW(13); /* @todo Optimizanation needed for new silicon */ + AD5940_LPLoopCfgS(&lp_loop); + + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppBIACfg.ADCPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_2; /* Don't care becase it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_1P6MHZ; /* @todo Add explanation in UG that SINC3 filter clock is same as ADC, when ADC runs at 32MHz, clear this bit to enable clock divider for SINC3 filter. Make sure SINC3 clock is below 16MHz. */ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + /*dsp_cfg.ADCFilterCfg.Sinc2NotchClkEnable = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc3ClkEnable = bTRUE; + dsp_cfg.ADCFilterCfg.WGClkEnable = bTRUE; + dsp_cfg.ADCFilterCfg.DFTClkEnable = bTRUE;*/ + dsp_cfg.DftCfg.DftNum = AppBIACfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppBIACfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppBIACfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extral command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop seuqncer generator */ + if(error == AD5940ERR_OK) + { + AppBIACfg.InitSeqInfo.SeqId = SEQID_1; + AppBIACfg.InitSeqInfo.SeqRamAddr = AppBIACfg.SeqStartAddr; + AppBIACfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppBIACfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIACfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIASeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppBIACfg.DftSrc; + clks_cal.DataCount = 1L<<(dsp_cfg.DftCfg.DftNum+2); /*wait can be no constant*//*clks_cal.DataCount = 1L<<(AppBIACfg.DftNum+2);*/ /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBIACfg.SysClkFreq/AppBIACfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + /*0*/AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + /*1*//*SKR: BUFSENCON is not done, it is done during the initialization (AD5940_REFCfgS)*/ + /*2*//*SKR: AFECON is set to all connected during the initialization (AD5940_AFECtrlS)*/ + /*3*/AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* @todo wait 250us?? */ + /*4*/dsp_cfg.DftCfg.DftNum = DFTNUM_16384; + AD5940_DSPCfgS(&dsp_cfg); + clks_cal.DataCount = 1L<<(dsp_cfg.DftCfg.DftNum+2); + AD5940_ClksCalculate(&clks_cal, &WaitClks); + /*5*/sw_cfg.Dswitch = SWD_RCAL0; + /*6*/sw_cfg.Pswitch = SWP_RCAL0; + /*7*/sw_cfg.Nswitch = SWN_RCAL1; + /*8*/sw_cfg.Tswitch = SWT_RCAL1|SWT_TRTIA; + /*9*/AD5940_SWMatrixCfgS(&sw_cfg); + /*10*/ + /*11*/AD5940_ADCMuxCfgS(ADCMUXP_HSTIA_P, ADCMUXN_HSTIA_N); + /*12*/AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + /*13*/AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + /*14*/ AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /*15*/AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + /*16*/AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + /*17*/dsp_cfg.DftCfg.DftNum = AppBIACfg.DftNum; + clks_cal.DataCount = 1L<<(dsp_cfg.DftCfg.DftNum+2); + AD5940_ClksCalculate(&clks_cal, &WaitClks); + /*18*/ //I think it is not needed + /*19*/ //I think it is not needed + /*20*/sw_cfg.Dswitch = SWD_CE0; + /*21*/sw_cfg.Pswitch = SWP_CE0; + /*22*/sw_cfg.Nswitch = SWN_AIN1|SWN_AIN2|SWN_AIN3; + /*23*/sw_cfg.Tswitch = SWT_AIN1|SWT_AIN2|SWT_AIN3|SWT_TRTIA; + /*24*/AD5940_SWMatrixCfgS(&sw_cfg); + /*25*/ //I think it is not needed + /*26*/AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + /*27*/AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + /*28*/ AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /*29*/AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + /*30*/AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + /*31*/ //I think it is not needed + /*32*/sw_cfg.Dswitch = SWD_CE0|SWD_AIN1|SWD_AIN3; + /*33*/sw_cfg.Pswitch = SWP_CE0|SWP_AIN1|SWP_AIN3; + /*34*/sw_cfg.Nswitch = SWN_AIN2; + /*35*/sw_cfg.Tswitch = SWT_AIN2|SWT_TRTIA; + /*36*/AD5940_SWMatrixCfgS(&sw_cfg); + /*37*/AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + /*38*/AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + /*39*/ AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /*40*/AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + /*41*/AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + /*42*/sw_cfg.Dswitch = SWD_CE0|SWD_AIN1|SWD_AIN2; + /*43*/sw_cfg.Pswitch = SWP_CE0|SWP_AIN1|SWP_AIN2; + /*44*/sw_cfg.Nswitch = SWN_AIN3; + /*45*/sw_cfg.Tswitch = SWT_AIN3|SWT_TRTIA; + /*46*/AD5940_SWMatrixCfgS(&sw_cfg); + /*47*/AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + /*48*/AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + /*49*/ AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /*50*/AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + /*51*/AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + /*52*/sw_cfg.Dswitch = SWD_CE0|SWD_AIN2|SWD_AIN3; + /*53*/sw_cfg.Pswitch = SWP_CE0|SWP_AIN2|SWP_AIN3; + /*54*/sw_cfg.Nswitch = SWN_AIN1; + /*55*/sw_cfg.Tswitch = SWT_AIN1|SWT_TRTIA; + /*56*/AD5940_SWMatrixCfgS(&sw_cfg); + /*57*/AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + /*58*/AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + /*59*/ AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /*60*/AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + /*61*/AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + /*62*/sw_cfg.Dswitch = SWD_CE0|SWD_AIN2; + /*63*/sw_cfg.Pswitch = SWP_CE0|SWP_AIN2; + /*64*/sw_cfg.Nswitch = SWN_AIN1|SWN_AIN3; + /*65*/sw_cfg.Tswitch = SWT_AIN1|SWT_AIN3|SWT_TRTIA; + /*66*/AD5940_SWMatrixCfgS(&sw_cfg); + /*67*/AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + /*68*/AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + /*69*/ AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + /*70*/AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + /*71*/AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + /*72*/ + /*73*/sw_cfg.Dswitch = SWD_OPEN; + /*74*/sw_cfg.Pswitch = SWP_PL|SWP_PL2; + /*75*/sw_cfg.Nswitch = SWN_NL|SWN_NL2; + /*76*/sw_cfg.Tswitch = SWT_OPEN; + /*77*/AD5940_SWMatrixCfgS(&sw_cfg); /* Float switches */ + /*78*/ + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->control MUX, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop seuqncer generator */ + + if(error == AD5940ERR_OK) + { + AppBIACfg.MeasureSeqInfo.SeqId = SEQID_0; + AppBIACfg.MeasureSeqInfo.SeqRamAddr = AppBIACfg.InitSeqInfo.SeqRamAddr + AppBIACfg.InitSeqInfo.SeqLen ; + AppBIACfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppBIACfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIACfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIARtiaCal(void) +{ + HSRTIACal_Type hsrtia_cal; + + hsrtia_cal.AdcClkFreq = AppBIACfg.AdcClkFreq; + hsrtia_cal.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + hsrtia_cal.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + hsrtia_cal.bPolarResult = bTRUE; /* We need magnitude and phase here */ + hsrtia_cal.DftCfg.DftNum = AppBIACfg.DftNum; + hsrtia_cal.DftCfg.DftSrc = AppBIACfg.DftSrc; + hsrtia_cal.DftCfg.HanWinEn = AppBIACfg.HanWinEn; + hsrtia_cal.fRcal= AppBIACfg.RcalVal; + hsrtia_cal.HsTiaCfg.DiodeClose = bFALSE; + hsrtia_cal.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hsrtia_cal.HsTiaCfg.HstiaCtia = AppBIACfg.CtiaSel; + hsrtia_cal.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hsrtia_cal.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_TODE; + hsrtia_cal.HsTiaCfg.HstiaRtiaSel = AppBIACfg.HstiaRtiaSel; + hsrtia_cal.SysClkFreq = AppBIACfg.SysClkFreq; + + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + uint32_t i; + AppBIACfg.SweepCfg.SweepIndex = 0; /* Reset index */ + for(i=0;i 10) /* Wakup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Do RTIA calibration */ + + if((AppBIACfg.ReDoRtiaCal == bTRUE) || \ + AppBIACfg.BIAInited == bFALSE) /* Do calibration on the first initializaion */ + { + AppBIARtiaCal(); + AppBIACfg.ReDoRtiaCal = bFALSE; + } + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppBIACfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppBIACfg.BIAInited == bFALSE)||\ + (AppBIACfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppBIASeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppBIASeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppBIACfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppBIACfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIACfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppBIACfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurment sequence */ + AppBIACfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIACfg.MeasureSeqInfo); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppBIACfg.PwrMod, AFEBW_250KHZ); + AD5940_WriteReg(REG_AFE_SWMUX, 1<<3); + AppBIACfg.BIAInited = bTRUE; /* BIA application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppBIARegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppBIACfg.NumOfData > 0) + { + AppBIACfg.FifoDataCount += *pDataCount/4; + if(AppBIACfg.FifoDataCount >= AppBIACfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppBIACfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppBIACfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AD5940_WGFreqCtrlS(AppBIACfg.SweepNextFreq, AppBIACfg.SysClkFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppBIADataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/12; + + fImpCar_Type * const pOut = (fImpCar_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/12)*12;/* We expect RCAL data together with Rz data. One DFT result has two data in FIFO, real part and imaginary part. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal + AppBIACfg.RcalVal * zCalCurr->Image*I; //real part is multiplied by -1 because current is 180� shifted. the imaginary part does not need be multiplied by -1 because DFT provides the -imaginary value, no the imaginary value + double complex a1 = vcal / (-I1->Real + I1->Image*I); //real part is multiplied by -1 because current is 180� shifted. the imaginary part does not need be multiplied by -1 because DFT provides the -imaginary value, no the imaginary value + double complex a2 = vcal / (-I2->Real + I2->Image*I); //real part is multiplied by -1 because current is 180� shifted. the imaginary part does not need be multiplied by -1 because DFT provides the -imaginary value, no the imaginary value + double complex a3 = vcal / (-I3->Real + I3->Image*I); //real part is multiplied by -1 because current is 180� shifted. the imaginary part does not need be multiplied by -1 because DFT provides the -imaginary value, no the imaginary value + double complex a4 = vcal / (-I4->Real + I4->Image*I); //real part is multiplied by -1 because current is 180� shifted. the imaginary part does not need be multiplied by -1 because DFT provides the -imaginary value, no the imaginary value + double complex a5 = vcal / (-I5->Real + I5->Image*I); //real part is multiplied by -1 because current is 180� shifted. the imaginary part does not need be multiplied by -1 because DFT provides the -imaginary value, no the imaginary value + double complex E1 = -2*a1*a2*a5*(a1*a2 + a1*a5 - a2*a5)/(a1*a1*a2*a2 - 2*a1*a1*a2*a5 + a1*a1*a5*a5 - 2*a1*a2*a2*a5 - 2*a1*a2*a5*a5 + a2*a2*a5*a5); + double complex E2 = -2*a1*a2*a5*(a1*a2 - a1*a5 + a2*a5)/(a1*a1*a2*a2 - 2*a1*a1*a2*a5 + a1*a1*a5*a5 - 2*a1*a2*a2*a5 - 2*a1*a2*a5*a5 + a2*a2*a5*a5); + double complex E3 = -2*a3*a4*a5*(a3*a4 + a3*a5 - a4*a5)/(a3*a3*a4*a4 - 2*a3*a3*a4*a5 + a3*a3*a5*a5 - 2*a3*a4*a4*a5 - 2*a3*a4*a5*a5 + a4*a4*a5*a5); + double complex E4 = -2*a3*a4*a5*(a3*a4 - a3*a5 + a4*a5)/(a3*a3*a4*a4 - 2*a3*a3*a4*a5 + a3*a3*a5*a5 - 2*a3*a4*a4*a5 - 2*a3*a4*a5*a5 + a4*a4*a5*a5); + double complex ZB = (-E1*E2*E3 - E1*E2*E4 - E1*E3*E4 + E1*E3*a5 + E1*E4*a5 - E2*E3*E4 + E2*E3*a5 + E2*E4*a5)/(E1*E3 + E1*E4 + E2*E3 + E2*E4); + + pOut[(i*5)+0].Real = creal(E1); + pOut[(i*5)+0].Image = cimag(E1); + pOut[(i*5)+1].Real = creal(E2); + pOut[(i*5)+1].Image = cimag(E2); + pOut[(i*5)+2].Real = creal(E3); + pOut[(i*5)+2].Image = cimag(E3); + pOut[(i*5)+3].Real = creal(E4); + pOut[(i*5)+3].Image = cimag(E4); + pOut[(i*5)+4].Real = creal(ZB); + pOut[(i*5)+4].Image = cimag(ZB); + + + } + *pDataCount = ImpResCount; + /* Calculate next frequency point */ + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + AppBIACfg.FreqofData = AppBIACfg.SweepCurrFreq; + AppBIACfg.SweepCurrFreq = AppBIACfg.SweepNextFreq; + AD5940_SweepNext(&AppBIACfg.SweepCfg, &AppBIACfg.SweepNextFreq); + AppBIACfg.RtiaCurrValue[0] = AppBIACfg.RtiaCalTable[AppBIACfg.SweepCfg.SweepIndex][0]; + AppBIACfg.RtiaCurrValue[1] = AppBIACfg.RtiaCalTable[AppBIACfg.SweepCfg.SweepIndex][1]; + } + return AD5940ERR_OK; +} + +/** + +*/ +AD5940Err AppBIAISR(void *pBuff, uint32_t *pCount) +{ + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + if(AppBIACfg.BIAInited == bFALSE) + return AD5940ERR_APPERROR; + if(AD5940_WakeUp(10) > 10) /* Wakup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/12)*12; + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppBIARegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + + /* Process data */ + AppBIADataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + +/** + * @} + */ + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/BodyImpedance-HiZ_Electrodes.h b/examples/AD5940_BIA_HiZ_Electrodes/BodyImpedance-HiZ_Electrodes.h new file mode 100644 index 0000000..7b7ec63 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/BodyImpedance-HiZ_Electrodes.h @@ -0,0 +1,121 @@ +/*! + @file: ImpSeqs.h + @author: $Author: nxu2 $ + @brief: 4-wire BIA measurement header file. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- +Copyright (c) 2012-2017 Analog Devices, Inc. + +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + - Modified versions of the software must be conspicuously marked as such. + - This software is licensed solely and exclusively for use with processors + manufacTRUEd by or for Analog Devices, Inc. + - This software may not be combined or merged with other code in any manner + that would cause the software to become subject to terms and conditions + which differ from those listed here. + - Neither the name of Analog Devices, Inc. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + - The use of this software may or may not infringe the patent rights of one + or more patent holders. This license does not release you from the + requirement that you obtain separate licenses from these patent holders + to use this software. +THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON- +INFRINGEMENT, TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF +CLAIMS OF INTELLECTUAL PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. +*****************************************************************************/ + +#ifndef _BODYCOMPOSITIONJOSEMETHOD_H_ +#define _BODYCOMPOSITIONJOSEMETHOD_H_ +#include "ad5940.h" +#include "stdio.h" +#include "string.h" +#include "math.h" + +#define MAXSWEEP_POINTS 100 /* Need to know how much buffer is needed to save RTIA calibration result */ + +/* + Note: this example will use SEQID_0 as measurment sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration. +*/ + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurment sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + //BoolFlag bBioElecBoard; /* The code is same for BioElec board and AD5941Sens1 board. No changes are needed */ + BoolFlag ReDoRtiaCal; /* Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /* The real frequency of system clock */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ + float BiaODR; /* in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically. DFT number and sample frequency decides the maxim ODR. */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float SinFreq; /* Frequency of excitation signal */ + float RcalVal; /* Rcal value in Ohm */ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + float DacVoltPP; /* Final excitation voltage is DAC_VOLTpp*DAC_PGA*EXCIT_GAIN, DAC_PGA= 1 or 0.2, EXCIT_GAIN=2 or 0.25. DAC output voltage in mV peak to peak. Maximum value is 800mVpp. Peak to peak voltage */ + uint32_t ExcitBufGain; /* Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; /* DAC update rate is SystemCLoock/Divider. The available value is 7 to 255. Set to 7 for better perfomance */ + uint32_t ADCPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /* SINC3 OSR selection. ADCSINC3OSR_2, ADCSINC3OSR_4 */ + uint8_t ADCSinc2Osr; /* SINC2 OSR selection. ADCSINC2OSR_22...ADCSINC2OSR_1333 */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t CtiaSel; /* Select CTIA in pF unit from 0 to 31pF */ + + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + float RtiaCurrValue[2]; /* Calibrated Rtia value of current frequency */ + float RtiaCalTable[MAXSWEEP_POINTS][2]; /* Calibrated Rtia Value table */ + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag BIAInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurment sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ +/* End */ +}AppBIACfg_Type; + +#define BIACTRL_START 0 +#define BIACTRL_STOPNOW 1 +#define BIACTRL_STOPSYNC 2 +#define BIACTRL_GETFREQ 3 /* Get Current frequency of returned data from ISR */ +#define BIACTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + +AD5940Err AppBIAGetCfg(void *pCfg); +AD5940Err AppBIAInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppBIAISR(void *pBuff, uint32_t *pCount); +AD5940Err AppBIACtrl(int32_t BcmCtrl, void *pPara); + +#endif diff --git a/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/AD5940_BIA_HiZ_Electrodes.uvoptx b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/AD5940_BIA_HiZ_Electrodes.uvoptx new file mode 100644 index 0000000..0fbea52 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/AD5940_BIA_HiZ_Electrodes.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BodyImpedance-HiZ_Electrodes.c + BodyImpedance-HiZ_Electrodes.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/AD5940_BIA_HiZ_Electrodes.uvprojx b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/AD5940_BIA_HiZ_Electrodes.uvprojx new file mode 100644 index 0000000..6f64da4 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/AD5940_BIA_HiZ_Electrodes.uvprojx @@ -0,0 +1,591 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.17.1 + https://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X, ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BodyImpedance-HiZ_Electrodes.c + 1 + ..\BodyImpedance-HiZ_Electrodes.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/main.c b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_BIA_HiZ_Electrodes/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_BIOZ-2Wire/AD5940Main.c b/examples/AD5940_BIOZ-2Wire/AD5940Main.c new file mode 100644 index 0000000..e566bca --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/AD5940Main.c @@ -0,0 +1,155 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Used to control specific application and further process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** + * @addtogroup AD5940_System_Examples + * @{ + * @defgroup BioElec_Example + * @{ + */ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "BIOZ-2Wire.h" + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +/* It's your choice here how to do with the data. Here is just an example to print them to UART */ +int32_t BIOZShowResult(uint32_t *pData, uint32_t DataCount) +{ + float freq; + + fImpCar_Type *pImp = (fImpCar_Type*)pData; + AppBIOZCtrl(BIOZCTRL_GETFREQ, &freq); + + /*Process data*/ + for(int i=0;iSeqStartAddr = 0; + pBIOZCfg->MaxSeqLen = 512; + + pBIOZCfg->SinFreq = 20e3; /* 20kHz. This value is ignored if SweepEn = bTRUE */ + pBIOZCfg->RcalVal = 10000.0; /* Value of RCAl on the evaluaiton board */ + pBIOZCfg->HstiaRtiaSel = HSTIARTIA_200; + + /* Configure Switch matrix */ + pBIOZCfg->DswitchSel = SWD_CE0; + pBIOZCfg->PswitchSel = SWP_CE0; + pBIOZCfg->NswitchSel = SWN_AIN2; + pBIOZCfg->TswitchSel = SWN_AIN2; + + /* Configure Sweep Parameters */ + pBIOZCfg->SweepCfg.SweepEn = bTRUE; + pBIOZCfg->SweepCfg.SweepStart = 1000; + pBIOZCfg->SweepCfg.SweepStop = 200000.0; + pBIOZCfg->SweepCfg.SweepPoints = 40; /* Maximum is 100 */ + pBIOZCfg->SweepCfg.SweepLog = bFALSE; + + pBIOZCfg->BIOZODR = 5; /* ODR(Sample Rate) 5Hz */ + pBIOZCfg->NumOfData = -1; /* Never stop until you stop it manually by AppBIOZCtrl() function */ +} + + +void AD5940_Main(void) +{ + uint32_t temp; + + AD5940PlatformCfg(); + + AD5940BIOZStructInit(); /* Configure your parameters in this function */ + + AppBIOZInit(AppBuff, APPBUFF_SIZE); /* Initialize BIOZ application. Provide a buffer, which is used to store sequencer commands */ + AppBIOZCtrl(BIOZCTRL_START, 0); /* Control BIOZ measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppBIOZISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + BIOZShowResult(AppBuff, temp); /* Show the results to UART */ + } + } +} + +/** + * @} + * @} + * */ + diff --git a/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.ewd b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 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+ $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.rteconfig b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.uvoptx b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.uvoptx new file mode 100644 index 0000000..17518d2 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 2 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BIOZ-2Wire.c + BIOZ-2Wire.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.uvprojx b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.uvprojx new file mode 100644 index 0000000..c3de7c5 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/ADICUP3029/AD5940_BIOZ-2Wire.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BIOZ-2Wire.c + 1 + ..\BIOZ-2Wire.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_BIOZ-2Wire/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_BIOZ-2Wire/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_BIOZ-2Wire/ADICUP3029/main.c b/examples/AD5940_BIOZ-2Wire/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_BIOZ-2Wire/BIOZ-2Wire.c b/examples/AD5940_BIOZ-2Wire/BIOZ-2Wire.c new file mode 100644 index 0000000..3aac68f --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/BIOZ-2Wire.c @@ -0,0 +1,710 @@ +/****************************************************************************** +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include "BIOZ-2Wire.h" + +/** +* @note This example is modified from BIOZ example. This one is for 2-wire impedance measuremnt. +* The default pins used are CE0 and AIN2. The differnce with BIOZ is that the body voltage +* Measurment is replaced with excitation voltage measurment and it's only measured once. +*/ + +/* +Application configuration structure. Specified by user from template. +The variables are usable in this whole application. +It includes basic configuration for sequencer generator and application related parameters +*/ +AppBIOZCfg_Type AppBIOZCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ReDoRtiaCal = bFALSE, + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .BIOZODR = 20.0, /* 20.0 Hz*/ + .NumOfData = -1, + .RcalVal = 10000.0, /* 10kOhm */ + + .PwrMod = AFEPWR_LP, + .HstiaRtiaSel = HSTIARTIA_10K, + .CtiaSel = 16, + .ExcitBufGain = EXCITBUFGAIN_2, + .HsDacGain = HSDACGAIN_1, + .HsDacUpdateRate = 7, + .DacVoltPP = 600.0, + + .SinFreq = 50000.0, /* 5000Hz */ + + .ADCPgaGain = ADCPGA_1P5, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .DftNum = DFTNUM_8192, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .SweepCfg.SweepEn = bFALSE, + .SweepCfg.SweepStart = 10000, + .SweepCfg.SweepStop = 150000.0, + .SweepCfg.SweepPoints = 100, + .SweepCfg.SweepLog = bTRUE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 4, /* Must be 4 when SweepEn = bTRUE*/ + .BIOZInited = bFALSE, + .StopRequired = bFALSE, +}; + +/** +This function is provided for upper controllers that want to change +application parameters specially for user defined parameters. +*/ +AD5940Err AppBIOZGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppBIOZCfg_Type**)pCfg = &AppBIOZCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +AD5940Err AppBIOZCtrl(int32_t BcmCtrl, void *pPara) +{ + switch (BcmCtrl) + { + case BIOZCTRL_START: + { + WUPTCfg_Type wupt_cfg; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppBIOZCfg.BIOZInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start the wakeup timer */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = (uint32_t)(AppBIOZCfg.WuptClkFreq/AppBIOZCfg.BIOZODR)-2-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = 1; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + AD5940_WUPTCfg(&wupt_cfg); + + AppBIOZCfg.FifoDataCount = 0; /* restart */ +#ifdef ADI_DEBUG + ADI_Print("BIOZ Start...\n"); +#endif + break; + } + case BIOZCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Stop Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + AD5940_WUPTCtrl(bFALSE); +#ifdef ADI_DEBUG + ADI_Print("BIOZ Stop Now...\n"); +#endif + break; + } + case BIOZCTRL_STOPSYNC: + { +#ifdef ADI_DEBUG + ADI_Print("BIOZ Stop SYNC...\n"); +#endif + AppBIOZCfg.StopRequired = bTRUE; + break; + } + case BIOZCTRL_GETFREQ: + if(pPara) + { + if(AppBIOZCfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppBIOZCfg.FreqofData; + else + *(float*)pPara = AppBIOZCfg.SinFreq; + } + break; + case BIOZCTRL_SHUTDOWN: + { + AppBIOZCtrl(BIOZCTRL_STOPNOW, 0); /* Stop the measurment if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by sleep operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ +#ifdef ADI_DEBUG + ADI_Print("BIOZ Shut down...\n"); +#endif + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppBIOZSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type hs_loop; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + + /* LP reference control - turn off them to save powr*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + hs_loop.HsDacCfg.ExcitBufGain = AppBIOZCfg.ExcitBufGain; + hs_loop.HsDacCfg.HsDacGain = AppBIOZCfg.HsDacGain; + hs_loop.HsDacCfg.HsDacUpdateRate = AppBIOZCfg.HsDacUpdateRate; + + hs_loop.HsTiaCfg.DiodeClose = bFALSE; + hs_loop.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hs_loop.HsTiaCfg.HstiaCtia = AppBIOZCfg.CtiaSel; /* 31pF + 2pF */ + hs_loop.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaRtiaSel = AppBIOZCfg.HstiaRtiaSel; + + hs_loop.SWMatCfg.Dswitch = SWD_OPEN; + hs_loop.SWMatCfg.Pswitch = SWP_PL|SWP_PL2; + hs_loop.SWMatCfg.Nswitch = SWN_NL|SWN_NL2; + hs_loop.SWMatCfg.Tswitch = SWT_TRTIA; + + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bFALSE; + hs_loop.WgCfg.OffsetCalEn = bFALSE; + if(AppBIOZCfg.SweepCfg.SweepEn == bTRUE) + { + AppBIOZCfg.SweepCfg.SweepIndex = 0; + AppBIOZCfg.FreqofData = AppBIOZCfg.SweepCfg.SweepStart; + AppBIOZCfg.SweepCurrFreq = AppBIOZCfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppBIOZCfg.SweepCfg, &AppBIOZCfg.SweepNextFreq); + sin_freq = AppBIOZCfg.SweepCurrFreq; + } + else + { + sin_freq = AppBIOZCfg.SinFreq; + AppBIOZCfg.FreqofData = sin_freq; + } + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppBIOZCfg.SysClkFreq); + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppBIOZCfg.DacVoltPP/800.0f*2047 + 0.5f); + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&hs_loop); + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppBIOZCfg.ADCPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care becase it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppBIOZCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppBIOZCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppBIOZCfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppBIOZCfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppBIOZCfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extral command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop seuqncer generator */ + if(error == AD5940ERR_OK) + { + AppBIOZCfg.InitSeqInfo.SeqId = SEQID_1; + AppBIOZCfg.InitSeqInfo.SeqRamAddr = AppBIOZCfg.SeqStartAddr; + AppBIOZCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppBIOZCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIOZCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIOZSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppBIOZCfg.DftSrc; + clks_cal.DataCount = 1L<<(AppBIOZCfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppBIOZCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppBIOZCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBIOZCfg.SysClkFreq/AppBIOZCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_SEQGpioCtrlS(AGPIO_Pin1/*|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Configure switch matrix to connect the sensor */ + sw_cfg.Dswitch = AppBIOZCfg.DswitchSel; + sw_cfg.Pswitch = AppBIOZCfg.PswitchSel; + sw_cfg.Nswitch = AppBIOZCfg.NswitchSel; + sw_cfg.Tswitch = AppBIOZCfg.TswitchSel|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); + /* Step 1: Measure Current */ + AD5940_ADCMuxCfgS(ADCMUXP_HSTIA_P, ADCMUXN_HSTIA_N); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_SEQGenInsert(SEQ_WAIT(1)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + + /* Step 2: Measure Voltage */ + AD5940_ADCMuxCfgS(ADCMUXP_VCE0, ADCMUXN_N_NODE); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_SEQGenInsert(SEQ_WAIT(1)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + + sw_cfg.Dswitch = SWD_OPEN; + sw_cfg.Pswitch = SWP_PL|SWP_PL2; + sw_cfg.Nswitch = SWN_NL|SWN_NL2; + sw_cfg.Tswitch = SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); /* Float switches */ + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop seuqncer generator */ + + if(error == AD5940ERR_OK) + { + AppBIOZCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppBIOZCfg.MeasureSeqInfo.SeqRamAddr = AppBIOZCfg.InitSeqInfo.SeqRamAddr + AppBIOZCfg.InitSeqInfo.SeqLen ; + AppBIOZCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppBIOZCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIOZCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIOZRtiaCal(void) +{ + HSRTIACal_Type hsrtia_cal; + FreqParams_Type freq_params; + + if(AppBIOZCfg.SweepCfg.SweepEn == bTRUE) + { + hsrtia_cal.fFreq = AppBIOZCfg.SweepCfg.SweepStart; + freq_params = AD5940_GetFreqParameters(AppBIOZCfg.SweepCfg.SweepStart); + } + else + { + hsrtia_cal.fFreq = AppBIOZCfg.SinFreq; + freq_params = AD5940_GetFreqParameters(AppBIOZCfg.SinFreq); + } + + if(freq_params.HighPwrMode == bTRUE) + hsrtia_cal.AdcClkFreq = 32e6; + else + hsrtia_cal.AdcClkFreq = 16e6; + hsrtia_cal.ADCSinc2Osr = freq_params.ADCSinc2Osr; + hsrtia_cal.ADCSinc3Osr = freq_params.ADCSinc3Osr; + hsrtia_cal.DftCfg.DftNum = freq_params.DftNum; + hsrtia_cal.DftCfg.DftSrc = freq_params.DftSrc; + hsrtia_cal.bPolarResult = bTRUE; /* We need magnitude and phase here */ + hsrtia_cal.DftCfg.HanWinEn = AppBIOZCfg.HanWinEn; + hsrtia_cal.fRcal= AppBIOZCfg.RcalVal; + hsrtia_cal.HsTiaCfg.DiodeClose = bFALSE; + hsrtia_cal.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hsrtia_cal.HsTiaCfg.HstiaCtia = AppBIOZCfg.CtiaSel; + hsrtia_cal.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hsrtia_cal.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hsrtia_cal.HsTiaCfg.HstiaRtiaSel = AppBIOZCfg.HstiaRtiaSel; + hsrtia_cal.SysClkFreq = AppBIOZCfg.SysClkFreq; + + + if(AppBIOZCfg.SweepCfg.SweepEn == bTRUE) + { + uint32_t i; + AppBIOZCfg.SweepCfg.SweepIndex = 0; /* Reset index */ + for(i=0;i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Do RTIA calibration */ + if((AppBIOZCfg.ReDoRtiaCal == bTRUE) || \ + AppBIOZCfg.BIOZInited == bFALSE) /* Do calibration on the first initializaion */ + { + AppBIOZRtiaCal(); + AppBIOZCfg.ReDoRtiaCal = bFALSE; + } + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppBIOZCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppBIOZCfg.BIOZInited == bFALSE)||\ + (AppBIOZCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppBIOZSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppBIOZSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppBIOZCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppBIOZCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIOZCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppBIOZCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Measurment sequence */ + AppBIOZCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIOZCfg.MeasureSeqInfo); + + AppBIOZCheckFreq(AppBIOZCfg.FreqofData); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AppBIOZCfg.BIOZInited = bTRUE; /* BIOZ application has been initialized. */ + return AD5940ERR_OK; +} + +/* Depending on frequency of Sin wave set optimum filter settings */ +AD5940Err AppBIOZCheckFreq(float freq) +{ + ADCFilterCfg_Type filter_cfg; + DFTCfg_Type dft_cfg; + HSDACCfg_Type hsdac_cfg; + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + FreqParams_Type freq_params; + uint32_t SeqCmdBuff[2]; + uint32_t SRAMAddr = 0;; + /* Step 1: Check Frequency */ + freq_params = AD5940_GetFreqParameters(freq); + + /* Set power mode */ + if(freq_params.HighPwrMode == bTRUE) + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain = AppBIOZCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = AppBIOZCfg.HsDacGain; + hsdac_cfg.HsDacUpdateRate = 0x7; + AD5940_HSDacCfgS(&hsdac_cfg); + + /*Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_1P6MHZ; + AppBIOZCfg.AdcClkFreq = 32e6; + + /* Change clock to 32MHz oscillator */ + AD5940_HPModeEn(bTRUE); + }else + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain = AppBIOZCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = AppBIOZCfg.HsDacGain; + hsdac_cfg.HsDacUpdateRate = 0x1B; + AD5940_HSDacCfgS(&hsdac_cfg); + /* Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_800KHZ; + AppBIOZCfg.AdcClkFreq = 16e6; + + /* Change clock to 16MHz oscillator */ + AD5940_HPModeEn(bFALSE); + } + + /* Step 2: Adjust ADCFILTERCON and DFTCON to set optimumn SINC3, SINC2 and DFTNUM settings */ + filter_cfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + filter_cfg.ADCSinc2Osr = freq_params.ADCSinc2Osr; + filter_cfg.ADCSinc3Osr = freq_params.ADCSinc3Osr; + filter_cfg.BpSinc3 = bFALSE; + filter_cfg.BpNotch = bTRUE; + filter_cfg.Sinc2NotchEnable = bTRUE; + dft_cfg.DftNum = freq_params.DftNum; + dft_cfg.DftSrc = freq_params.DftSrc; + dft_cfg.HanWinEn = AppBIOZCfg.HanWinEn; + AD5940_ADCFilterCfgS(&filter_cfg); + AD5940_DFTCfgS(&dft_cfg); + + /* Step 3: Calculate clocks needed to get result to FIFO and update sequencer wait command */ + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = freq_params.DftSrc; + clks_cal.DataCount = 1L<<(freq_params.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = freq_params.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = freq_params.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBIOZCfg.SysClkFreq/AppBIOZCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Maximum number of clocks is 0x3FFFFFFF. More are needed if the frequency is low */ + if(WaitClks > 0x3FFFFFFF) + { + WaitClks /=2; + SRAMAddr = AppBIOZCfg.MeasureSeqInfo.SeqRamAddr; + SeqCmdBuff[0] = SEQ_WAIT(WaitClks); + AD5940_SEQCmdWrite(SRAMAddr+11, SeqCmdBuff, 1); + AD5940_SEQCmdWrite(SRAMAddr+12, SeqCmdBuff, 1); + AD5940_SEQCmdWrite(SRAMAddr+18, SeqCmdBuff, 1); + AD5940_SEQCmdWrite(SRAMAddr+19, SeqCmdBuff, 1); + } + else + { + SRAMAddr = AppBIOZCfg.MeasureSeqInfo.SeqRamAddr; + SeqCmdBuff[0] = SEQ_WAIT(WaitClks); + AD5940_SEQCmdWrite(SRAMAddr+11, SeqCmdBuff, 1); + AD5940_SEQCmdWrite(SRAMAddr+18, SeqCmdBuff, 1); + } + + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppBIOZRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppBIOZCfg.NumOfData > 0) + { + AppBIOZCfg.FifoDataCount += *pDataCount/4; + if(AppBIOZCfg.FifoDataCount >= AppBIOZCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppBIOZCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppBIOZCfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AppBIOZCheckFreq(AppBIOZCfg.SweepNextFreq); + AD5940_WGFreqCtrlS(AppBIOZCfg.SweepNextFreq, AppBIOZCfg.SysClkFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppBIOZDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/4; + + fImpCar_Type * pOut = (fImpCar_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/4)*4; /* One DFT result has two data in FIFO, real part and imaginary part. Each measurement has 2 DFT results, one for voltage measurement, one for current */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Don't enter hibernate */ + *pCount = 0; + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppBIOZRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode to save power. */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter hibernate mode */ + /* Process data */ + AppBIOZDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + +/** +* @} +*/ + diff --git a/examples/AD5940_BIOZ-2Wire/BIOZ-2Wire.h b/examples/AD5940_BIOZ-2Wire/BIOZ-2Wire.h new file mode 100644 index 0000000..13e7ad1 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/BIOZ-2Wire.h @@ -0,0 +1,97 @@ +/*! + @file: BIOZ-2Wire.h + @author: Neo Xu + @brief: 4-wire BIOZ measurement header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#ifndef _BODYCOMPOSITION_H_ +#define _BODYCOMPOSITION_H_ +#include "ad5940.h" +#include "stdio.h" +#include "string.h" +#include "math.h" + +#define MAXSWEEP_POINTS 100 /* Need to know how much buffer is needed to save RTIA calibration result */ + +/* + Note: this example will use SEQID_0 as measurement sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration. +*/ + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIOZInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + //BoolFlag bBioElecBoard; /* The code is same for BioElec board and AD5941Sens1 board. No changes are needed */ + BoolFlag ReDoRtiaCal; /* Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /* The real frequency of system clock */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*2 */ + float BIOZODR; /* in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically. DFT number and sample frequency decides the maxim ODR. */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float SinFreq; /* Frequency of excitation signal */ + float RcalVal; /* Rcal value in Ohm */ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + float DacVoltPP; /* Final excitation voltage is DacVoltPP*DAC_PGA*EXCIT_GAIN, DAC_PGA= 1 or 0.2, EXCIT_GAIN=2 or 0.25. DAC output voltage in mV peak to peak. Maximum value is 800mVpp. Peak to peak voltage */ + uint32_t ExcitBufGain; /* Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; /* DAC update rate is SystemCLoock/Divider. The available value is 7 to 255. Set to 7 for better performance */ + uint32_t ADCPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /* SINC3 OSR selection. ADCSINC3OSR_2, ADCSINC3OSR_4 */ + uint8_t ADCSinc2Osr; /* SINC2 OSR selection. ADCSINC2OSR_22...ADCSINC2OSR_1333 */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t CtiaSel; /* Select CTIA in pF unit from 0 to 31pF */ + + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + + /* Switch Configuration */ + uint32_t DswitchSel; + uint32_t PswitchSel; + uint32_t NswitchSel; + uint32_t TswitchSel; + + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + fImpCar_Type RtiaCurrValue; /* Calibrated Rtia value at current frequency */ + fImpCar_Type RtiaCalTable[MAXSWEEP_POINTS]; /* Calibrated Rtia Value table */ + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag BIOZInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ +/* End */ +}AppBIOZCfg_Type; + +#define BIOZCTRL_START 0 +#define BIOZCTRL_STOPNOW 1 +#define BIOZCTRL_STOPSYNC 2 +#define BIOZCTRL_GETFREQ 3 /* Get Current frequency of returned data from ISR */ +#define BIOZCTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + +AD5940Err AppBIOZGetCfg(void *pCfg); +AD5940Err AppBIOZInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppBIOZISR(void *pBuff, uint32_t *pCount); +AD5940Err AppBIOZCtrl(int32_t BcmCtrl, void *pPara); +AD5940Err AppBIOZCheckFreq(float freq); + +#endif diff --git a/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/AD5940_BIOZ-2Wire.uvoptx b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/AD5940_BIOZ-2Wire.uvoptx new file mode 100644 index 0000000..efcf66c --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/AD5940_BIOZ-2Wire.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BIOZ-2Wire.c + BIOZ-2Wire.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/AD5940_BIOZ-2Wire.uvprojx b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/AD5940_BIOZ-2Wire.uvprojx new file mode 100644 index 0000000..f278a77 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/AD5940_BIOZ-2Wire.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BIOZ-2Wire.c + 1 + ..\BIOZ-2Wire.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/main.c b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_BIOZ-2Wire/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_BioElec/AD5940Main.c b/examples/AD5940_BioElec/AD5940Main.c new file mode 100644 index 0000000..629568a --- /dev/null +++ b/examples/AD5940_BioElec/AD5940Main.c @@ -0,0 +1,338 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Used to control specific application and process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "BodyImpedance.h" +#include "Electrocardiograph.h" +#include "ElectrodermalActivity.h" + +#define APP_NUM 3 /* Totally, we have 3 applications */ + +#define APP_ID_EDA 0 +#define APP_ID_ECG 1 +#define APP_ID_BIA 2 + +#define APP_EDA_SEQ_ADDR 0 +#define APP_ECG_SEQ_ADDR 256 +#define APP_BIA_SEQ_ADDR 384 + +#define APP_EDA_MAX_SEQLEN 256 +#define APP_ECG_MAX_SEQLEN 128 +#define APP_BIA_MAX_SEQLEN 128 + +typedef struct +{ + AD5940Err (*pAppGetCfg) (void *pCfg); + AD5940Err (*pAppInit) (uint32_t *pBuffer, uint32_t BufferSize); + AD5940Err (*pAppISR) (void *pBuff, uint32_t *pCount); + AD5940Err (*pAppCtrl) (int32_t BcmCtrl, void *pPara); + AD5940Err (*pAppUserDataProc) (void *pBuff, uint32_t pCount); +}BioElecApp_Type; + +AD5940Err BIAShowResult(void *pData, uint32_t DataCount); +AD5940Err ECGShowResult(void *pData, uint32_t DataCount); +AD5940Err EDAShowResult(void *pData, uint32_t DataCount); + +BioElecApp_Type BioElecAppList[APP_NUM]= +{ + /* EDA App */ + { + .pAppGetCfg = AppEDAGetCfg, + .pAppInit = AppEDAInit, + .pAppISR = AppEDAISR, + .pAppCtrl = AppEDACtrl, + .pAppUserDataProc = EDAShowResult, + }, + /* ECG App */ + { + .pAppGetCfg = AppECGGetCfg, + .pAppInit = AppECGInit, + .pAppISR = AppECGISR, + .pAppCtrl = AppECGCtrl, + .pAppUserDataProc = ECGShowResult, + }, + /* BIA App */ + { + .pAppGetCfg = AppBIAGetCfg, + .pAppInit = AppBIAInit, + .pAppISR = AppBIAISR, + .pAppCtrl = AppBIACtrl, + .pAppUserDataProc = BIAShowResult, + }, +}; +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; +float LFOSCFreq; /* Measured LFOSC frequency */ + +/* It's your choice here how to do with the data. Here is just an example to print them to UART */ +AD5940Err BIAShowResult(void *pData, uint32_t DataCount) +{ + float freq; + + fImpPol_Type *pImp = (fImpPol_Type*)pData; + AppBIACtrl(BIACTRL_GETFREQ, &freq); + + printf("Freq:%.2f ", freq); + /*Process data*/ + for(int i=0;iSeqStartAddr = APP_BIA_SEQ_ADDR; + pBIACfg->MaxSeqLen = APP_BIA_MAX_SEQLEN; /* @todo add checker in function */ + + pBIACfg->RcalVal = 10000.0; + pBIACfg->DftNum = DFTNUM_8192; + pBIACfg->NumOfData = -1; /* Never stop until you stop it manually by AppBIACtrl() function */ + pBIACfg->BiaODR = 20; /* ODR(Sample Rate) 20Hz */ + pBIACfg->FifoThresh = 4; /* 4 */ + pBIACfg->ADCSinc3Osr = ADCSINC3OSR_2; + pBIACfg->LfoscClkFreq = LFOSCFreq; + + pBIACfg->bParaChanged = bTRUE; /* Always initialize AFE. */ +} + +/* !!Change the application parameters here if you want to change it to none-default value */ +void AD5940ECGStructInit(void) +{ + AppECGCfg_Type *pCfg; + + AppECGGetCfg(&pCfg); + + pCfg->SeqStartAddr = APP_ECG_SEQ_ADDR; + pCfg->MaxSeqLen = APP_ECG_MAX_SEQLEN; /* @todo add checker in function */ + + pCfg->ECGODR = 250; /* ODR(Sample Rate) 200Hz */ + pCfg->FifoThresh = 256; /* 4 */ + pCfg->ADCSinc3Osr = ADCSINC3OSR_2; + pCfg->LfoscClkFreq = LFOSCFreq; + pCfg->bParaChanged = bTRUE; /* We always initialize AFE. */ +} + +void AD5940EDAStructInit(void) +{ + AppEDACfg_Type *pCfg; + + AppEDAGetCfg(&pCfg); + pCfg->SeqStartAddr = APP_EDA_SEQ_ADDR; + pCfg->MaxSeqLen = APP_EDA_MAX_SEQLEN; + + pCfg->LfoscClkFreq = LFOSCFreq; + + pCfg->bParaChanged = bTRUE; /* We always initialize AFE. */ +} + +BioElecApp_Type *pCurrApp; +uint8_t bSwitchingApp = 1; +uint8_t toApp = APP_ID_BIA; + +void AD5940_Main(void) +{ + static uint32_t IntCount; + uint32_t temp; + + AD5940PlatformCfg(); + AD5940BIAStructInit(); /* Configure your parameters in this function */ + AD5940ECGStructInit(); /* */ + AD5940EDAStructInit(); /* */ + pCurrApp = &BioElecAppList[toApp]; + while(1) + { + if(bSwitchingApp) + { + //if the 'old' app stopped? + BoolFlag running; + if(pCurrApp->pAppCtrl(APPCTRL_RUNNING, &running) == AD5940ERR_OK){ + if(running == bFALSE){ + bSwitchingApp = 0; + pCurrApp = &BioElecAppList[toApp]; + /* Initialize registers that fit to all measurements */ + AD5940PlatformCfg(); + pCurrApp->pAppInit(AppBuff, APPBUFF_SIZE); + AD5940_ClrMCUIntFlag(); /* Clear the interrupts happened during initialization */ + pCurrApp->pAppCtrl(APPCTRL_START, 0); + } + } + } + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + pCurrApp->pAppISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + if(pCurrApp->pAppUserDataProc) + pCurrApp->pAppUserDataProc(AppBuff, temp); /* Show the results to UART */ + + if(IntCount++ == 10) + { + IntCount = 0; + /* Control the application at any time */ + /* For example, I want to measure EDA excitation voltage periodically */ + //if(toApp == APP_ID_EDA) + // pCurrApp->pAppCtrl(EDACTRL_MEASVOLT, 0); + } + } + } +} + + +uint32_t command_start_measurement(uint32_t para1, uint32_t para2) +{ + pCurrApp->pAppCtrl(APPCTRL_START, 0); + return 0; +} + +uint32_t command_stop_measurement(uint32_t para1, uint32_t para2) +{ + pCurrApp->pAppCtrl(APPCTRL_STOPNOW, 0); + return 0; +} + +uint32_t command_switch_app(uint32_t AppID, uint32_t para2) +{ + if(AppID == APP_ID_EDA) + { + AD5940EDAStructInit(); + printf("Switch to EDA application\n"); + } + else if(AppID == APP_ID_ECG) + { + AD5940ECGStructInit(); + printf("Switch to ECG application\n"); + } + else if(AppID == APP_ID_BIA) + { + AD5940BIAStructInit(); + printf("Switch to BIA application\n"); + } + else{ + printf("Wrong application ID.\n"); + return (uint32_t)-1; + } + + if(pCurrApp) + pCurrApp->pAppCtrl(APPCTRL_STOPSYNC, 0); + bSwitchingApp = 1; + toApp = AppID; + return 0; +} + diff --git a/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.ewd b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 3 + 1 + 1 + + + + + + + + + + + + + NULINK_ID + 2 + + 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$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.ewp b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.ewp new file mode 100644 index 0000000..7a92048 --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.ewp @@ -0,0 +1,2244 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + inputOutputBased + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 27 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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$PROJ_DIR$\ADICUP3029Port.c + + + + application + + $PROJ_DIR$\..\AD5940Main.c + + + $PROJ_DIR$\..\BodyImpedance.c + + + $PROJ_DIR$\..\Electrocardiograph.c + + + $PROJ_DIR$\..\ElectrodermalActivity.c + + + $PROJ_DIR$\main.c + + + $PROJ_DIR$\..\UARTCmd.c + + + + CMSIS-Pack + CMSISPack.Component + + $PROJ_DIR$\RTE\RTE_Components.h + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.rteconfig b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.uvoptx b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.uvoptx new file mode 100644 index 0000000..4dfad53 --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.uvoptx @@ -0,0 +1,337 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + wupt_cfg.SeqxSleepTime[0],0x0A + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BodyImpedance.c + BodyImpedance.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\Electrocardiograph.c + Electrocardiograph.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\ElectrodermalActivity.c + ElectrodermalActivity.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\UARTCmd.c + UARTCmd.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.uvprojx b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.uvprojx new file mode 100644 index 0000000..3b94caa --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/AD5940_BioElec.uvprojx @@ -0,0 +1,518 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BodyImpedance.c + 1 + ..\BodyImpedance.c + + + Electrocardiograph.c + 1 + ..\Electrocardiograph.c + + + ElectrodermalActivity.c + 1 + ..\ElectrodermalActivity.c + + + UARTCmd.c + 1 + ..\UARTCmd.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_BioElec/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_BioElec/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_BioElec/ADICUP3029/main.c b/examples/AD5940_BioElec/ADICUP3029/main.c new file mode 100644 index 0000000..d58b160 --- /dev/null +++ b/examples/AD5940_BioElec/ADICUP3029/main.c @@ -0,0 +1,173 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} + +void UART_Int_Handler(void) +{ + void UARTCmd_Process(char); + uint32_t flag; + flag = pADI_UART0->LSR; + flag = pADI_UART0->IIR; + if((flag & 0x0e) == 0x04) /* Receive Byte */ + { + uint32_t count; + count = pADI_UART0->RFC; /* Receive FIFO count */ + for(int i=0;i < count; i++) + { + char c; + c = pADI_UART0->COMRX&0xff; + UARTCmd_Process(c); + } + } + if((flag & 0x0e) == 0xc) /* Time-out */ + { + uint32_t count; + count = pADI_UART0->RFC; /* Receive FIFO count */ + for(int i=0;i < count; i++) + { + char c; + c = pADI_UART0->COMRX&0xff; + UARTCmd_Process(c); + } + } +} diff --git a/examples/AD5940_BioElec/BodyImpedance.c b/examples/AD5940_BioElec/BodyImpedance.c new file mode 100644 index 0000000..308354e --- /dev/null +++ b/examples/AD5940_BioElec/BodyImpedance.c @@ -0,0 +1,636 @@ +/*! + ***************************************************************************** + @file: BodyImpedance.c + @author: Neo Xu + @brief: Body impedance measurement sequences. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "BodyImpedance.h" + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppBIACfg_Type AppBIACfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ReDoRtiaCal = bFALSE, + .SysClkFreq = 16000000.0, + .LfoscClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .BiaODR = 20.0, /* 20.0 Hz*/ + .NumOfData = -1, + .RcalVal = 10000.0, /* 10kOhm */ + + .PwrMod = AFEPWR_LP, + .HstiaRtiaSel = HSTIARTIA_1K, + .CtiaSel = 16, + .ExcitBufGain = EXCITBUFGAIN_2, + .HsDacGain = HSDACGAIN_1, + .HsDacUpdateRate = 7, + .DacVoltPP = 800.0, + + .SinFreq = 50000.0, /* 50kHz */ + + .ADCPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .DftNum = DFTNUM_8192, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .SweepCfg.SweepEn = bFALSE, + .SweepCfg.SweepStart = 10000, + .SweepCfg.SweepStop = 150000.0, + .SweepCfg.SweepPoints = 100, + .SweepCfg.SweepLog = bTRUE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 4, + .BIAInited = bFALSE, + .StopRequired = bFALSE, + .bRunning = bFALSE, + .MeasSeqCycleCount = 0, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppBIAGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppBIACfg_Type**)pCfg = &AppBIACfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} +AD5940Err AppBIACtrl(int32_t BcmCtrl, void *pPara) +{ + switch (BcmCtrl) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppBIACfg.BIAInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = (uint32_t)(AppBIACfg.LfoscClkFreq/AppBIACfg.BiaODR)-2-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = 1; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + AD5940_WUPTCfg(&wupt_cfg); + + AppBIACfg.FifoDataCount = 0; /* restart */ + AppBIACfg.bRunning = bTRUE; +#ifdef ADI_DEBUG + ADI_Print("BIA Start...\n"); +#endif + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + AppBIACfg.bRunning = bFALSE; +#ifdef ADI_DEBUG + ADI_Print("BIA Stop Now...\n"); +#endif + break; + } + case APPCTRL_STOPSYNC: + { +#ifdef ADI_DEBUG + ADI_Print("BIA Stop SYNC...\n"); +#endif + AppBIACfg.StopRequired = bTRUE; + break; + } + case BIACTRL_GETFREQ: + if(pPara) + { + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppBIACfg.FreqofData; + else + *(float*)pPara = AppBIACfg.SinFreq; + } + break; + case APPCTRL_SHUTDOWN: + { + AppBIACtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ +#ifdef ADI_DEBUG + ADI_Print("BIA Shut down...\n"); +#endif + } + break; + case APPCTRL_RUNNING: + if(pPara == NULL) + return AD5940ERR_NULLP; /* Null pointer */ + *(BoolFlag*)pPara = AppBIACfg.bRunning; + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppBIASeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type hs_loop; + LPLoopCfg_Type lp_loop; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + //AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + hs_loop.HsDacCfg.ExcitBufGain = AppBIACfg.ExcitBufGain; + hs_loop.HsDacCfg.HsDacGain = AppBIACfg.HsDacGain; + hs_loop.HsDacCfg.HsDacUpdateRate = AppBIACfg.HsDacUpdateRate; + + hs_loop.HsTiaCfg.DiodeClose = bFALSE; + hs_loop.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hs_loop.HsTiaCfg.HstiaCtia = AppBIACfg.CtiaSel; /* 31pF + 2pF */ + hs_loop.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hs_loop.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + hs_loop.HsTiaCfg.HstiaRtiaSel = AppBIACfg.HstiaRtiaSel; + + hs_loop.SWMatCfg.Dswitch = SWD_OPEN; + hs_loop.SWMatCfg.Pswitch = SWP_PL|SWP_PL2; + hs_loop.SWMatCfg.Nswitch = SWN_NL|SWN_NL2; + hs_loop.SWMatCfg.Tswitch = SWT_TRTIA; + + hs_loop.WgCfg.WgType = WGTYPE_SIN; + hs_loop.WgCfg.GainCalEn = bFALSE; + hs_loop.WgCfg.OffsetCalEn = bFALSE; + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + AppBIACfg.SweepCfg.SweepIndex = 0; + AppBIACfg.FreqofData = AppBIACfg.SweepCfg.SweepStart; + AppBIACfg.SweepCurrFreq = AppBIACfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppBIACfg.SweepCfg, &AppBIACfg.SweepNextFreq); + sin_freq = AppBIACfg.SweepCurrFreq; + } + else + { + sin_freq = AppBIACfg.SinFreq; + AppBIACfg.FreqofData = sin_freq; + } + hs_loop.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppBIACfg.SysClkFreq); + hs_loop.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppBIACfg.DacVoltPP/800.0f*2047 + 0.5f); + hs_loop.WgCfg.SinCfg.SinOffsetWord = 0; + hs_loop.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&hs_loop); + + lp_loop.LpDacCfg.LpdacSel = LPDAC0; + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp_loop.LpDacCfg.DataRst = bFALSE; + lp_loop.LpDacCfg.PowerEn = bTRUE; + lp_loop.LpDacCfg.DacData12Bit = (uint32_t)((1100-200)/2200.0*4095); + lp_loop.LpDacCfg.DacData6Bit = 31; + + lp_loop.LpAmpCfg.LpAmpSel = LPAMP0; + lp_loop.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp_loop.LpAmpCfg.LpPaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaRf = LPTIARF_20K; + lp_loop.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lp_loop.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(6)|LPTIASW(7)|LPTIASW(8)|LPTIASW(9)|LPTIASW(12)|LPTIASW(13); + AD5940_LPLoopCfgS(&lp_loop); + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppBIACfg.ADCPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppBIACfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppBIACfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppBIACfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppBIACfg.InitSeqInfo.SeqId = SEQID_1; + AppBIACfg.InitSeqInfo.SeqRamAddr = AppBIACfg.SeqStartAddr; + AppBIACfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppBIACfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIACfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIASeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppBIACfg.DftSrc; + clks_cal.DataCount = 1L<<(AppBIACfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppBIACfg.SysClkFreq/AppBIACfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); + sw_cfg.Dswitch = SWD_CE0; + sw_cfg.Pswitch = SWP_CE0; + sw_cfg.Nswitch = SWN_AIN1; + sw_cfg.Tswitch = SWT_AIN1|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_ADCMuxCfgS(ADCMUXP_HSTIA_P, ADCMUXN_HSTIA_N); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + + AD5940_ADCMuxCfgS(ADCMUXP_AIN3, ADCMUXN_AIN2); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator, ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); //delay for signal settling DFT_WAIT + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + + sw_cfg.Dswitch = SWD_OPEN; + sw_cfg.Pswitch = SWP_PL|SWP_PL2; + sw_cfg.Nswitch = SWN_NL|SWN_NL2; + sw_cfg.Tswitch = SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); /* Float switches */ + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + AppBIACfg.MeasSeqCycleCount = AD5940_SEQCycleTime(); + AppBIACfg.MaxODR = 1/(((AppBIACfg.MeasSeqCycleCount + 10) / 16.0)* 1E-6) ; + if(AppBIACfg.BiaODR > AppBIACfg.MaxODR) + { + /* We have requested a sampling rate that cannot be achieved with the time it + takes to acquire a sample. + */ + AppBIACfg.BiaODR = AppBIACfg.MaxODR; + } + + if(error == AD5940ERR_OK) + { + AppBIACfg.MeasureSeqInfo.SeqId = SEQID_0; + AppBIACfg.MeasureSeqInfo.SeqRamAddr = AppBIACfg.InitSeqInfo.SeqRamAddr + AppBIACfg.InitSeqInfo.SeqLen ; + AppBIACfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppBIACfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppBIACfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppBIARtiaCal(void) +{ + HSRTIACal_Type hsrtia_cal; + + hsrtia_cal.AdcClkFreq = AppBIACfg.AdcClkFreq; + hsrtia_cal.ADCSinc2Osr = AppBIACfg.ADCSinc2Osr; + hsrtia_cal.ADCSinc3Osr = AppBIACfg.ADCSinc3Osr; + hsrtia_cal.bPolarResult = bTRUE; /* We need magnitude and phase here */ + hsrtia_cal.DftCfg.DftNum = AppBIACfg.DftNum; + hsrtia_cal.DftCfg.DftSrc = AppBIACfg.DftSrc; + hsrtia_cal.DftCfg.HanWinEn = AppBIACfg.HanWinEn; + hsrtia_cal.fRcal= AppBIACfg.RcalVal; + hsrtia_cal.HsTiaCfg.DiodeClose = bFALSE; + hsrtia_cal.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + hsrtia_cal.HsTiaCfg.HstiaCtia = AppBIACfg.CtiaSel; + hsrtia_cal.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + hsrtia_cal.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_TODE; + hsrtia_cal.HsTiaCfg.HstiaRtiaSel = AppBIACfg.HstiaRtiaSel; + hsrtia_cal.SysClkFreq = AppBIACfg.SysClkFreq; + hsrtia_cal.fFreq = AppBIACfg.SweepCfg.SweepStart; + + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + uint32_t i; + AppBIACfg.SweepCfg.SweepIndex = 0; /* Reset index */ + for(i=0;i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Do RTIA calibration */ + + if((AppBIACfg.ReDoRtiaCal == bTRUE) || \ + AppBIACfg.BIAInited == bFALSE) /* Do calibration on the first initializaion */ + { + AppBIARtiaCal(); + AppBIACfg.ReDoRtiaCal = bFALSE; + } + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppBIACfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppBIACfg.BIAInited == bFALSE)||\ + (AppBIACfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppBIASeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppBIASeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppBIACfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppBIACfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIACfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppBIACfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppBIACfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppBIACfg.MeasureSeqInfo); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppBIACfg.PwrMod, AFEBW_250KHZ); + AD5940_WriteReg(REG_AFE_SWMUX, 1<<3); + AppBIACfg.BIAInited = bTRUE; /* BIA application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppBIARegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppBIACfg.NumOfData > 0) + { + AppBIACfg.FifoDataCount += *pDataCount/4; + if(AppBIACfg.FifoDataCount >= AppBIACfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppBIACfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + AppBIACfg.StopRequired = bFALSE; + AppBIACfg.bRunning = bFALSE; + return AD5940ERR_OK; + } + if(AppBIACfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AD5940_WGFreqCtrlS(AppBIACfg.SweepNextFreq, AppBIACfg.SysClkFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppBIADataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/4; + + fImpPol_Type * const pOut = (fImpPol_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/4)*4;/* We expect RCAL data together with Rz data. One DFT result has two data in FIFO, real part and imaginary part. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal*pDftVolt->Real+(float)pDftVolt->Image*pDftVolt->Image); + VoltPhase = atan2(-pDftVolt->Image,pDftVolt->Real); + CurrMag = sqrt((float)pDftCurr->Real*pDftCurr->Real+(float)pDftCurr->Image*pDftCurr->Image); + CurrPhase = atan2(-pDftCurr->Image,pDftCurr->Real); + + VoltMag = VoltMag/CurrMag*AppBIACfg.RtiaCurrValue[0]; + VoltPhase = VoltPhase - CurrPhase + AppBIACfg.RtiaCurrValue[1]; + //printf("V:%d,%d,I:%d,%d ",pDftVolt->Real,pDftVolt->Image, pDftCurr->Real, pDftCurr->Image); + + pOut[i].Magnitude = VoltMag; + pOut[i].Phase = VoltPhase; + } + *pDataCount = ImpResCount; + /* Calculate next frequency point */ + if(AppBIACfg.SweepCfg.SweepEn == bTRUE) + { + AppBIACfg.FreqofData = AppBIACfg.SweepCurrFreq; + AppBIACfg.SweepCurrFreq = AppBIACfg.SweepNextFreq; + AppBIACfg.RtiaCurrValue[0] = AppBIACfg.RtiaCalTable[AppBIACfg.SweepCfg.SweepIndex][0]; + AppBIACfg.RtiaCurrValue[1] = AppBIACfg.RtiaCalTable[AppBIACfg.SweepCfg.SweepIndex][1]; + AD5940_SweepNext(&AppBIACfg.SweepCfg, &AppBIACfg.SweepNextFreq); + } + return AD5940ERR_OK; +} + +/** + +*/ +AD5940Err AppBIAISR(void *pBuff, uint32_t *pCount) +{ + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + if(AppBIACfg.BIAInited == bFALSE) + return AD5940ERR_APPERROR; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Don't enter hibernate */ + *pCount = 0; + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppBIARegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter hibernate mode */ + /* Process data */ + AppBIADataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + + diff --git a/examples/AD5940_BioElec/BodyImpedance.h b/examples/AD5940_BioElec/BodyImpedance.h new file mode 100644 index 0000000..4e4c437 --- /dev/null +++ b/examples/AD5940_BioElec/BodyImpedance.h @@ -0,0 +1,98 @@ +/*! + ***************************************************************************** + @file: BodyImpedance.h + @author: Neo Xu + @brief: 4-wire body impedance measurement header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _BODYCOMPOSITION_H_ +#define _BODYCOMPOSITION_H_ +#include "ad5940.h" +#include "stdio.h" +#include "string.h" +#include "math.h" + +#define MAXSWEEP_POINTS 100 /* Need to know how much buffer is needed to save RTIA calibration result */ + +/* + Note: this example will use SEQID_0 as measurement sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration. +*/ + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + //BoolFlag bBioElecBoard; /* The code is same for BioElec board and AD5941Sens1 board. No changes are needed */ + BoolFlag ReDoRtiaCal; /* Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /* The real frequency of system clock */ + float LfoscClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ + float BiaODR; /* in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically. DFT number and sample frequency decides the maxim ODR. */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float SinFreq; /* Frequency of excitation signal */ + float RcalVal; /* Rcal value in Ohm */ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + float DacVoltPP; /* Final excitation voltage is DAC_VOLTpp*DAC_PGA*EXCIT_GAIN, DAC_PGA= 1 or 0.2, EXCIT_GAIN=2 or 0.25. DAC output voltage in mV peak to peak. Maximum value is 800mVpp. Peak to peak voltage */ + uint32_t ExcitBufGain; /* Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; /* DAC update rate is SystemCLoock/Divider. The available value is 7 to 255. Set to 7 for better performance */ + uint32_t ADCPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /* SINC3 OSR selection. ADCSINC3OSR_2, ADCSINC3OSR_4 */ + uint8_t ADCSinc2Osr; /* SINC2 OSR selection. ADCSINC2OSR_22...ADCSINC2OSR_1333 */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t CtiaSel; /* Select CTIA in pF unit from 0 to 31pF */ + + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + float RtiaCurrValue[2]; /* Calibrated Rtia value of current frequency */ + float RtiaCalTable[MAXSWEEP_POINTS][2]; /* Calibrated Rtia Value table */ + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag BIAInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + BoolFlag bRunning; /**< status of if app is running. Useful when send STOP_SYNC to detect if it's actually stopped. */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ + uint32_t MeasSeqCycleCount; /* How long the measurement sequence will take */ + float MaxODR; /* Max ODR for sampling in this config */ +/* End */ +}AppBIACfg_Type; + +#ifndef APPCTRL_START +/* Common application control message */ +#define APPCTRL_START 0 /**< Start the measurement by starting Wakeup Timer */ +#define APPCTRL_STOPNOW 1 /**< Stop immediately by stop Wakeup Timer*/ +#define APPCTRL_STOPSYNC 2 /**< Stop the measurement when interrupt occurred */ +#define APPCTRL_SHUTDOWN 3 /**< Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ +#define APPCTRL_RUNNING 4 /**< Is application running? */ +#endif + +#define BIACTRL_GETFREQ 100 /* Get Current frequency of returned data from ISR */ + +AD5940Err AppBIAGetCfg(void *pCfg); +AD5940Err AppBIAInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppBIAISR(void *pBuff, uint32_t *pCount); +AD5940Err AppBIACtrl(int32_t BcmCtrl, void *pPara); + +#endif diff --git a/examples/AD5940_BioElec/Electrocardiograph.c b/examples/AD5940_BioElec/Electrocardiograph.c new file mode 100644 index 0000000..948b0fd --- /dev/null +++ b/examples/AD5940_BioElec/Electrocardiograph.c @@ -0,0 +1,396 @@ +/*! + ***************************************************************************** + @file: Electrocardiograph.c + @author: Neo Xu + @brief: ECG Measurement. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "Electrocardiograph.h" + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppECGCfg_Type AppECGCfg = +{ + .bParaChanged = bFALSE, + .bBioElecBoard = bTRUE, + .SeqStartAddr = 0, + .MaxSeqLen = 512, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 512, + + .ECGODR = 1000.0, /* 1000.0 Hz*/ + .NumOfData = -1, + .FifoThresh = 100, + + .LfoscClkFreq = 32000.0, + .SysClkFreq = 16000000.0, + .AdcClkFreq = 16000000.0, + .PwrMod = AFEPWR_LP, + + .AdcPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .ECGInited = bFALSE, + .StopRequired = bFALSE, + .bRunning = bFALSE, + .FifoDataCount = 0, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppECGGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppECGCfg_Type**)pCfg = &AppECGCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +int32_t AppECGCtrl(int32_t Command, void *pPara) +{ + + switch (Command) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppECGCfg.ECGInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppECGCfg.LfoscClkFreq/AppECGCfg.ECGODR)-4-1; + AD5940_WUPTCfg(&wupt_cfg); + + AppECGCfg.FifoDataCount = 0; /* restart */ + AppECGCfg.bRunning = bTRUE; + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + AppECGCfg.bRunning = bFALSE; + break; + } + case APPCTRL_STOPSYNC: + { + AppECGCfg.StopRequired = bTRUE; + break; + } + case APPCTRL_SHUTDOWN: + { + AppECGCtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + case APPCTRL_RUNNING: + if(pPara == NULL) + return AD5940ERR_NULLP; /* Null pointer */ + *(BoolFlag*)pPara = AppECGCfg.bRunning; + break; + default: break; + } + return AD5940ERR_OK; +} + +/* Application initialization */ +static AD5940Err AppECGSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + SWMatrixCfg_Type sw_matrix; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; /* The High speed buffers are automatically turned off during hibernate */ + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bFALSE; + aferef_cfg.LpRefBufEn = bFALSE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + /* Initialize ADC basic function */ + adc_base.ADCMuxP = ADCMUXP_AIN6; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + adc_base.ADCPga = AppECGCfg.AdcPgaGain; + AD5940_ADCBaseCfgS(&adc_base); + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH */ + adc_filter.ADCSinc3Osr = AppECGCfg.ADCSinc3Osr; + adc_filter.ADCSinc2Osr = AppECGCfg.ADCSinc2Osr; + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + + sw_matrix.Dswitch = SWD_OPEN; + sw_matrix.Pswitch = SWP_RE0|SWP_RE1|SWP_DE0; + sw_matrix.Nswitch = SWN_AIN2|SWN_SE0; + sw_matrix.Tswitch = SWT_AIN0|SWT_AFE3LOAD; + AD5940_SWMatrixCfgS(&sw_matrix); + + AD5940_AFECtrlS(AFECTRL_HPREFPWR, bTRUE); /* Enable reference. It's automatically turned off during hibernate */ + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_SEQGpioCtrlS(/*AGPIO_Pin6|*/AGPIO_Pin5|AGPIO_Pin1); /* GP6 to indicate sequencer is running. GP5 to disable AD8233. GP1 to enable AD8233 RLD function. */ + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppECGCfg.InitSeqInfo.SeqId = SEQID_1; + AppECGCfg.InitSeqInfo.SeqRamAddr = AppECGCfg.SeqStartAddr; + AppECGCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppECGCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppECGCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppECGSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_SINC3; + clks_cal.DataCount = 1; /* Sample one data when wakeup */ + clks_cal.ADCSinc2Osr = AppECGCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppECGCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppECGCfg.SysClkFreq/AppECGCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + //printf("Wait clocks:%d\n", WaitClks); + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_SEQGenInsert(SEQ_WAIT(16*200)); /* Time for reference settling.*/ + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); + //wait for first data ready + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_SEQGpioCtrlS(/*AGPIO_Pin6|*/AGPIO_Pin5|AGPIO_Pin1); /* GP6 to indicate sequencer is running. GP5 to enable AD8233. GP1 to enable AD8233 RLD function. */ + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppECGCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppECGCfg.MeasureSeqInfo.SeqRamAddr = AppECGCfg.InitSeqInfo.SeqRamAddr + AppECGCfg.InitSeqInfo.SeqLen ; + AppECGCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppECGCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM. The buffer 'pSeqCmd' will be used to generate next sequence */ + AD5940_SEQCmdWrite(AppECGCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/* This function provide application initialize. It can also enable Wupt that will automatically trigger sequence. Or it can configure */ +int32_t AppECGInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + + SEQCfg_Type seq_cfg; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + AD5940_FIFOThrshSet(AppECGCfg.FifoThresh); + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bTRUE); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppECGCfg.ECGInited == bFALSE)||\ + (AppECGCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppECGSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppECGSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppECGCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppECGCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppECGCfg.InitSeqInfo); + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppECGCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppECGCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppECGCfg.MeasureSeqInfo); + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger. It's disabled in initialization sequence */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppECGCfg.PwrMod, AFEBW_250KHZ); + + AppECGCfg.ECGInited = bTRUE; /* ECG application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +int32_t AppECGRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppECGCfg.NumOfData > 0) + { + AppECGCfg.FifoDataCount += *pDataCount/4; + if(AppECGCfg.FifoDataCount >= AppECGCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppECGCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + AppECGCfg.StopRequired = bFALSE; + AppECGCfg.bRunning = bFALSE; + return AD5940ERR_OK; + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static int32_t AppECGDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + + *pDataCount = 0; + + /* Get ADC result */ + for(uint32_t i=0; i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* We are operating registers, so we don't allow AFE enter sleep mode which is done in our sequencer */ + *pCount = 0; + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = AD5940_FIFOGetCnt(); + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppECGRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter sleep mode. AFE will stay at active mode until sequencer trigger sleep */ + /* AD5940_EnterSleepS(); // We cannot manually put AFE to hibernate because it's possible sequencer is running to take measurements */ + /* Process data */ + AppECGDataProcess(pBuff,&FifoCnt); + *pCount = FifoCnt; + return AD5940ERR_OK; + } + + return AD5940ERR_OK; +} + + diff --git a/examples/AD5940_BioElec/Electrocardiograph.h b/examples/AD5940_BioElec/Electrocardiograph.h new file mode 100644 index 0000000..04b2157 --- /dev/null +++ b/examples/AD5940_BioElec/Electrocardiograph.h @@ -0,0 +1,67 @@ +/*! + ***************************************************************************** + @file: Electrocardiograph.h + @author: Neo Xu + @brief: ECG measurement. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _ELETROCARDIOAGRAPH_H_ +#define _ELETROCARDIOAGRAPH_H_ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + BoolFlag bBioElecBoard; /* Indicate if the board is Bioelec board. 0: AD5941Sens1 board, 1: AD5940-BioElec */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Calibration sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + float ECGODR; /* Must be less than 1500Hz. Sample frequency in Hz, this value is used to set Sleep Wakeup Timer period */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ + + float LfoscClkFreq; /* The clock frequency of internal LFOSC in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /* The real frequency of system clock */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + + uint32_t AdcPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint32_t ADCSinc3Osr; + uint32_t ADCSinc2Osr; +/* Private variables for internal usage */ + BoolFlag ECGInited; /* If the program run firstly, generated sequence commands */ + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + BoolFlag bRunning; /**< status of if app is running. Useful when send STOP_SYNC to detect if it's actually stopped. */ + uint32_t FifoDataCount; /* How many data we have got from start. */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; +}AppECGCfg_Type; + +#ifndef APPCTRL_START +#define APPCTRL_START 0 /**< Start the measurement by starting Wakeup Timer */ +#define APPCTRL_STOPNOW 1 /**< Stop immediately by stop Wakeup Timer*/ +#define APPCTRL_STOPSYNC 2 /**< Stop the measurement when interrupt occurred */ +#define APPCTRL_SHUTDOWN 3 /**< Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ +#define APPCTRL_RUNNING 4 /**< Is application running? */ + +#endif + +AD5940Err AppECGGetCfg(void *pCfg); +AD5940Err AppECGInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppECGISR(void *pBuff, uint32_t *pCount); +AD5940Err AppECGCtrl(int32_t Command, void *pPara); + +#endif diff --git a/examples/AD5940_BioElec/ElectrodermalActivity.c b/examples/AD5940_BioElec/ElectrodermalActivity.c new file mode 100644 index 0000000..f697986 --- /dev/null +++ b/examples/AD5940_BioElec/ElectrodermalActivity.c @@ -0,0 +1,874 @@ +/*! + ***************************************************************************** + @file: ElectrodermalActivity.c + @author: Neo Xu + @brief: EDA measurement sequences. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ElectrodermalActivity.h" + +/** @addtogroup AD5940_System_Examples + * @{ + * @defgroup EDA_Example + * @brief This example is used to measure skin impedance. The main feature of this example is ultra low power consumption. + * @details + * @note Need to update code when runs at S2 silicon. + * + * + * + * @{ + * */ + +/** + * @brief The EDA application paramters. + * @details Do not modify following default parameters. Use the function in AD5940Main.c to change it. + * + * */ +AppEDACfg_Type AppEDACfg = +{ +/* Common configurations for all kinds of Application. */ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, +/* Application related parameters */ + .bBioElecBoard = bTRUE, + .ReDoRtiaCal = bFALSE, + .SysClkFreq = 16000000.0, + .LfoscClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .FifoThresh = 4, + .EDAODR = 4.0, /* 20.0 Hz*/ + .NumOfData = -1, + .VoltCalPoints = 8, + .RcalVal = 10000.0, /* 10kOhm */ + .SinFreq = 100.0, /* 100Hz */ + .SampleFreq = 400.0, /* 400Hz */ + .SinAmplitude = 1100.0f/2, /* 1100mV peak */ + .DacUpdateRate = 7, + .LptiaRtiaSel = LPTIARTIA_100K, + + .DftNum = DFTNUM_16, + .HanWinEn = bTRUE, + + .RtiaAutoScaleEnable = bTRUE, + .RtiaAutoScaleMax = LPTIARTIA_512K, + .RtiaAutoScaleMin = LPTIARTIA_1K, + + .RtiaIndexCurr = 0, + .RtiaIndexNext = 0, + .bChangeRtia = bFALSE, + + /* private varaibles */ + .SeqPatchInfo ={ + .BuffLen = 32, + .pSeqCmd = NULL, + }, + .ImpEDABase = {0,0}, + .ImpSum = {0,0}, + .EDAInited = bFALSE, + .StopRequired = bFALSE, + .bRunning = bFALSE, + .bMeasVoltReq = bFALSE, + .EDAStateCurr = EDASTATE_INIT, + .EDAStateNext = EDASTATE_INIT, +}; + +/** + * @brief This function is provided for upper controllers that want to change + * application parameters specially for user defined parameters. + * @param pCfg: The pointer used to store application configuration structure pointer. + * @return none. +*/ +AD5940Err AppEDAGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppEDACfg_Type**)pCfg = &AppEDACfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +/** + * @brief Control application like start, stop. + * @param Command: The command for this application, select from below paramters + * - APPCTRL_START: start the measurement. Note: the ramp test need firstly call function AppRAMPInit() every time before start it. + * - APPCTRL_STOPNOW: Stop the measurement immediately. + * - APPCTRL_STOPSYNC: Stop the measuremnt when current measured data is read back. + * - APPCTRL_SHUTDOWN: Stop the measurement immediately and put AFE to shut down mode(turn off LP loop and enter hibernate). + * - EDACTRL_MEASVOLT: Measure voltage once current measurement is done(Interrupt occurred). + * - EDACTRL_GETRTIAMAG: Get current RTIA value. + * @return none. +*/ +AD5940Err AppEDACtrl(int32_t EDACtrl, void *pPara) +{ + switch (EDACtrl) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppEDACfg.EDAInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = (uint32_t)(AppEDACfg.LfoscClkFreq/AppEDACfg.EDAODR)-2-4; + wupt_cfg.SeqxWakeupTime[SEQID_0] = 4; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + AD5940_WUPTCfg(&wupt_cfg); + AppEDACfg.FifoDataCount = 0; /* restart */ + AppEDACfg.bRunning = bTRUE; + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + AppEDACfg.bRunning = bFALSE; + break; + } + case APPCTRL_STOPSYNC: + { + AppEDACfg.StopRequired = bTRUE; + break; + } + case APPCTRL_SHUTDOWN: + { + AppEDACtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPLoop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + case EDACTRL_MEASVOLT: + AppEDACfg.bMeasVoltReq = bTRUE; + break; + case EDACTRL_GETRTIAMAG: + if(pPara == NULL) + return AD5940ERR_NULLP; /* Null pointer */ + *(float*)pPara = AD5940_ComplexMag(&AppEDACfg.RtiaCurrValue); + break; + case EDACTRL_RSTBASE: + AppEDACfg.ImpEDABase.Real = 0; + AppEDACfg.ImpEDABase.Image = 0; + AppEDACfg.ImpSum.Real = 0; + AppEDACfg.ImpSum.Image = 0; + AppEDACfg.ImpSumCount = 0; + break; + case EDACTRL_SETBASE: + { + fImpCar_Type *pImpBase = (fImpCar_Type *)pPara; /* The impedance used to set base line */ + AppEDACfg.ImpEDABase = *pImpBase; + } + break; + case EDACTRL_GETAVR: + if(pPara == NULL) return AD5940ERR_NULLP; + { + fImpCar_Type *pImpAVR = (fImpCar_Type *)pPara; + pImpAVR->Real = AppEDACfg.ImpSum.Real/AppEDACfg.ImpSumCount; + pImpAVR->Image = AppEDACfg.ImpSum.Image/AppEDACfg.ImpSumCount; + break; + } + case APPCTRL_RUNNING: + case EDACTRL_STATUS: + if(pPara == NULL) + return AD5940ERR_NULLP; /* Null pointer */ + *(BoolFlag*)pPara = AppEDACfg.bRunning; + break; + default: + break; + } + return AD5940ERR_OK; +} + +/** + * @brief Generate initialization sequence and write the commands to SRAM. + * @return return error code. +*/ +static AD5940Err AppEDASeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + HSDACCfg_Type hsdac_cfg; /* Waveform Generator uses some parameter(DAC update rate) from HSDAC config registers */ + LPLoopCfg_Type lp_loop; + WGCfg_Type wg_cfg; + DSPCfg_Type dsp_cfg; + SWMatrixCfg_Type sw_cfg; + + AD5940_SEQGenCtrl(bTRUE); + /* Sequence starts here */ + AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5*/|AGPIO_Pin1); + AD5940_StructInit(&aferef_cfg, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); /* Turn off all references, we only enable it when we need it. */ + + AD5940_StructInit(&lp_loop, sizeof(lp_loop)); /* Disable everything, configure them during measurement */ + AD5940_LPLoopCfgS(&lp_loop); + + AD5940_StructInit(&wg_cfg, sizeof(wg_cfg)); + wg_cfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppEDACfg.SinAmplitude/1100.0f*2047); /* Maximum amplitude is 1100mV */ + wg_cfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(AppEDACfg.SinFreq, AppEDACfg.LfoscClkFreq); + wg_cfg.SinCfg.SinPhaseWord = 0; + wg_cfg.WgType = WGTYPE_SIN; + AD5940_WGCfgS(&wg_cfg); + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); + + /* Switch configuration for BioElec board */ + sw_cfg.Dswitch = SWD_OPEN; /* Open all switch D */ + sw_cfg.Pswitch = SWP_AIN2|SWP_SE0; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_AIN0|SWT_AFE3LOAD; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_StructInit(&dsp_cfg, sizeof(dsp_cfg)); + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_VSET1P1; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_AIN4; + dsp_cfg.ADCBaseCfg.ADCPga = ADCPGA_1; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_4; /* We use averaged SINC3 output as DFT input source */ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = ADCSINC2OSR_22; /* Don't care */ + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = ADCSINC3OSR_5; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bFALSE; + dsp_cfg.DftCfg.DftNum = AppEDACfg.DftNum; + dsp_cfg.DftCfg.DftSrc = DFTSRC_AVG; /* Use averaged SINC3 data */ + dsp_cfg.DftCfg.HanWinEn = AppEDACfg.HanWinEn; + AD5940_DSPCfgS(&dsp_cfg); + AD5940_ADCRepeatCfgS(5*(4+2)+1); /* (n+2)*osr + 1, n=4,osr=5*/ + hsdac_cfg.ExcitBufGain = EXCITBUFGAIN_2; + hsdac_cfg.HsDacGain = HSDACGAIN_1; + hsdac_cfg.HsDacUpdateRate = AppEDACfg.DacUpdateRate; /* Note: the DAC update rate is decided by register DACON.RATE */ + AD5940_HSDacCfgS(&hsdac_cfg); + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + /* Stop here */ + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(error == AD5940ERR_OK) + { + AppEDACfg.InitSeqInfo.SeqId = SEQID_1; + AppEDACfg.InitSeqInfo.SeqRamAddr = AppEDACfg.SeqStartAddr; + AppEDACfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppEDACfg.InitSeqInfo.SeqLen = SeqLen; + AppEDACfg.InitSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppEDACfg.InitSeqInfo); /* Write command to SRAM */ + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/** + * @brief Generate patch sequence according to current measurement type(Voltage or Current). + * @details The patch is used to adjust sequencer commands already stored in SRAM of AD5940 in order to perform different measurements. + * The reason is that the sequences need to be adjusted. Using the patch method will make things easily and we won't need to modify + * sequences in register level. + * @param pPatch: pointer to patch information include the measurement type, Rtia selection and buffers. + * @return return error code. +*/ +static AD5940Err ApPEDASeqPatchGen(SeqPatchInfo_Type *pPatch) +{ + AD5940Err err; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + LPAmpCfg_Type lpamp_cfg; + AD5940_SEQGenInit(pPatch->Buffer, pPatch->BuffLen); + AD5940_SEQGenCtrl(bTRUE); + lpamp_cfg.LpAmpSel = LPAMP0; + lpamp_cfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Use normal power mode is enough */ + lpamp_cfg.LpPaPwrEn = bTRUE; /* Enable Potential amplifier */ + lpamp_cfg.LpTiaPwrEn = bTRUE; /* Enable TIA amplifier */ + lpamp_cfg.LpTiaRf = LPF_RF; /* Rf resistor controls cut off frequency. */ + lpamp_cfg.LpTiaRload = LPTIARLOAD_100R; /** @note Use 100Ohm Rload. */ + lpamp_cfg.LpTiaRtia = pPatch->RtiaSel; /* If autoscaling is enabled, use selected value. */ + if(pPatch->Type == PATCHTYPE_VOLT) + lpamp_cfg.LpTiaSW = LPTIASW_VOLT; /* Switch settings for voltage measurement */ + else if(pPatch->Type == PATCHTYPE_CURR) + lpamp_cfg.LpTiaSW = LPTIASW_CURR; /* Switch settings for current measurement */ + AD5940_LPAMPCfgS(&lpamp_cfg); + AD5940_SEQGenCtrl(bFALSE); + err = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(err != AD5940ERR_OK) + return err; + pPatch->pSeqCmd = pSeqCmd; + pPatch->SeqLen = SeqLen; + return AD5940ERR_OK; +} + +/** + * @brief Generate measurement sequence and write the commands to SRAM. + * @return return error code. +*/ +static AD5940Err AppEDASeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + uint32_t i; + uint32_t DFTNumber; + + LPDACCfg_Type lpdac_cfg; + LPAmpCfg_Type lpamp_cfg; + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + /* Stage I: Initialization */ + AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + /* LP loop configure: LPDAC and LPAMP */ + lpdac_cfg.LpdacSel = LPDAC0; + lpdac_cfg.DataRst = bFALSE; + lpdac_cfg.LpDacSW = LPDACSW_VBIAS2LPPA/*|LPDACSW_VBIAS2PIN*/|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lpdac_cfg.LpDacRef = LPDACREF_2P5; /* Use internal 2.5V reference */ + lpdac_cfg.LpDacSrc = LPDACSRC_WG; /* Use data from waveform generator */ + lpdac_cfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lpdac_cfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Use 6bit LPDAC for Vzero */ + lpdac_cfg.PowerEn = bTRUE; /* Enable LPDAC */ + lpdac_cfg.DacData12Bit = 0; /* Don't care, 12bit DAC data is from WG */ + lpdac_cfg.DacData6Bit = 32; /* Set it to middle scale of LPDAC. Vzero is the bias voltage of LPTIA amplifier */ + AD5940_LPDACCfgS(&lpdac_cfg); + + /* Voltage and current measurement need different switch settings, record the difference and only modify this part for different purpose */ + error = AD5940_SEQGenFetchSeq(NULL, &AppEDACfg.SeqPatchInfo.SRAMAddr); /* Record the start address of below commands */ + if(error != AD5940ERR_OK) + return error; + + lpamp_cfg.LpAmpSel = LPAMP0; + lpamp_cfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Use normal power mode is enough */ + lpamp_cfg.LpPaPwrEn = bTRUE; /* Enable Potential amplifier */ + lpamp_cfg.LpTiaPwrEn = bTRUE; /* Enable TIA amplifier */ + lpamp_cfg.LpTiaRf = LPF_RF; /* Rf resistor controls cut off frequency. */ + lpamp_cfg.LpTiaRload = LPTIARLOAD_100R; /** @note Use 100Ohm Rload. */ + lpamp_cfg.LpTiaRtia = AppEDACfg.LptiaRtiaSel; /* If autoscaling is enabled, use seleted value. */ + lpamp_cfg.LpTiaSW = LPTIASW_VOLT; /* Swtich settings for voltage measurement */ + AD5940_LPAMPCfgS(&lpamp_cfg); + + AD5940_WriteReg(REG_AFE_LPREFBUFCON, 0); /* Enable low power bandgap and 2.5V reference buffer */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Off everything */ + + AD5940_LPModeEnS(bTRUE); /* Enter LP control mode. The registers are summarized to LPMODECON, so we can control some blocks convenniently */ + AD5940_LPModeClkS(LPMODECLK_LFOSC); /* Trigger switching system clock to 32kHz */ + AD5940_LPModeCtrlS(LPMODECTRL_NONE); /* Disable all */ + AD5940_AFECtrlS(AFECTRL_WG, bTRUE); /* Start waveform generator */ + AD5940_SEQGenInsert(SEQ_WAIT(LPF_TIME*32)); /* wait for stable */ + AD5940_AFECtrlS(AFECTRL_DFT, bTRUE); /* Enable DFT engine */ + + /* Stage II: ADC Run to sample enough data(DFT number) */ + DFTNumber = (1<<(AppEDACfg.DftNum +2)); + for(i=0;iendSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_EnterSleepS();/* Go to hibernate */ + + /* Sequence end. */ + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(error == AD5940ERR_OK) + { + if(AppEDACfg.MaxSeqLen < (SeqLen + AppEDACfg.InitSeqInfo.SeqLen)) + return AD5940ERR_BUFF; /* Buffer limited */ + AppEDACfg.MeasureSeqInfo.SeqId = SEQID_0; + AppEDACfg.MeasureSeqInfo.SeqRamAddr = AppEDACfg.InitSeqInfo.SeqRamAddr + AppEDACfg.InitSeqInfo.SeqLen ; + AppEDACfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppEDACfg.MeasureSeqInfo.SeqLen = SeqLen; + AppEDACfg.MeasureSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppEDACfg.MeasureSeqInfo); /* Write command to SRAM */ + /* Record where the patch should be applied. */ + AppEDACfg.SeqPatchInfo.SRAMAddr += AppEDACfg.MeasureSeqInfo.SeqRamAddr; /* The start address in AD5940 SRAM */ + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/** + * @brief Calibrate LPTIA internal RTIA resistor(s). + * @details This function will do calibration using parameters stored in @ref AppEDACfg structure. + * @return return error code. +*/ +static AD5940Err AppEDARtiaCal(void) +{ + fImpCar_Type RtiaCalValue; /* Calibration result */ + LPRTIACal_Type lprtia_cal; + AD5940_StructInit(&lprtia_cal, sizeof(lprtia_cal)); + + lprtia_cal.LpAmpSel = LPAMP0; + lprtia_cal.bPolarResult = bFALSE; /* Real + Image */ + lprtia_cal.AdcClkFreq = AppEDACfg.AdcClkFreq; + lprtia_cal.SysClkFreq = AppEDACfg.SysClkFreq; + lprtia_cal.ADCSinc3Osr = ADCSINC3OSR_4; + lprtia_cal.ADCSinc2Osr = ADCSINC2OSR_22; /* We don't use SINC2 for now. */ + lprtia_cal.DftCfg.DftNum = DFTNUM_2048; /* Maximum DFT number */ + lprtia_cal.DftCfg.DftSrc = DFTSRC_SINC2NOTCH; + lprtia_cal.DftCfg.HanWinEn = bTRUE; + lprtia_cal.fFreq = AppEDACfg.SinFreq; + lprtia_cal.fRcal = AppEDACfg.RcalVal; + lprtia_cal.bWithCtia = bTRUE; + lprtia_cal.LpAmpPwrMod = LPAMPPWR_NORM; + lprtia_cal.bWithCtia = bTRUE; + lprtia_cal.LpTiaRtia = AppEDACfg.LptiaRtiaSel; + if(AppEDACfg.RtiaAutoScaleEnable == bTRUE) + { + int i = AppEDACfg.RtiaAutoScaleMin; + for(;i<=AppEDACfg.RtiaAutoScaleMax; i++) + { + lprtia_cal.LpTiaRtia = i; + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppEDACfg.RtiaCalTable[i] = RtiaCalValue; + //printf("Rtia%d,%f,%f\n", i, RtiaCalValue.Real, RtiaCalValue.Image); + } + AppEDACfg.RtiaCurrValue = AppEDACfg.RtiaCalTable[AppEDACfg.RtiaIndexCurr]; + } + else + { + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppEDACfg.RtiaCurrValue = RtiaCalValue; + //printf("Rtia,%f,%f\n", RtiaCalValue.Real, RtiaCalValue.Image); + //printf("Rtia calibration done\n"); + } + return AD5940ERR_OK; +} + +/** + * @brief Initialize the EDA measurement. + * @details This function must be called before start measurement. It will initialize all needed hardwares and put AD5940 to ready state. + * The application parameters stored in @ref AppEDACfg can be changed. Call this function to re-initialize AD5940 with new parameters. + * @param pBuffer: the buffer for sequencer generator. Only need to provide it for the first time. + * @param BufferSize: The buffer size start from pBuffer. + * @return return error code. +*/ +AD5940Err AppEDAInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + AppEDACfg.EDAStateCurr = EDASTATE_INIT; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + /* Do RTIA calibration */ + if((AppEDACfg.ReDoRtiaCal == bTRUE) || \ + AppEDACfg.EDAInited == bFALSE) /* Do calibration on the first initialization */ + { + AppEDACfg.EDAStateCurr = EDASTATE_RTIACAL; + AppEDARtiaCal(); + AppEDACfg.ReDoRtiaCal = bFALSE; + //AppEDAMeasureRserial(); + } + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppEDACfg.VoltCalPoints*2; /* The first measurement is for excitation voltage. */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppEDACfg.EDAInited == bFALSE)||\ + (AppEDACfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppEDASeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppEDASeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppEDACfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequence */ + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, run initialization sequence */ + AD5940_SEQMmrTrig(AppEDACfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Apply patch for voltage measurement */ + AppEDACfg.EDAStateCurr = EDASTATE_VOLT; /* After initialization, the first thing is to measure excitation voltage */ + AppEDACfg.RtiaIndexCurr = AppEDACfg.RtiaIndexNext = AppEDACfg.LptiaRtiaSel; /* Init with a value */ + AppEDACfg.SeqPatchInfo.RtiaSel = LPTIARTIA_OPEN;//AppEDACfg.RtiaIndexCurr; + //AppEDACfg.SeqPatchInfo.bMeasureVolt = bTRUE; + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_VOLT; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + AD5940_WriteReg(REG_AFE_SWMUX, 0x01); /**@todo remove it? close switch SW1 */ + + if(AppEDACfg.RtiaAutoScaleMin > AppEDACfg.RtiaAutoScaleMax) + { + uint32_t temp; + temp = AppEDACfg.RtiaAutoScaleMin; + AppEDACfg.RtiaAutoScaleMin = AppEDACfg.RtiaAutoScaleMax; + AppEDACfg.RtiaAutoScaleMax = temp; + } + AppEDACfg.EDAInited = bTRUE; /* EDA application has been initialized. */ + return AD5940ERR_OK; +} + +/** + * @brief Register modification function. + * @details This function is called in ISR when AFE has been wakeup and we can access registers. + * @param pData: the buffer points to data read back from FIFO. Not needed for this application-RAMP + * @param pDataCount: The data count in pData buffer. + * @return return error code. +*/ +static AD5940Err AppEDARegModify(int32_t * const pData, uint32_t *pDataCount) +{ + AD5940Err error = AD5940ERR_OK; + if(AppEDACfg.EDAStateCurr == EDASTATE_VOLT) + { + SWMatrixCfg_Type sw_cfg; + /* Next step is to measure current */ + AppEDACfg.EDAStateNext = EDASTATE_CURR; + /* Need change some registers in order to measure current */ + AD5940_SEQCtrlS(bFALSE); /* Stop it for now. */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly because we are going to change FIFO threshold */ + AD5940_FIFOThrshSet(AppEDACfg.FifoThresh); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bTRUE); /* Enable FIFO. */ + /* Change Switch matrix settings to connect AIN2(body) to SE0 */ + sw_cfg.Dswitch = SWD_OPEN; /* Open all switch D */ + sw_cfg.Pswitch = SWP_AIN2|SWP_SE0; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_AIN0|SWT_AFE3LOAD; /* This switch is for ECG. */ + AD5940_SWMatrixCfgS(&sw_cfg); + /* Apply patch for current measurement */ + //AppEDACfg.SeqPatchInfo.bMeasureVolt = bFALSE; + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_CURR; + AppEDACfg.SeqPatchInfo.RtiaSel = AppEDACfg.RtiaIndexNext; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer. Sequencer will run when next valid trigger comes */ + } + else if(AppEDACfg.EDAStateCurr == EDASTATE_CURR) + { + if(AppEDACfg.bChangeRtia == bTRUE) + { + AppEDACfg.bChangeRtia = bFALSE; + /* Apply patch for next RTIA selection */ + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_CURR; + AppEDACfg.SeqPatchInfo.RtiaSel = AppEDACfg.RtiaIndexNext; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + } + } + + if(AppEDACfg.bMeasVoltReq == bTRUE) + { + SWMatrixCfg_Type sw_cfg; + AppEDACfg.bMeasVoltReq = bFALSE; /* Clear this request */ + /* Next step is to measure voltage */ + AppEDACfg.EDAStateNext = EDASTATE_VOLT; + + /* Change Switch matrix settings to connect AIN2(body) to SE0 */ + sw_cfg.Dswitch = SWD_OPEN; /* Open all switch D */ + sw_cfg.Pswitch = SWP_OPEN; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_AIN0|SWT_AFE3LOAD; /* This switch is for ECG. */ + AD5940_SWMatrixCfgS(&sw_cfg); + + /* Need change some registers in order to measure current */ + AD5940_SEQCtrlS(bFALSE); /* Stop it for now. */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly because we are going to change FIFO threshold */ + AD5940_FIFOThrshSet(AppEDACfg.VoltCalPoints*2); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bTRUE); /* Enable FIFO. */ + + /* Apply patch for current measurement */ + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_VOLT; + AppEDACfg.SeqPatchInfo.RtiaSel = LPTIARTIA_OPEN;//AppEDACfg.RtiaIndexNext; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer. Sequencer will run when next valid trigger comes */ + } + + if(AppEDACfg.NumOfData > 0) + { + AppEDACfg.FifoDataCount += *pDataCount/4; + if(AppEDACfg.FifoDataCount >= AppEDACfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppEDACfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + AppEDACfg.StopRequired = bFALSE; + AppEDACfg.bRunning = bFALSE; + return AD5940ERR_OK; + } + return AD5940ERR_OK; +} + +/** + * @brief Depending on the data type, do appropriate data pre-process before return back to controller + * @param pImpedance: the buffer points to pre-processed data. We use the impedance magnitude value to decide new RTIA settings. + * @param uiDataCount: The data count in pData buffer. + * @return return the next appropriate RTIA index value. +*/ +static uint32_t EDARtiaAutoScaling(fImpCar_Type * const pImpedance, uint32_t uiDataCount) +{ + uint32_t OptRtiaIndex; + float MagMean = 0; + fImpCar_Type SumImp={0,0}; + + /* Get Averaged Magnitude Result */ + for(int i=0;i 4) + { + DftResCnt -= 4; + pDftRes += 4; /* Discard the first 4 results */ + } + for(uint32_t i=0;i 20) /* Wakeup AFE by read register, read 20 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Don't enter hibernate */ + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + + if(FifoCnt > BuffCount) + { + //@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppEDARegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Don't enter hibernate */ + /* Process data */ + AppEDADataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return AD5940ERR_OK; + } + return AD5940ERR_WAKEUP; +} + +/** + * @} + * @} +*/ + + diff --git a/examples/AD5940_BioElec/ElectrodermalActivity.h b/examples/AD5940_BioElec/ElectrodermalActivity.h new file mode 100644 index 0000000..7690390 --- /dev/null +++ b/examples/AD5940_BioElec/ElectrodermalActivity.h @@ -0,0 +1,139 @@ +/*! + ***************************************************************************** + @file: ElectrodermalActivity.h + @author: Neo Xu + @brief: skin impedance measurement header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _EDA_H_ +#define _EDA_H_ +#include "ad5940.h" +#include "stdio.h" +#include "string.h" +#include "math.h" + +/* Do not modify following parameters */ +#define LPTIAPA_PMOD 0 /* Power Mode of PA and LPTIA, Set to Half Power Mode is better for power consumption, 0: normal. 0x18: boost power. BITM_AFE_ULPTIACON0_HALFPWR: half power */ +#define LPF_RF LPTIARF_20K /* Set RF resistor of Low Pass Filter */ +#define LPF_TIME 10.0 /* Unit is ms. Low Pass Filter need time to settle. 10ms is OK for now */ + +#define LPTIASW_VOLT LPTIASW(5)|LPTIASW(6)|LPTIASW(7)|LPTIASW(8)|LPTIASW(9)|LPTIASW(13) +#define LPTIASW_CURR LPTIASW(2)|LPTIASW(5)|LPTIASW(10)|LPTIASW(13) + +/** + * @brief The structure for sequencer patch. +*/ +typedef struct +{ + enum __PatchType + { + PATCHTYPE_VOLT = 0, /**< Generate patch for measuring voltage */ + PATCHTYPE_CURR, /**< Generate patch for measuring current of body */ + }Type; + uint32_t RtiaSel; /**< LPTIA RTIA selection */ + const uint32_t *pSeqCmd; /**< The sequence to measure voltage and current is similar. The difference is stored in a command patch. */ + uint32_t SeqLen; /**< Length of patch sequence */ + uint32_t SRAMAddr; /**< Start address of the sequence command patch */ + uint32_t Buffer[32]; /**< 32Byte should be enough for sequence generator */ + const uint32_t BuffLen; /**< The buffer length of Buffer */ +}SeqPatchInfo_Type; + +/* + Note: this example will use SEQID_0 as measurement sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration if there is need. +*/ +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /**< Indicate to generate sequence again. It's auto cleared by AppEDAInit */ + uint32_t SeqStartAddr; /**< Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /**< Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /**< Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + BoolFlag bBioElecBoard; /**< Select between AD5941Sens1 board and BioElec board */ + BoolFlag ReDoRtiaCal; /**< Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /**< The real frequency of system clock */ + float LfoscClkFreq; /**< The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + uint32_t FifoThresh; /**< FIFO threshold. Should be N*4 */ + float EDAODR; /**< in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically. DFT number and sample frequency decides the maxim ODR. */ + int32_t NumOfData; /**< By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + uint32_t VoltCalPoints; /**< Use how many points to calculate average excitation voltage */ + float RcalVal; /**< Rcal value in Ohm */ + float SinFreq; /**< Frequency of excitation signal */ + float SampleFreq; /**< Sample Frequency in Hz. Clock source is 32kHz.*/ + float SinAmplitude; /**< Signal in amplitude in mV unit. Range: 0Vp to 1100mVp (0Vpp to 2.2Vpp) */ + uint32_t DacUpdateRate; /**< DAC update rate is SystemCLock/Divider. The available value is 7 to 255. */ + uint32_t LptiaRtiaSel; /**< Use internal RTIA, Select from LPTIARTIA_OPEN, LPTIARTIA_200R, ... , LPTIARTIA_512K */ + + uint32_t DftNum; /**< DFT number */ + BoolFlag HanWinEn; /**< Enable Hanning window */ + + BoolFlag RtiaAutoScaleEnable; /**< Automatically change RTIA value according to measurement results. 0: Set RTIA with RTIA_SEL. 1: Automatically choose RTIA in software */ + uint32_t RtiaAutoScaleMax; /**< Limit the maximum RTIA value that auto scale function can use. Select from LPTIARTIA_OPEN, LPTIARTIA_200R, ... , LPTIARTIA_512K */ + uint32_t RtiaAutoScaleMin; /**< Limit the minimum RTIA value that auto scale function can use. Select from LPTIARTIA_OPEN, LPTIARTIA_200R, ... , LPTIARTIA_512K */ + +/* Private variables for internal usage */ + fImpCar_Type RtiaCurrValue; /**< Calibrated Rtia value of current frequency */ + fImpCar_Type RtiaCalTable[LPTIARTIA_512K+1]; /**< Calibrated Rtia Value table */ + fImpCar_Type ImpEDABase; /**< Impedance of EDA base line */ + fImpCar_Type ImpSum; /**< Sum of all measured results. Used to calculate base line of EDA */ + uint32_t ImpSumCount; /**< Count of data added to 'ImpSum' */ + uint32_t RtiaIndexCurr; /**< Index value 0 to 26 means Open, 200Ohm, to 512kOhm */ + uint32_t RtiaIndexNext; + BoolFlag bChangeRtia; /**< Auto scaling method says we need to change RTIA */ + + SeqPatchInfo_Type SeqPatchInfo; /**< The sequence patch for different RTIA and both voltage/current measurement */ + fImpCar_Type ExcitVolt; /**< Measured excitation voltage result */ + BoolFlag bDataIsVolt; /**< Current DFT result is voltage */ + BoolFlag bMeasVoltReq; /**< User says we need to measure voltage */ + + BoolFlag EDAInited; /**< If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /**< After FIFO is ready, stop the measurement sequence */ + BoolFlag bRunning; /**< status of if EDA is running. Useful when send STOP_SYNC to detect if it's actually stopped. */ + uint32_t FifoDataCount; /**< Count how many times impedance have been measured */ + + enum __EDAState{ + EDASTATE_INIT = 0, /**< Initializing */ + EDASTATE_RTIACAL, /**< Internal RTIA resistor calibrating. */ + EDASTATE_VOLT, /**< Measuring excitation voltage */ + EDASTATE_CURR, /**< Measuring respond current */ + }EDAStateCurr, EDAStateNext; /**< When interrupt happens, the state is EDACurrState. At the end of interrupt function, go to EDANextState */ +/* End */ +}AppEDACfg_Type; + +/* Common application control message */ +#define APPCTRL_START 0 /**< Start the measurement by starting Wakeup Timer */ +#define APPCTRL_STOPNOW 1 /**< Stop immediately by stop Wakeup Timer*/ +#define APPCTRL_STOPSYNC 2 /**< Stop the measurement when interrupt occurred */ +#define APPCTRL_SHUTDOWN 3 /**< Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ +#define APPCTRL_RUNNING 4 /**< Is application running? */ + +#define EDACTRL_MEASVOLT 100 /**< Measure Excitation voltage now */ +#define EDACTRL_GETRTIAMAG 101 /**< Get the rtia magnitude for current measured data */ + +#define EDACTRL_RSTBASE 102 /**< Reset base line of EDA result. */ +#define EDACTRL_SETBASE 103 /**< Set base line of EDA result */ +#define EDACTRL_GETAVR 104 /**< Get average value of all measured impedance */ +#define EDACTRL_STATUS 105 /**< Get if EDA is running. */ + +/* Error message */ +#define EDAERR_ERROR AD5940ERR_APPERROR /**< General error */ +#define EDAERR_VOLTMEASURE AD5940ERR_APPERROR-1 /**< Excitation voltage measurement error. Points not match */ + +AD5940Err AppEDAGetCfg(void *pCfg); +AD5940Err AppEDAInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppEDAISR(void *pBuff, uint32_t *pCount); +AD5940Err AppEDACtrl(int32_t EDACtrl, void *pPara); + +#endif diff --git a/examples/AD5940_BioElec/NUCLEO-F411/AD5940_BioElec.uvoptx b/examples/AD5940_BioElec/NUCLEO-F411/AD5940_BioElec.uvoptx new file mode 100644 index 0000000..f3a680d --- /dev/null +++ b/examples/AD5940_BioElec/NUCLEO-F411/AD5940_BioElec.uvoptx @@ -0,0 +1,369 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\BodyImpedance.c + BodyImpedance.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\Electrocardiograph.c + Electrocardiograph.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\ElectrodermalActivity.c + ElectrodermalActivity.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\UARTCmd.c + UARTCmd.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_BioElec/NUCLEO-F411/AD5940_BioElec.uvprojx b/examples/AD5940_BioElec/NUCLEO-F411/AD5940_BioElec.uvprojx new file mode 100644 index 0000000..ff29b3e --- /dev/null +++ b/examples/AD5940_BioElec/NUCLEO-F411/AD5940_BioElec.uvprojx @@ -0,0 +1,604 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + BodyImpedance.c + 1 + ..\BodyImpedance.c + + + Electrocardiograph.c + 1 + ..\Electrocardiograph.c + + + ElectrodermalActivity.c + 1 + ..\ElectrodermalActivity.c + + + UARTCmd.c + 1 + ..\UARTCmd.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_BioElec/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_BioElec/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_BioElec/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_BioElec/NUCLEO-F411/main.c b/examples/AD5940_BioElec/NUCLEO-F411/main.c new file mode 100644 index 0000000..f802f14 --- /dev/null +++ b/examples/AD5940_BioElec/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_BioElec/UARTCmd.c b/examples/AD5940_BioElec/UARTCmd.c new file mode 100644 index 0000000..5430ee4 --- /dev/null +++ b/examples/AD5940_BioElec/UARTCmd.c @@ -0,0 +1,194 @@ +/*! + ***************************************************************************** + @file: UARTCmd.C + @author: $Author: nxu2 $ + @brief: UART Command process + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "stdint.h" +#include "string.h" +#include "stdio.h" +#include + +#define LINEBUFF_SIZE 128 +#define CMDTABLE_SIZE 6 + +uint32_t help(uint32_t para1, uint32_t para2); +uint32_t say_hello(uint32_t para1, uint32_t para2); +uint32_t command_start_measurement(uint32_t para1, uint32_t para2); +uint32_t command_stop_measurement(uint32_t para1, uint32_t para2); +uint32_t command_switch_app(uint32_t AppID, uint32_t para2); + +struct __uartcmd_table +{ + void *pObj; + const char *cmd_name; + const char *pDesc; +}uart_cmd_table[CMDTABLE_SIZE]= +{ + {(void*)help, "help", "print supported commands"}, + {(void*)help, "?", "print supported commands"}, + {(void*)say_hello, "hello", "print parameteres and say hello"}, + {(void*)command_start_measurement, "start", "start selected application"}, + {(void*)command_stop_measurement, "stop", "stop selected application"}, + {(void*)command_switch_app, "switch", "stop current APP and switch to new APP set by parameter1"}, +}; + + +uint32_t help(uint32_t para1, uint32_t para2) +{ + int i = 0; + printf("*****help menu*****\nbelow are supported commands:\n"); + for(;i= LINEBUFF_SIZE-1) + line_buffer_index = 0; /* Error: buffer overflow */ + if( (c == '\r') || (c == '\n')) + { + uint32_t res; + line_buffer[line_buffer_index] = '\0'; + /* Start to process command */ + if(line_buffer_index == 0) + { + line_buffer_index = 0; /* Reset buffer */ + return; /* No command inputs, return */ + } + /* Step1, remove space */ + UARTCmd_RemoveSpaces(); + if(token_count == 0) + { + line_buffer_index = 0; /* Reset buffer */ + return; /* No valid input */ + } + /* Step2, match commands */ + UARTCmd_MatchCommand(); + if(pObjFound == 0) + { + line_buffer_index = 0; /* Reset buffer */ + return; /* Command not support */ + } + if(token_count > 1) /* There is parameters */ + { + UARTCmd_TranslateParas(); + } + /* Step3, call function */ + res = ((uint32_t (*)(uint32_t, uint32_t))(pObjFound))(parameter1, parameter2); + printf("res:0x%08x\n", res); + line_buffer_index = 0; /* Reset buffer */ + } + else + { + line_buffer[line_buffer_index++] = c; + } +} diff --git a/examples/AD5940_ChronoAmperometric/AD5940Main.c b/examples/AD5940_ChronoAmperometric/AD5940Main.c new file mode 100644 index 0000000..0cf4523 --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/AD5940Main.c @@ -0,0 +1,170 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: $Author: nxu2 $ + @brief: Used to control specific application and process data. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "ChronoAmperometric.h" + +#define APPBUFF_SIZE 1000 +#define n 3 +#ifdef __ICCARM__ +#pragma location="never_retained_ram" +#endif +uint32_t AppBuff[n][APPBUFF_SIZE]; +float LFOSCFreq; +uint32_t IntCount = 0; +/* It's your choice here what to do with the data. Here is just an example to print to UART */ +int32_t AMPShowResult(float *pData, uint32_t DataCount) +{ + /*static*/ uint32_t index = 0; + /* Print data*/ + if(!IntCount) + index = 0; + for(int i=0;iWuptClkFreq = LFOSCFreq; /* Use measured 32kHz clock freq for accurate wake up timer */ + pAMPCfg->SeqStartAddr = 0; + pAMPCfg->MaxSeqLen = 512; /* @todo add checker in function */ + pAMPCfg->RcalVal = 10000.0; + pAMPCfg->NumOfData = -1; /* Never stop until you stop it manually by AppAMPCtrl() function */ + + pAMPCfg->AmpODR = 1; + pAMPCfg->FifoThresh = 5; + pAMPCfg->ADCRefVolt = 1.82; /* Measure voltage on VREF_1V8 pin and add here */ + + pAMPCfg->ExtRtia = bFALSE; /* Set to true if using external Rtia */ + pAMPCfg->ExtRtiaVal = 10000000; /* Enter external Rtia value here is using one */ + pAMPCfg->LptiaRtiaSel = LPTIARTIA_1K; /* Select TIA gain resistor. */ + + pAMPCfg->SensorBias = 0; /* Sensor bias voltage between reference and sense electrodes*/ + pAMPCfg->Vzero = 1100; + /* Configure Pulse*/ + pAMPCfg->pulseAmplitude = 500; /* Pulse amplitude on counter electrode (mV) */ + pAMPCfg->pulseLength = 500; /* Length of voltage pulse in ms */ + + +} + +void AD5940_Main(void) +{ + uint32_t temp[n]; + AppCHRONOAMPCfg_Type *pAMPCfg; + AppCHRONOAMPGetCfg(&pAMPCfg); + AD5940PlatformCfg(); + + AD5940AMPStructInit(); /* Configure your parameters in this function */ + + AppCHRONOAMPInit(AppBuff[0], APPBUFF_SIZE); /* Initialize AMP application. Provide a buffer, which is used to store sequencer commands */ + AppCHRONOAMPCtrl(CHRONOAMPCTRL_PULSETEST, 0); /* Control AMP measurement. AMPCTRL_PULSETEST carries out pulse test*/ + + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp[IntCount] = APPBUFF_SIZE; + AppCHRONOAMPISR(AppBuff[IntCount], &temp[IntCount]); /* Deal with it and provide a buffer to store data we got */ + if(pAMPCfg->bMeasureTransient == bFALSE) + { + AMPShowResult((float*)AppBuff[0], temp[0]); + } + if(pAMPCfg->EndSeq) /* End sequence only set at end of transient */ + { + for(int i = 0; iEndSeq = bFALSE; + pAMPCfg->bMeasureTransient = bFALSE; + IntCount = 0; + AppCHRONOAMPCtrl(CHRONOAMPCTRL_START, 0); /* Begin standard amperometric measurement after pulse test is complete */ + } + } + } +} + diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.ewd b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ 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a/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.ewp b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.ewp new file mode 100644 index 0000000..647e271 --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.ewp @@ -0,0 +1,2235 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + inputOutputBased + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 27 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + application + + $PROJ_DIR$\..\AD5940Main.c + + + $PROJ_DIR$\..\ChronoAmperometric.c + + + $PROJ_DIR$\main.c + + + + CMSIS-Pack + CMSISPack.Component + + $PROJ_DIR$\RTE\RTE_Components.h + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.rteconfig b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.uvoptx b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.uvoptx new file mode 100644 index 0000000..ad6044f --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 1 + 0 + 0 + ..\ChronoAmperometric.c + ChronoAmperometric.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.uvprojx b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.uvprojx new file mode 100644 index 0000000..f432f9d --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/AD5940_ChronoAmperometric.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + ChronoAmperometric.c + 1 + ..\ChronoAmperometric.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_ChronoAmperometric/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/ADuCM3029_SRAM_Mode2.icf b/examples/AD5940_ChronoAmperometric/ADICUP3029/ADuCM3029_SRAM_Mode2.icf new file mode 100644 index 0000000..c03fd2b --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/ADuCM3029_SRAM_Mode2.icf @@ -0,0 +1,183 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ + +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; + +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; + +// symbols +define symbol USE_PARITY = 1; + +define symbol FLASH = 0x00000000; // flash address +define symbol FLASH_SIZE = 256K; // 128k flash size +define symbol FLASH_PAGE_SIZE = 2K; // 2k flash page size +define symbol PAGE0_ROM_START = 0x1A0; + + +define symbol SIZE_OF_INTVEC = 384; +define symbol START_OF_READ_PROTECT_KEY_HASH = FLASH+SIZE_OF_INTVEC; +define symbol SIZE_OF_READ_PROTECT_KEY_HASH = 16; +define symbol START_OF_CRC_READ_PROTECT_KEY_HASH = FLASH+SIZE_OF_INTVEC+SIZE_OF_READ_PROTECT_KEY_HASH; +define symbol SIZE_OF_CRC_READ_PROTECT_KEY_HASH = 4; +define symbol START_OF_NUM_CRC_PAGES = FLASH+SIZE_OF_INTVEC+SIZE_OF_READ_PROTECT_KEY_HASH+SIZE_OF_CRC_READ_PROTECT_KEY_HASH; +define symbol NUM_OF_CRC_PAGES = 4; + + + +// user-selectable SRAM mode +// SRAM Banks 1 & 2 are dynamically configurable for hibernation retention at runtime +// referred to here as "xRAM_bank#_retained_region", where x = i (instruction) or d (data) and # = 1 or 2 +define symbol USER_SRAM_MODE = 2; + +// RAM bank sizes sizes are invariant... locations vary by RAM Mode# +define symbol RAM_BANK0_SIZE = 8K; +define symbol RAM_BANK1_SIZE = 8K; +define symbol RAM_BANK2_SIZE = 16K; +define symbol RAM_BANK3_SIZE = 16K; +define symbol RAM_BANK4_SIZE = 12K; +define symbol RAM_BANK5_SIZE = 4K; + +//MODE0 0kB CACHE 32kB ISRAM 32kB DSRAM +if(USER_SRAM_MODE == 0) +{ + define symbol RAM_BANK0 = 0x20000000; // Always Retained + define symbol RAM_BANK1 = 0x20002000; // Retained during Hibernate if SRAMRET.BANK1EN=1 + define symbol RAM_BANK2 = 0x10000000; // Retained during Hibernate if SRAMRET.BANK2EN=1 + define symbol RAM_BANK3 = 0x20040000; // Not retained + define symbol RAM_BANK4 = 0x10004000; // Not retained + + define region iRAM_bank2_retained_region = mem:[from RAM_BANK2 size RAM_BANK2_SIZE]; + define region iRAM_never_retained_region = mem:[from RAM_BANK4 size (RAM_BANK4_SIZE + RAM_BANK5_SIZE)]; + + define region dRAM_always_retained_region = mem:[from RAM_BANK0 size RAM_BANK0_SIZE]; + define region dRAM_bank1_retained_region = mem:[from RAM_BANK1 size RAM_BANK1_SIZE]; + define region dRAM_never_retained_region = mem:[from RAM_BANK3 size RAM_BANK3_SIZE]; +} + +//MODE1 4kB CACHE 28kB ISRAM 32kB DSRAM +else if(USER_SRAM_MODE == 1) +{ + define symbol RAM_BANK0 = 0x20000000; // Always Retained + define symbol RAM_BANK1 = 0x20002000; // Retained during Hibernate if SRAMRET.BANK1EN=1 + define symbol RAM_BANK2 = 0x10000000; // Retained during Hibernate if SRAMRET.BANK2EN=1 + define symbol RAM_BANK3 = 0x20040000; // Not retained + + define region iRAM_bank2_retained_region = mem:[from RAM_BANK2 size RAM_BANK2_SIZE]; + define region iRAM_never_retained_region = mem:[from RAM_BANK4 size RAM_BANK4_SIZE]; + + define region dRAM_always_retained_region = mem:[from RAM_BANK0 size RAM_BANK0_SIZE]; + define region dRAM_bank1_retained_region = mem:[from RAM_BANK1 size RAM_BANK1_SIZE]; + define region dRAM_never_retained_region = mem:[from RAM_BANK3 size RAM_BANK3_SIZE]; +} + +//MODE2 0kB CACHE 0kB ISRAM 64kB DSRAM +else if(USER_SRAM_MODE == 2) +{ + define symbol RAM_BANK0 = 0x20000000; // Always Retained + define symbol RAM_BANK1 = 0x20002000; // Retained during Hibernate if SRAMRET.BANK1EN=1 + define symbol RAM_BANK2 = 0x20004000; // Retained during Hibernate if SRAMRET.BANK2EN=1 + define symbol RAM_BANK3 = 0x20040000; // Not retained + + define region dRAM_always_retained_region = mem:[from RAM_BANK0 size RAM_BANK0_SIZE]; + define region dRAM_bank1_retained_region = mem:[from RAM_BANK1 size RAM_BANK1_SIZE]; + define region dRAM_bank2_retained_region = mem:[from RAM_BANK2 size RAM_BANK2_SIZE]; + define region dRAM_never_retained_region = mem:[from RAM_BANK3 size (RAM_BANK3_SIZE + RAM_BANK4_SIZE + RAM_BANK5_SIZE)]; +} + +//MODE3 4kB CACHE 0kB ISRAM 60kB DSRAM +else if(USER_SRAM_MODE == 3) +{ + define symbol RAM_BANK0 = 0x20000000; // Always Retained + define symbol RAM_BANK1 = 0x20002000; // Retained during Hibernate if SRAMRET.BANK1EN=1 + define symbol RAM_BANK2 = 0x20004000; // Retained during Hibernate if SRAMRET.BANK2EN=1 + define symbol RAM_BANK3 = 0x20040000; // Not retained + + define region dRAM_always_retained_region = mem:[from RAM_BANK0 size RAM_BANK0_SIZE]; + define region dRAM_bank1_retained_region = mem:[from RAM_BANK1 size RAM_BANK1_SIZE]; + define region dRAM_bank2_retained_region = mem:[from RAM_BANK2 size RAM_BANK2_SIZE]; + define region dRAM_never_retained_region = mem:[from RAM_BANK3 size (RAM_BANK3_SIZE + RAM_BANK4_SIZE)]; +} + +// ROM regions +define region ROM_PAGE0_INTVEC = mem:[from FLASH size SIZE_OF_INTVEC]; +define region START_OF_PAGE0_REGION = mem:[from (PAGE0_ROM_START) size (FLASH_PAGE_SIZE - PAGE0_ROM_START)]; +define region ROM_REGION = mem:[from (FLASH + FLASH_PAGE_SIZE) size (FLASH_SIZE - FLASH_PAGE_SIZE)]; +define region SRAM_CODE = mem:[from (RAM_BANK2) size (RAM_BANK2_SIZE)]; + +place at address mem: START_OF_READ_PROTECT_KEY_HASH { readonly section ReadProtectedKeyHash }; +place at address mem: START_OF_CRC_READ_PROTECT_KEY_HASH { readonly section CRC_ReadProtectedKeyHash }; +place at address mem: START_OF_NUM_CRC_PAGES { readonly section NumCRCPages }; + +// C-Runtime blocks +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + + +// Flash Page0 contains an optional checksum block, as verified by the boot kernel at startup. +// If generating a checksum ("Checksum" linker dialogue box) during the build, it is also +// required to add "--keep __checksum" to the linker "Extra Options" dialogue to preserve the +// linker-generated "__checksum" symbol. +define block CHECKSUM with alignment = 4, size = 4 { ro section .checksum }; + +// force manditory placement of the CHECKSUM block within Page0 +place at address 0x000007FC { block CHECKSUM }; + + +// KEEP these blocks, avoiding linker elimination... +keep { + block CHECKSUM, +}; + + +// initializations... +do not initialize { section .noinit }; + +// expand encoded initialized data variables from flash image into RAM during C-Runtime Startup +initialize by copy { rw }; + +//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application + +// ROM: place IVT at start of flash, page zero (ahead of the "meta-data") +place at start of ROM_PAGE0_INTVEC { ro section .intvec }; +place in START_OF_PAGE0_REGION { ro section Page0_region }; + +// ROM: place remaining read-only code/data in flash, starting at flash page1 +place in ROM_REGION { ro }; + + +// Create as large a gap as possible between the stack and the heap to avoid collision... + +// RAM: place stack @ end (high-address) of always-retained dRAM because stack "grows" towards low addresses +place at end of dRAM_always_retained_region { block CSTACK }; + +// RAM: place heap, etc., into low-address, always-retained dRAM +place in dRAM_always_retained_region { rw, block HEAP }; + +// ISRAM section for placing code in SRAM +place in SRAM_CODE {section ISRAM_REGION}; + +initialize by copy {section ISRAM_REGION }; + +// NOTE: To direct data to reside in specifically named memory regions +// (suce as into specific banks or non-hibernation-retained memory), +// use either of the IAR directives: +// '#pragma location="named_region"' directive prefix, or the +// '@ "named_region"' suffix with the data declarations. + +// place data declared as bank1-hibernation-retained +place in dRAM_bank1_retained_region { rw section bank1_retained_ram }; + +// place data declared as bank2-hibernation-retained (RAM modes 2 or 3 only) +//place in dRAM_bank2_retained_region { rw section bank2_retained_ram }; + +// RAM: place volatile RAM data (never retained during hibernation) into select +// named volatile regions, depending on SRAM Mode# and SRAMRET.BANK#EN bits +// + +// place unterained sections +place in dRAM_never_retained_region { rw section never_retained_ram }; diff --git a/examples/AD5940_ChronoAmperometric/ADICUP3029/main.c b/examples/AD5940_ChronoAmperometric/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_ChronoAmperometric/ChronoAmperometric.c b/examples/AD5940_ChronoAmperometric/ChronoAmperometric.c new file mode 100644 index 0000000..f6ff909 --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/ChronoAmperometric.c @@ -0,0 +1,638 @@ +/*! +***************************************************************************** +@file: ChronoAmperometric.c +@author: $Author: nxu2 $ +@brief: Chrono-amperometric measurement sequences. +@version: $Revision: 766 $ +@date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ +----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ChronoAmperometric.h" + +/* +Application configuration structure. Specified by user from template. +The variables are usable in this whole application. +It includes basic configuration for sequencer generator and application related parameters +*/ +AppCHRONOAMPCfg_Type AppCHRONOAMPCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + .FifoThresh = 1000, + + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .AmpODR = 1, + .NumOfData = -1, + .RcalVal = 10000.0, /* 10kOhm */ + + .ExtRtiaVal = 0, + .PwrMod = AFEPWR_LP, + /* LPTIA Configure */ + .LptiaRtiaSel = LPTIARTIA_10K, + .LpTiaRf = LPTIARF_1M, + .LpTiaRl = LPTIARLOAD_SHORT, + .ReDoRtiaCal = bTRUE, + .RtiaCalValue = 0, + /*LPDAC Configure */ + .Vbias = 1100, + .Vzero = 1100, + + /* Waveform Configuration */ + .pulseAmplitude = 500, /* Amplitude of step in mV */ + .pulseLength = 500, /* Length of transient in ms*/ + .EndSeq = bFALSE, /* Flag to indicate sequence has finished */ + + /* ADC Configuration*/ + .ADCPgaGain = ADCPGA_1P5, + .ADCSinc3Osr = ADCSINC3OSR_4, + .ADCSinc2Osr = ADCSINC2OSR_44, + .ADCRefVolt = 1.82, /* Measure voltage on ADCRefVolt pin and enter here*/ + .DataFifoSrc = DATATYPE_SINC2, /* Data type must be SINC2 for chrono-amperometric measurement*/ + .CHRONOAMPInited = bFALSE, + .StopRequired = bFALSE, +}; + +/** +This function is provided for upper controllers that want to change +application parameters specially for user defined parameters. +*/ +AD5940Err AppCHRONOAMPGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppCHRONOAMPCfg_Type**)pCfg = &AppCHRONOAMPCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +AD5940Err AppCHRONOAMPCtrl(int32_t AmpCtrl, void *pPara) +{ + switch (AmpCtrl) + { + case CHRONOAMPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + SEQCfg_Type seq_cfg; + + AD5940_ReadReg(REG_AFE_ADCDAT); /* Any SPI Operation can wakeup AFE */ + if(AppCHRONOAMPCfg.CHRONOAMPInited == bFALSE) + return AD5940ERR_APPERROR; + + /* Configure FIFO and Sequencer for normal Amperometric Measurement */ + AD5940_FIFOThrshSet(AppCHRONOAMPCfg.FifoThresh); + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bTRUE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Configure Wakeup Timer*/ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 1; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppCHRONOAMPCfg.WuptClkFreq*AppCHRONOAMPCfg.AmpODR)-2-1; + AD5940_WUPTCfg(&wupt_cfg); + + AppCHRONOAMPCfg.FifoDataCount = 0; /* restart */ + break; + } + case CHRONOAMPCTRL_STOPNOW: + { + AD5940_ReadReg(REG_AFE_ADCDAT); /* Any SPI Operation can wakeup AFE */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case CHRONOAMPCTRL_STOPSYNC: + { + AppCHRONOAMPCfg.StopRequired = bTRUE; + break; + } + case CHRONOAMPCTRL_SHUTDOWN: + { + AppCHRONOAMPCtrl(CHRONOAMPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by sleep operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + case CHRONOAMPCTRL_PULSETEST: + { + FIFOCfg_Type fifo_cfg; + AD5940_WUPTCtrl(bFALSE); + AppCHRONOAMPCfg.bMeasureTransient = bTRUE; + /* Reconfigure FIFO for Pulse test*/ + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_SINC2NOTCH; + fifo_cfg.FIFOThresh = 1000; + AD5940_FIFOCfg(&fifo_cfg); + + /* Trigger sequence by MMR write */ + AD5940_SEQMmrTrig(AppCHRONOAMPCfg.TransientSeqInfo.SeqId); + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* Generate init sequence */ +static AD5940Err AppCHRONOAMPSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + DSPCfg_Type dsp_cfg; + HSLoopCfg_Type hs_loop; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + //AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bTRUE; + aferef_cfg.Lp1V8BuffEn = bTRUE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + lp_loop.LpDacCfg.LpdacSel = LPDAC0; + lp_loop.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp_loop.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|/*LPDACSW_VBIAS2PIN|*/LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_loop.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp_loop.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp_loop.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp_loop.LpDacCfg.DataRst = bFALSE; + lp_loop.LpDacCfg.PowerEn = bTRUE; + lp_loop.LpDacCfg.DacData6Bit = (uint32_t)((AppCHRONOAMPCfg.Vzero-200)/DAC6BITVOLT_1LSB); + lp_loop.LpDacCfg.DacData12Bit =(int32_t)((AppCHRONOAMPCfg.SensorBias)/DAC12BITVOLT_1LSB) + lp_loop.LpDacCfg.DacData6Bit*64; + if(lp_loop.LpDacCfg.DacData12Bit>lp_loop.LpDacCfg.DacData6Bit*64) + lp_loop.LpDacCfg.DacData12Bit--; + + lp_loop.LpAmpCfg.LpAmpSel = LPAMP0; + lp_loop.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp_loop.LpAmpCfg.LpPaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp_loop.LpAmpCfg.LpTiaRf = AppCHRONOAMPCfg.LpTiaRf; + lp_loop.LpAmpCfg.LpTiaRload = AppCHRONOAMPCfg.LpTiaRl; + if(AppCHRONOAMPCfg.ExtRtia == bTRUE) + { + lp_loop.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(9)|LPTIASW(2)|LPTIASW(4)|LPTIASW(5)/*|LPTIASW(12)*/|LPTIASW(13); + }else + { + lp_loop.LpAmpCfg.LpTiaRtia = AppCHRONOAMPCfg.LptiaRtiaSel; + lp_loop.LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(2)|LPTIASW(4)/*|LPTIASW(12)*/|LPTIASW(13); + } + AD5940_LPLoopCfgS(&lp_loop); + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_LPTIA0_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_LPTIA0_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppCHRONOAMPCfg.ADCPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppCHRONOAMPCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppCHRONOAMPCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); /* Don't care about Statistic */ + AD5940_DSPCfgS(&dsp_cfg); + + hs_loop.SWMatCfg.Dswitch = 0; + hs_loop.SWMatCfg.Pswitch = 0; + hs_loop.SWMatCfg.Nswitch = 0; + hs_loop.SWMatCfg.Tswitch = 0; + AD5940_HSLoopCfgS(&hs_loop); + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_AFECtrlS(AFECTRL_HPREFPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGpioCtrlS(0); + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppCHRONOAMPCfg.InitSeqInfo.SeqId = SEQID_1; + AppCHRONOAMPCfg.InitSeqInfo.SeqRamAddr = AppCHRONOAMPCfg.SeqStartAddr; + AppCHRONOAMPCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppCHRONOAMPCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppCHRONOAMPCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppCHRONOAMPTransientMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + uint32_t VbiasCode, VzeroCode; + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + if(AppCHRONOAMPCfg.DataFifoSrc != DATATYPE_SINC2) + return AD5940ERR_ERROR; /* FIFO data must be SINC2 filter for measuring transient */ + /* Calculate LPDAC codes */ + VzeroCode = (uint32_t)((AppCHRONOAMPCfg.Vzero-200)/DAC6BITVOLT_1LSB); + VbiasCode = (int32_t)((AppCHRONOAMPCfg.pulseAmplitude + AppCHRONOAMPCfg.SensorBias)/DAC12BITVOLT_1LSB) + VzeroCode*64; + if(VbiasCode < (VzeroCode*64)) + VbiasCode --; + /* Truncate */ + if(VbiasCode > 4095) VbiasCode = 4095; + if(VzeroCode > 63) VzeroCode = 63; + + clks_cal.DataType = AppCHRONOAMPCfg.DataFifoSrc; + clks_cal.DataCount = AppCHRONOAMPCalcDataNum(AppCHRONOAMPCfg.pulseLength); + clks_cal.ADCSinc2Osr = AppCHRONOAMPCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppCHRONOAMPCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppCHRONOAMPCfg.SysClkFreq/AppCHRONOAMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin1); + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC conversion before applying step to capture peak */ + AD5940_WriteReg(REG_AFE_LPDACDAT0, VzeroCode<<12|VbiasCode); + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_ADCCNV, bFALSE); /* Stop ADC */ + AD5940_WriteReg(REG_AFE_LPDACDAT0,(uint32_t)((AppCHRONOAMPCfg.Vzero-200)/DAC6BITVOLT_1LSB)<<12|(int32_t)((AppCHRONOAMPCfg.SensorBias)/DAC12BITVOLT_1LSB) + VzeroCode*64); + AD5940_SEQGpioCtrlS(0); + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppCHRONOAMPCfg.TransientSeqInfo.SeqId = SEQID_2; + AppCHRONOAMPCfg.TransientSeqInfo.SeqRamAddr = AppCHRONOAMPCfg.MeasureSeqInfo.SeqRamAddr + AppCHRONOAMPCfg.MeasureSeqInfo.SeqLen ; + AppCHRONOAMPCfg.TransientSeqInfo.pSeqCmd = pSeqCmd; + AppCHRONOAMPCfg.TransientSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppCHRONOAMPCfg.TransientSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} +static AD5940Err AppCHRONOAMPSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + uint32_t const *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = AppCHRONOAMPCfg.DataFifoSrc; + clks_cal.DataCount = 1; + clks_cal.ADCSinc2Osr = AppCHRONOAMPCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppCHRONOAMPCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppCHRONOAMPCfg.SysClkFreq/AppCHRONOAMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin1); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_ADCCNV, bFALSE); /* Stop ADC */ + AD5940_SEQGpioCtrlS(0); + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppCHRONOAMPCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppCHRONOAMPCfg.MeasureSeqInfo.SeqRamAddr = AppCHRONOAMPCfg.InitSeqInfo.SeqRamAddr + AppCHRONOAMPCfg.InitSeqInfo.SeqLen ; + AppCHRONOAMPCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppCHRONOAMPCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppCHRONOAMPCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} +static AD5940Err AppCHRONOAMPRtiaCal(void) +{ + fImpPol_Type RtiaCalValue; /* Calibration result */ + LPRTIACal_Type lprtia_cal; + AD5940_StructInit(&lprtia_cal, sizeof(lprtia_cal)); + + lprtia_cal.LpAmpSel = LPAMP0; + lprtia_cal.bPolarResult = bTRUE; /* Magnitude + Phase */ + lprtia_cal.AdcClkFreq = AppCHRONOAMPCfg.AdcClkFreq; + lprtia_cal.SysClkFreq = AppCHRONOAMPCfg.SysClkFreq; + lprtia_cal.ADCSinc3Osr = ADCSINC3OSR_4; + lprtia_cal.ADCSinc2Osr = ADCSINC2OSR_22; /* Use SINC2 data as DFT data source */ + lprtia_cal.DftCfg.DftNum = DFTNUM_2048; /* Maximum DFT number */ + lprtia_cal.DftCfg.DftSrc = DFTSRC_SINC2NOTCH; + lprtia_cal.DftCfg.HanWinEn = bTRUE; + lprtia_cal.fFreq = AppCHRONOAMPCfg.AdcClkFreq/4/22/2048*3; /* Sample 3 period of signal, 13.317Hz here. Do not use DC method, because it needs ADC/PGA calibrated firstly(but it's faster) */ + lprtia_cal.fRcal = AppCHRONOAMPCfg.RcalVal; + lprtia_cal.LpAmpPwrMod = LPAMPPWR_NORM; + lprtia_cal.bWithCtia = bFALSE; + lprtia_cal.LpTiaRtia = AppCHRONOAMPCfg.LptiaRtiaSel; + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppCHRONOAMPCfg.RtiaCalValue = RtiaCalValue; + return AD5940ERR_OK; +} +/** +* @brief Initialize the amperometric test. Call this function every time before starting amperometric test. +* @param pBuffer: the buffer for sequencer generator. Only need to provide it for the first time. +* @param BufferSize: The buffer size start from pBuffer. +* @return return error code. +*/ +AD5940Err AppCHRONOAMPInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + AD5940_ReadReg(REG_AFE_ADCDAT); /* Any SPI Operation can wakeup AFE */ + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Do RTIA calibration */ + if(((AppCHRONOAMPCfg.ReDoRtiaCal == bTRUE) || \ + AppCHRONOAMPCfg.CHRONOAMPInited == bFALSE) && AppCHRONOAMPCfg.ExtRtia == bFALSE) + { + AppCHRONOAMPRtiaCal(); + AppCHRONOAMPCfg.ReDoRtiaCal = bFALSE; + } + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_SINC2NOTCH; + fifo_cfg.FIFOThresh = AppCHRONOAMPCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppCHRONOAMPCfg.CHRONOAMPInited == bFALSE)||\ + (AppCHRONOAMPCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppCHRONOAMPSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppCHRONOAMPSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + /* Generate transient sequence */ + error = AppCHRONOAMPTransientMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppCHRONOAMPCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppCHRONOAMPCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppCHRONOAMPCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppCHRONOAMPCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + + /* Transient sequence */ + AppCHRONOAMPCfg.TransientSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppCHRONOAMPCfg.TransientSeqInfo); + + /* Measurement sequence */ + AppCHRONOAMPCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppCHRONOAMPCfg.MeasureSeqInfo); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppCHRONOAMPCfg.PwrMod, AFEBW_250KHZ); + AppCHRONOAMPCfg.CHRONOAMPInited = bTRUE; /* CHRONOAMP application has been initialized. */ + AppCHRONOAMPCfg.bMeasureTransient = bFALSE; + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +static AD5940Err AppCHRONOAMPRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + FIFOCfg_Type fifo_cfg; + SEQCfg_Type seq_cfg; + /* Reset dtat FIFO threshold for normal amp */ + if(AppCHRONOAMPCfg.EndSeq) + { + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_SINC2NOTCH; + fifo_cfg.FIFOThresh = AppCHRONOAMPCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + } + if(AppCHRONOAMPCfg.NumOfData > 0) + { + AppCHRONOAMPCfg.FifoDataCount += *pDataCount/4; + if(AppCHRONOAMPCfg.FifoDataCount >= AppCHRONOAMPCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppCHRONOAMPCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static AD5940Err AppCHRONOAMPDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t i, datacount; + datacount = *pDataCount; + float *pOut = (float *)pData; + for(i=0;i + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\ChronoAmperometric.c + ChronoAmperometric.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ChronoAmperometric/NUCLEO-F411/AD5940_ChronoAmperometric.uvprojx b/examples/AD5940_ChronoAmperometric/NUCLEO-F411/AD5940_ChronoAmperometric.uvprojx new file mode 100644 index 0000000..d3d889e --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/NUCLEO-F411/AD5940_ChronoAmperometric.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X, ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + ChronoAmperometric.c + 1 + ..\ChronoAmperometric.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_ChronoAmperometric/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_ChronoAmperometric/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_ChronoAmperometric/NUCLEO-F411/main.c b/examples/AD5940_ChronoAmperometric/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_ChronoAmperometric/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_DFT/AD5940_DFTPolling.c b/examples/AD5940_DFT/AD5940_DFTPolling.c new file mode 100644 index 0000000..be1404a --- /dev/null +++ b/examples/AD5940_DFT/AD5940_DFTPolling.c @@ -0,0 +1,83 @@ +/*! + ***************************************************************************** + @file: AD5940_DFTPolling.c + @author: Neo Xu + @brief: DFT Polling mode example. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include "stdio.h" +#include "math.h" + +/** + * Note: In order to use on-chip DFT engine, WG must be set to SIN wave generator and enable it. +*/ + +void AD5940_Main(void) +{ + DSPCfg_Type dsp_cfg; + WGCfg_Type wg_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + /* Firstly call this function after reset to initialize AFE registers. */ + AD5940_Initialize(); + + /* Configure AFE power mode and bandwidth */ + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + AD5940_StructInit(&dsp_cfg, sizeof(dsp_cfg)); + /* Initialize ADC basic function */ + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_VCE0; + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_VSET1P1; + dsp_cfg.ADCBaseCfg.ADCPga = ADCPGA_1; + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH */ + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = ADCSINC3OSR_4; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = ADCSINC2OSR_1333; + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + dsp_cfg.DftCfg.DftNum = DFTNUM_16384; + dsp_cfg.DftCfg.DftSrc = DFTSRC_SINC3; + AD5940_DSPCfgS(&dsp_cfg); + + AD5940_StructInit(&wg_cfg, sizeof(wg_cfg)); + wg_cfg.WgType = WGTYPE_SIN; + wg_cfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(1000.0, 16000000.0); /* 10kHz */ + AD5940_WGCfgS(&wg_cfg); + + /* Enable all interrupt at Interrupt Controller 1. So we can check the interrupt flag */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH|AFECTRL_WG, bTRUE); + AD5940_AFECtrlS(AFECTRL_DFT, bTRUE); + AD5940_ADCConvtCtrlS(bTRUE); + + while(1) + { + int32_t real, image; + if(AD5940_INTCTestFlag(AFEINTC_1,AFEINTSRC_DFTRDY)) + { + AD5940_INTCClrFlag(AFEINTSRC_DFTRDY); + real = AD5940_ReadAfeResult(AFERESULT_DFTREAL); + if(real&(1<<17)) + real |= 0xfffc0000; /* Data is 18bit in two's complement, bit17 is the sign bit */ + printf("DFT: %d,", real); + image = AD5940_ReadAfeResult(AFERESULT_DFTIMAGE); + if(image&(1<<17)) + image |= 0xfffc0000; /* Data is 18bit in two's complement, bit17 is the sign bit */ + printf("%d,", image); + printf("Mag:%f\n", sqrt((float)real*real + (float)image*image)); + } + } +} + diff --git a/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.ewd b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ 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b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.ewp new file mode 100644 index 0000000..d684276 --- /dev/null +++ b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.ewp @@ -0,0 +1,2232 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + inputOutputBased + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 27 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + + Release + + ARM + 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$PROJ_DIR$\RTE\RTE_Components.h + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.rteconfig b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.uvoptx b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.uvoptx new file mode 100644 index 0000000..e186ba3 --- /dev/null +++ b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.uvoptx @@ -0,0 +1,282 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_DFTPolling.c + AD5940_DFTPolling.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.uvprojx b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.uvprojx new file mode 100644 index 0000000..ccc05c9 --- /dev/null +++ b/examples/AD5940_DFT/ADICUP3029/AD5940_DFT.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_DFTPolling.c + 1 + ..\AD5940_DFTPolling.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_DFT/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_DFT/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_DFT/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_DFT/ADICUP3029/main.c b/examples/AD5940_DFT/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_DFT/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_DFT/NUCLEO-F411/AD5940_DFT.uvoptx b/examples/AD5940_DFT/NUCLEO-F411/AD5940_DFT.uvoptx new file mode 100644 index 0000000..f0ea7c0 --- /dev/null +++ b/examples/AD5940_DFT/NUCLEO-F411/AD5940_DFT.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_DFTPolling.c + AD5940_DFTPolling.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_DFT/NUCLEO-F411/AD5940_DFT.uvprojx b/examples/AD5940_DFT/NUCLEO-F411/AD5940_DFT.uvprojx new file mode 100644 index 0000000..e14db00 --- /dev/null +++ b/examples/AD5940_DFT/NUCLEO-F411/AD5940_DFT.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X, ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_DFTPolling.c + 1 + ..\AD5940_DFTPolling.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_DFT/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_DFT/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_DFT/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_DFT/NUCLEO-F411/main.c b/examples/AD5940_DFT/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_DFT/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_ECG/AD5940Main.c b/examples/AD5940_ECG/AD5940Main.c new file mode 100644 index 0000000..8fef1e7 --- /dev/null +++ b/examples/AD5940_ECG/AD5940Main.c @@ -0,0 +1,148 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Used to control specific application and process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** + * @addtogroup AD5940_System_Examples + * @{ + * @defgroup BioElec_Example + * @{ + */ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "Electrocardiograph.h" + +#define APPBUFF_SIZE 1024 +uint32_t AppBuff[APPBUFF_SIZE]; +float LFOSCFreq; /* Measured LFOSC frequency */ + +/* print ECG result to uart */ +AD5940Err ECGShowResult(void *pData, uint32_t DataCount) +{ + /*Process data*/ + for(int i=0;iMaxSeqLen = 512; + pCfg->FifoThresh = 250; + pCfg->ECGODR = 250; /* Note: ADuCM3029 is too slow to print data to UART. Limited to 1000Hz. */ + pCfg->LfoscClkFreq = LFOSCFreq; +} + + +void AD5940_Main(void) +{ + uint32_t temp; + + AD5940PlatformCfg(); + + AD5940ECGStructInit(); /* Configure your parameters in this function */ + + AppECGInit(AppBuff, APPBUFF_SIZE); /* Initialize BIA application. Provide a buffer, which is used to store sequencer commands */ + AppECGCtrl(APPCTRL_START, 0); /* Control BIA measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppECGISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + ECGShowResult(AppBuff, temp); /* Show the results to UART */ + } + } +} + +/** + * @} + * @} + * */ + diff --git a/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.ewd b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + 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$PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.rteconfig b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.uvoptx b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.uvoptx new file mode 100644 index 0000000..456dbef --- /dev/null +++ b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Electrocardiograph.c + Electrocardiograph.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.uvprojx b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.uvprojx new file mode 100644 index 0000000..4bf5382 --- /dev/null +++ b/examples/AD5940_ECG/ADICUP3029/AD5940_ECG.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Electrocardiograph.c + 1 + ..\Electrocardiograph.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_ECG/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_ECG/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_ECG/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_ECG/ADICUP3029/main.c b/examples/AD5940_ECG/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_ECG/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_ECG/Electrocardiograph.c b/examples/AD5940_ECG/Electrocardiograph.c new file mode 100644 index 0000000..f29d60f --- /dev/null +++ b/examples/AD5940_ECG/Electrocardiograph.c @@ -0,0 +1,391 @@ +/*! + ***************************************************************************** + @file: Electrocardiograph.c + @author: Neo Xu + @brief: ECG Measurement. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "Electrocardiograph.h" + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppECGCfg_Type AppECGCfg = +{ + .bParaChanged = bFALSE, + .bBioElecBoard = bTRUE, + .SeqStartAddr = 0, + .MaxSeqLen = 512, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 512, + + .ECGODR = 1000.0, /* 1000.0 Hz*/ + .NumOfData = -1, + .FifoThresh = 100, + + .LfoscClkFreq = 32000.0, + .SysClkFreq = 16000000.0, + .AdcClkFreq = 16000000.0, + .PwrMod = AFEPWR_LP, + + .AdcPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .ECGInited = bFALSE, + .StopRequired = bFALSE, + .FifoDataCount = 0, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +AD5940Err AppECGGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppECGCfg_Type**)pCfg = &AppECGCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +int32_t AppECGCtrl(int32_t Command, void *pPara) +{ + + switch (Command) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppECGCfg.ECGInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppECGCfg.LfoscClkFreq/AppECGCfg.ECGODR)-4-1; + AD5940_WUPTCfg(&wupt_cfg); + + AppECGCfg.FifoDataCount = 0; /* restart */ + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case APPCTRL_STOPSYNC: + { + AppECGCfg.StopRequired = bTRUE; + break; + } + case APPCTRL_SHUTDOWN: + { + AppECGCtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + default: break; + } + return AD5940ERR_OK; +} + +/* Application initialization */ +static AD5940Err AppECGSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + SWMatrixCfg_Type sw_matrix; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; /* The High speed buffers are automatically turned off during hibernate */ + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bFALSE; + aferef_cfg.LpRefBufEn = bFALSE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + /* Initialize ADC basic function */ + adc_base.ADCMuxP = ADCMUXP_AIN6; + adc_base.ADCMuxN = ADCMUXN_VSET1P1; + adc_base.ADCPga = AppECGCfg.AdcPgaGain; + AD5940_ADCBaseCfgS(&adc_base); + + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH */ + adc_filter.ADCSinc3Osr = AppECGCfg.ADCSinc3Osr; + adc_filter.ADCSinc2Osr = AppECGCfg.ADCSinc2Osr; + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc3ClkEnable = bTRUE; /* Enable SINC3 clock. */ + adc_filter.Sinc2NotchClkEnable = bTRUE; + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + adc_filter.DFTClkEnable = bTRUE; + adc_filter.WGClkEnable = bTRUE; + AD5940_ADCFilterCfgS(&adc_filter); + + sw_matrix.Dswitch = SWD_OPEN; + /* Performing a three wire ECG measurement */ + sw_matrix.Pswitch = SWP_RE1|SWP_DE0; + sw_matrix.Nswitch = SWN_AIN2|SWN_SE0; + sw_matrix.Tswitch = SWT_AIN0|SWT_AFE3LOAD; + AD5940_SWMatrixCfgS(&sw_matrix); + + AD5940_AFECtrlS(AFECTRL_HPREFPWR, bTRUE); /* Enable reference. It's automatically turned off during hibernate */ + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + AD5940_SEQGpioCtrlS(/*AGPIO_Pin6|*/AGPIO_Pin5|AGPIO_Pin1); /* GP6 to indicate sequencer is running. GP5 to disable AD8233. GP1 to enable AD8233 RLD function. */ + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppECGCfg.InitSeqInfo.SeqId = SEQID_1; + AppECGCfg.InitSeqInfo.SeqRamAddr = AppECGCfg.SeqStartAddr; + AppECGCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppECGCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppECGCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +static AD5940Err AppECGSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_SINC3; + clks_cal.DataCount = 1; /* Sample one data when wakeup */ + clks_cal.ADCSinc2Osr = AppECGCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppECGCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppECGCfg.SysClkFreq/AppECGCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + //printf("Wait clocks:%d\n", WaitClks); + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_SEQGenInsert(SEQ_WAIT(16*200)); /* Time for reference settling.*/ + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); + //wait for first data ready + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_SEQGpioCtrlS(/*AGPIO_Pin6|*/AGPIO_Pin5|AGPIO_Pin1); /* GP6 to indicate Sequencer is running. GP5 to enable AD8233. GP1 to enable AD8233 RLD function. */ + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppECGCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppECGCfg.MeasureSeqInfo.SeqRamAddr = AppECGCfg.InitSeqInfo.SeqRamAddr + AppECGCfg.InitSeqInfo.SeqLen ; + AppECGCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppECGCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM. The buffer 'pSeqCmd' will be used to generate next sequence */ + AD5940_SEQCmdWrite(AppECGCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/* This function provide application initialize. It can also enable Wupt that will automatically trigger sequence. Or it can configure */ +int32_t AppECGInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + + SEQCfg_Type seq_cfg; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + AD5940_FIFOThrshSet(AppECGCfg.FifoThresh); + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bTRUE); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppECGCfg.ECGInited == bFALSE)||\ + (AppECGCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppECGSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppECGSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppECGCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppECGCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppECGCfg.InitSeqInfo); + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppECGCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppECGCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppECGCfg.MeasureSeqInfo); + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger. It's disabled in initialization sequence */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppECGCfg.PwrMod, AFEBW_250KHZ); + + AppECGCfg.ECGInited = bTRUE; /* ECG application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +int32_t AppECGRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppECGCfg.NumOfData > 0) + { + AppECGCfg.FifoDataCount += *pDataCount/4; + if(AppECGCfg.FifoDataCount >= AppECGCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppECGCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +static int32_t AppECGDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + + *pDataCount = 0; + + /* Get ADC result */ + for(uint32_t i=0; i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* We are operating registers, so we don't allow AFE enter sleep mode which is done in our sequencer */ + *pCount = 0; + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = AD5940_FIFOGetCnt(); + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppECGRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter sleep mode. AFE will stay at active mode until sequencer trigger sleep */ + /* AD5940_EnterSleepS(); // We cannot manually put AFE to hibernate because it's possible sequencer is running to take measurements */ + /* Process data */ + AppECGDataProcess(pBuff,&FifoCnt); + *pCount = FifoCnt; + return AD5940ERR_OK; + } + + return AD5940ERR_OK; +} + + diff --git a/examples/AD5940_ECG/Electrocardiograph.h b/examples/AD5940_ECG/Electrocardiograph.h new file mode 100644 index 0000000..4bcfdee --- /dev/null +++ b/examples/AD5940_ECG/Electrocardiograph.h @@ -0,0 +1,64 @@ +/*! + ***************************************************************************** + @file: Electrocardiograph.h + @author: Neo Xu + @brief: ECG measurement. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _ELETROCARDIOAGRAPH_H_ +#define _ELETROCARDIOAGRAPH_H_ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + BoolFlag bBioElecBoard; /* Indicate if the board is Bioelec board. 0: AD5941Sens1 board, 1: AD5940-BioElec */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Calibration sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + float ECGODR; /* Must be less than 1500Hz. Sample frequency in Hz, this value is used to set Sleep Wakeup Timer period */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ + + float LfoscClkFreq; /* The clock frequency of internal LFOSC in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /* The real frequency of system clock */ + float AdcClkFreq; /* The real frequency of ADC clock */ + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + + uint32_t AdcPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint32_t ADCSinc3Osr; + uint32_t ADCSinc2Osr; +/* Private variables for internal usage */ + BoolFlag ECGInited; /* If the program run firstly, generated sequence commands */ + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* How many data we have got from start. */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; +}AppECGCfg_Type; + +#define APPCTRL_START 0 +#define APPCTRL_STOPNOW 1 +#define APPCTRL_STOPSYNC 2 +//#define APPCTRL_GETFREQ 3 +#define APPCTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + + +AD5940Err AppECGGetCfg(void *pCfg); +AD5940Err AppECGInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppECGISR(void *pBuff, uint32_t *pCount); +AD5940Err AppECGCtrl(int32_t Command, void *pPara); + +#endif diff --git a/examples/AD5940_ECG/NUCLEO-F411/AD5940_ECG.uvoptx b/examples/AD5940_ECG/NUCLEO-F411/AD5940_ECG.uvoptx new file mode 100644 index 0000000..b4f719c --- /dev/null +++ b/examples/AD5940_ECG/NUCLEO-F411/AD5940_ECG.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Electrocardiograph.c + Electrocardiograph.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ECG/NUCLEO-F411/AD5940_ECG.uvprojx b/examples/AD5940_ECG/NUCLEO-F411/AD5940_ECG.uvprojx new file mode 100644 index 0000000..8dda73d --- /dev/null +++ b/examples/AD5940_ECG/NUCLEO-F411/AD5940_ECG.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Electrocardiograph.c + 1 + ..\Electrocardiograph.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_ECG/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_ECG/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_ECG/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_ECG/NUCLEO-F411/main.c b/examples/AD5940_ECG/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_ECG/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_ECSns_EIS/AD5940Main.c b/examples/AD5940_ECSns_EIS/AD5940Main.c new file mode 100644 index 0000000..8e06cc0 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/AD5940Main.c @@ -0,0 +1,151 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Electrochemical impedance spectroscopy based on example AD5940_Impedance + This project is optomized for 3-lead electrochemical sensors that typically have + an impedance <200ohm. For optimum performance RCAL should be close to + impedance of the sensor. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "Impedance.h" + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +int32_t ImpedanceShowResult(uint32_t *pData, uint32_t DataCount) +{ + float freq; + + fImpPol_Type *pImp = (fImpPol_Type*)pData; + AppIMPCtrl(IMPCTRL_GETFREQ, &freq); + + printf("Freq:%.2f ", freq); + /*Process data*/ + for(int i=0;iSeqStartAddr = 0; + pImpedanceCfg->MaxSeqLen = 512; /* @todo add checker in function */ + + pImpedanceCfg->RcalVal = 200.0; + pImpedanceCfg->FifoThresh = 6; + pImpedanceCfg->SinFreq = 1000.0; + + /* Configure Excitation Waveform + * + * Output waveform = DacVoltPP * ExcitBufGain * HsDacGain + * + * = 300 * 0.25 * 0.2 = 15mV pk-pk + * + */ + pImpedanceCfg->DacVoltPP = 300; /* Maximum value is 600mV*/ + pImpedanceCfg->ExcitBufGain = EXCITBUFGAIN_0P25; + pImpedanceCfg->HsDacGain = HSDACGAIN_0P2; + + /* Set switch matrix to onboard(EVAL-AD5940ELECZ) gas sensor. */ + pImpedanceCfg->DswitchSel = SWD_CE0; + pImpedanceCfg->PswitchSel = SWP_RE0; + pImpedanceCfg->NswitchSel = SWN_SE0LOAD; + pImpedanceCfg->TswitchSel = SWT_SE0LOAD; + /* The dummy sensor is as low as 5kOhm. We need to make sure RTIA is small enough that HSTIA won't be saturated. */ + pImpedanceCfg->HstiaRtiaSel = HSTIARTIA_200; + pImpedanceCfg->BiasVolt = 0.0; + /* Configure the sweep function. */ + pImpedanceCfg->SweepCfg.SweepEn = bFALSE; + pImpedanceCfg->SweepCfg.SweepStart = 100.0f; /* Start from 1kHz */ + pImpedanceCfg->SweepCfg.SweepStop = 100e3f; /* Stop at 100kHz */ + pImpedanceCfg->SweepCfg.SweepPoints = 101; /* Points is 101 */ + pImpedanceCfg->SweepCfg.SweepLog = bTRUE; + /* Configure Power Mode. Use HP mode if frequency is higher than 80kHz. */ + pImpedanceCfg->PwrMod = AFEPWR_LP; + /* Configure filters if necessary */ + pImpedanceCfg->ADCSinc3Osr = ADCSINC3OSR_4; /* Sample rate is 800kSPS/2 = 400kSPS */ + pImpedanceCfg->DftNum = DFTNUM_16384; + pImpedanceCfg->DftSrc = DFTSRC_SINC3; +} + +void AD5940_Main(void) +{ + uint32_t temp; + AD5940PlatformCfg(); + AD5940ImpedanceStructInit(); + + AppIMPInit(AppBuff, APPBUFF_SIZE); /* Initialize IMP application. Provide a buffer, which is used to store sequencer commands */ + AppIMPCtrl(IMPCTRL_START, 0); /* Control IMP measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + temp = APPBUFF_SIZE; + AppIMPISR(AppBuff, &temp); + ImpedanceShowResult(AppBuff, temp); + } + } +} + diff --git a/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.ewd b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + 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Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.rteconfig b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.uvoptx b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.uvoptx new file mode 100644 index 0000000..1486aa4 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 2 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"DAPLink CMSIS-DAP" -U0600000032624e45004e2015b175000e -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + RzRloadMag + + + 1 + 1 + RcalMag + + + 2 + 1 + RzMag + + + 3 + 1 + RloadMag + + + 4 + 1 + pData + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Impedance.c + Impedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.uvprojx b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.uvprojx new file mode 100644 index 0000000..c94175c --- /dev/null +++ b/examples/AD5940_ECSns_EIS/ADICUP3029/AD5940_ECSensEIS.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Impedance.c + 1 + ..\Impedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_ECSns_EIS/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_ECSns_EIS/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_ECSns_EIS/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_ECSns_EIS/ADICUP3029/main.c b/examples/AD5940_ECSns_EIS/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_ECSns_EIS/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_ECSns_EIS/Impedance.c b/examples/AD5940_ECSns_EIS/Impedance.c new file mode 100644 index 0000000..10323fe --- /dev/null +++ b/examples/AD5940_ECSns_EIS/Impedance.c @@ -0,0 +1,678 @@ +/*! + ***************************************************************************** + @file: Impedance.c + @author: Neo Xu + @brief: Electrochemical impedance spectroscopy based on example AD5940_Impedance + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "AD5940.H" +#include +#include "string.h" +#include "math.h" +#include "Impedance.h" + +/* Default LPDAC resolution(2.5V internal reference). */ +#define DAC12BITVOLT_1LSB (2200.0f/4095) //mV +#define DAC6BITVOLT_1LSB (DAC12BITVOLT_1LSB*64) //mV + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppIMPCfg_Type AppIMPCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ImpODR = 20.0, /* 20.0 Hz*/ + .NumOfData = -1, + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .RcalVal = 10000.0, + + .DswitchSel = SWD_CE0, + .PswitchSel = SWP_CE0, + .NswitchSel = SWN_AIN1, + .TswitchSel = SWT_AIN1, + + .PwrMod = AFEPWR_LP, + + .LptiaRtiaSel = LPTIARTIA_4K, /* COnfigure RTIA */ + .LpTiaRf = LPTIARF_1M, /* Configure LPF resistor */ + .LpTiaRl = LPTIARLOAD_100R, + + .HstiaRtiaSel = HSTIARTIA_1K, + .ExcitBufGain = EXCITBUFGAIN_0P25, + .HsDacGain = HSDACGAIN_0P2, + .HsDacUpdateRate = 0x1B, + .DacVoltPP = 300.0, + .BiasVolt = -0.0f, + + .SinFreq = 100000.0, /* 1000Hz */ + + .DftNum = DFTNUM_16384, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .AdcPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .ADCAvgNum = ADCAVGNUM_16, + + .SweepCfg.SweepEn = bTRUE, + .SweepCfg.SweepStart = 1000, + .SweepCfg.SweepStop = 100000.0, + .SweepCfg.SweepPoints = 101, + .SweepCfg.SweepLog = bFALSE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 4, + .IMPInited = bFALSE, + .StopRequired = bFALSE, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +int32_t AppIMPGetCfg(void *pCfg) +{ + if(pCfg) + { + *(AppIMPCfg_Type**)pCfg = &AppIMPCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +int32_t AppIMPCtrl(uint32_t Command, void *pPara) +{ + + switch (Command) + { + case IMPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppIMPCfg.IMPInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppIMPCfg.WuptClkFreq/AppIMPCfg.ImpODR)-4; + AD5940_WUPTCfg(&wupt_cfg); + + AppIMPCfg.FifoDataCount = 0; /* restart */ + break; + } + case IMPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + AD5940_WUPTCtrl(bFALSE); + break; + } + case IMPCTRL_STOPSYNC: + { + AppIMPCfg.StopRequired = bTRUE; + break; + } + case IMPCTRL_GETFREQ: + { + if(pPara == 0) + return AD5940ERR_PARA; + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppIMPCfg.FreqofData; + else + *(float*)pPara = AppIMPCfg.SinFreq; + } + break; + case IMPCTRL_SHUTDOWN: + { + AppIMPCtrl(IMPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lploop_cfg; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lploop_cfg, 0, sizeof(lploop_cfg)); + AD5940_LPLoopCfgS(&lploop_cfg); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* generated code snnipet */ +float AppIMPGetCurrFreq(void) +{ + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + return AppIMPCfg.FreqofData; + else + return AppIMPCfg.SinFreq; +} + +/* Application initialization */ +static AD5940Err AppIMPSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type HsLoopCfg; + LPLoopCfg_Type lploop_cfg; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + lploop_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lploop_cfg.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lploop_cfg.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lploop_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lploop_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; + lploop_cfg.LpDacCfg.DataRst = bFALSE; + lploop_cfg.LpDacCfg.PowerEn = bTRUE; + lploop_cfg.LpDacCfg.DacData6Bit = (uint32_t)((AppIMPCfg.Vzero-200)/DAC6BITVOLT_1LSB); + lploop_cfg.LpDacCfg.DacData12Bit =(int32_t)((AppIMPCfg.BiasVolt)/DAC12BITVOLT_1LSB) + lploop_cfg.LpDacCfg.DacData6Bit*64; + if(lploop_cfg.LpDacCfg.DacData12Bit>lploop_cfg.LpDacCfg.DacData6Bit*64) + lploop_cfg.LpDacCfg.DacData12Bit--; + lploop_cfg.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lploop_cfg.LpAmpCfg.LpPaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaRf = AppIMPCfg.LpTiaRf; + lploop_cfg.LpAmpCfg.LpTiaRload = AppIMPCfg.LpTiaRl; + lploop_cfg.LpAmpCfg.LpTiaRtia = AppIMPCfg.LptiaRtiaSel; + lploop_cfg.LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(2)|LPTIASW(4)|LPTIASW(12)|LPTIASW(13); + + AD5940_LPLoopCfgS(&lploop_cfg); + + HsLoopCfg.HsDacCfg.ExcitBufGain = AppIMPCfg.ExcitBufGain; + HsLoopCfg.HsDacCfg.HsDacGain = AppIMPCfg.HsDacGain; + HsLoopCfg.HsDacCfg.HsDacUpdateRate = AppIMPCfg.HsDacUpdateRate; + + HsLoopCfg.HsTiaCfg.DiodeClose = bFALSE; + HsLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + HsLoopCfg.HsTiaCfg.HstiaCtia = 31; /* 31pF + 2pF */ + HsLoopCfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + HsLoopCfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + HsLoopCfg.HsTiaCfg.HstiaRtiaSel = AppIMPCfg.HstiaRtiaSel; + + HsLoopCfg.SWMatCfg.Dswitch = AppIMPCfg.DswitchSel; + HsLoopCfg.SWMatCfg.Pswitch = AppIMPCfg.PswitchSel; + HsLoopCfg.SWMatCfg.Nswitch = AppIMPCfg.NswitchSel; + HsLoopCfg.SWMatCfg.Tswitch = SWT_TRTIA|AppIMPCfg.TswitchSel; + + HsLoopCfg.WgCfg.WgType = WGTYPE_SIN; + HsLoopCfg.WgCfg.GainCalEn = bTRUE; + HsLoopCfg.WgCfg.OffsetCalEn = bTRUE; + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + { + AppIMPCfg.FreqofData = AppIMPCfg.SweepCfg.SweepStart; + AppIMPCfg.SweepCurrFreq = AppIMPCfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppIMPCfg.SweepCfg, &AppIMPCfg.SweepNextFreq); + sin_freq = AppIMPCfg.SweepCurrFreq; + } + else + { + sin_freq = AppIMPCfg.SinFreq; + AppIMPCfg.FreqofData = sin_freq; + } + HsLoopCfg.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppIMPCfg.SysClkFreq); + HsLoopCfg.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppIMPCfg.DacVoltPP/800.0f*2047 + 0.5f); + HsLoopCfg.WgCfg.SinCfg.SinOffsetWord = 0; + HsLoopCfg.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&HsLoopCfg); + + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppIMPCfg.AdcPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = AppIMPCfg.ADCAvgNum; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppIMPCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppIMPCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppIMPCfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppIMPCfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppIMPCfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + if(AppIMPCfg.BiasVolt == 0.0f) + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + else + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH|AFECTRL_DCBUFPWR, bTRUE); + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppIMPCfg.InitSeqInfo.SeqId = SEQID_1; + AppIMPCfg.InitSeqInfo.SeqRamAddr = AppIMPCfg.SeqStartAddr; + AppIMPCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppIMPCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppIMPCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + + +static AD5940Err AppIMPSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + LPAmpCfg_Type LpAmpCfg; + + /* Calculate number of clocks to get data to FIFO */ + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppIMPCfg.DftSrc; + clks_cal.DataCount = 1L<<(AppIMPCfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppIMPCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppIMPCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = AppIMPCfg.ADCAvgNum; + clks_cal.RatioSys2AdcClk = AppIMPCfg.SysClkFreq/AppIMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + /* Start Sequence Generator */ + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin2); /* Set GPIO1, clear others that under control */ + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* @todo wait 250us? */ + + /* Disconnect SE0 from LPTIA*/ + LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + LpAmpCfg.LpPaPwrEn = bTRUE; + LpAmpCfg.LpTiaPwrEn = bTRUE; + LpAmpCfg.LpTiaRf = AppIMPCfg.LpTiaRf; + LpAmpCfg.LpTiaRload = AppIMPCfg.LpTiaRl; + LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; /* Disconnect Rtia to avoid RC filter discharge */ + LpAmpCfg.LpTiaSW = LPTIASW(7)|LPTIASW(8)|LPTIASW(12)|LPTIASW(13); + AD5940_LPAMPCfgS(&LpAmpCfg); + /* Sensor + Rload Measurement */ + sw_cfg.Dswitch = AppIMPCfg.DswitchSel; + sw_cfg.Pswitch = AppIMPCfg.PswitchSel; + sw_cfg.Nswitch = AppIMPCfg.NswitchSel; + sw_cfg.Tswitch = SWT_TRTIA|AppIMPCfg.TswitchSel; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + + + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_SINC2NOTCH, bTRUE); /* Enable Waveform generator */ + //delay for signal settling DFT_WAIT + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); + //wait for first data ready + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH|AFECTRL_DFT|AFECTRL_ADCCNV, bFALSE); + + /* RLOAD Measurement */ + sw_cfg.Dswitch = SWD_SE0; + sw_cfg.Pswitch = SWP_SE0; + sw_cfg.Nswitch = SWN_SE0LOAD; + sw_cfg.Tswitch = SWT_SE0LOAD|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); //delay for signal settling DFT_WAIT + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH|AFECTRL_ADCCNV, bFALSE); + + /* RCAL Measurement */ + sw_cfg.Dswitch = SWD_RCAL0; + sw_cfg.Pswitch = SWP_RCAL0; + sw_cfg.Nswitch = SWN_RCAL1; + sw_cfg.Tswitch = SWT_RCAL1|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + /* Reconnect LP loop */ + LpAmpCfg.LpTiaRtia = AppIMPCfg.LptiaRtiaSel; /* Disconnect Rtia to avoid RC filter discharge */ + LpAmpCfg.LpTiaSW = LPTIASW(5)|LPTIASW(2)|LPTIASW(4)|LPTIASW(12)|LPTIASW(13); + AD5940_LPAMPCfgS(&LpAmpCfg); + + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|AFECTRL_SINC2NOTCH, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); //delay for signal settling DFT_WAIT + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT/*|AFECTRL_SINC2NOTCH*/, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bFALSE); + AD5940_SEQGpioCtrlS(0); /* Clr GPIO1 */ + + sw_cfg.Dswitch = SWD_OPEN; + sw_cfg.Pswitch = SWP_OPEN; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_OPEN; + AD5940_SWMatrixCfgS(&sw_cfg); + + //AD5940_EnterSleepS();/* Goto hibernate */ + + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppIMPCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppIMPCfg.MeasureSeqInfo.SeqRamAddr = AppIMPCfg.InitSeqInfo.SeqRamAddr + AppIMPCfg.InitSeqInfo.SeqLen ; + AppIMPCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppIMPCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppIMPCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + + +/* This function provide application initialize. It can also enable Wupt that will automatically trigger sequence. Or it can configure */ +int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bTRUE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppIMPCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppIMPCfg.IMPInited == bFALSE)||\ + (AppIMPCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppIMPSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppIMPSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppIMPCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppIMPCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppIMPCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppIMPCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppIMPCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppIMPCfg.MeasureSeqInfo); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppIMPCfg.PwrMod, AFEBW_250KHZ); + + AD5940_WriteReg(REG_AFE_LPTIASW0, 0x3180); + AppIMPCfg.IMPInited = bTRUE; /* IMP application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +int32_t AppIMPRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppIMPCfg.NumOfData > 0) + { + AppIMPCfg.FifoDataCount += *pDataCount/4; + if(AppIMPCfg.FifoDataCount >= AppIMPCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppIMPCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppIMPCfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + /* Check frequency and update FIlter settings */ + AD5940_WGFreqCtrlS(AppIMPCfg.SweepNextFreq, AppIMPCfg.SysClkFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +int32_t AppIMPDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/6; + + fImpPol_Type * const pOut = (fImpPol_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/6)*6;/* We expect Rz+Rload, Rload and RCAL data, . One DFT result has two data in FIFO, real part and imaginary part. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal; + DftRzRload.Image = -pSrcData->Image; + pSrcData++; + DftRload.Real = pSrcData->Real; + DftRload.Image = -pSrcData->Image; + pSrcData++; + DftRcal.Real = pSrcData->Real; + DftRcal.Image = -pSrcData->Image; + pSrcData++; + /** + Rz = RloadRz - Rload + RloadRz = DftRcal/DftRzRload*RCAL; + Rload = DftRcal/DftRload*RCAL; + Rz = RloadRz - Rload = + (1/DftRzRload - 1/DftRload)*DftRcal*RCAL; + where RCAL is the RCAL resistor value in Ohm. + */ + //temp1 = 1/DftRzRload; + //temp2 = 1/DftRload; + temp1 = AD5940_ComplexDivFloat(&DftConst1, &DftRzRload); + temp2 = AD5940_ComplexDivFloat(&DftConst1, &DftRload); + res = AD5940_ComplexSubFloat(&temp1, &temp2); + res = AD5940_ComplexMulFloat(&res, &DftRcal); + pOut[i].Magnitude = AD5940_ComplexMag(&res)*AppIMPCfg.RcalVal; + pOut[i].Phase = AD5940_ComplexPhase(&res); + } + else + { + iImpCar_Type *pDftRcal, *pDftRzRload, *pDftRload; + + pDftRzRload = pSrcData++; + pDftRload = pSrcData++; + pDftRcal = pSrcData++; + + float RzRloadMag, RzRloadPhase; + float RloadMag, RloadPhase; + float RzMag,RzPhase; + float RcalMag, RcalPhase; + float RzReal, RzImage; + + RzReal = pDftRload->Real - pDftRzRload->Real; + RzImage = pDftRload->Image - pDftRzRload->Image; + + RzRloadMag = sqrt((float)pDftRzRload->Real*pDftRzRload->Real+(float)pDftRzRload->Image*pDftRzRload->Image); + RzRloadPhase = atan2(-pDftRzRload->Image,pDftRzRload->Real); + RcalMag = sqrt((float)pDftRcal->Real*pDftRcal->Real+(float)pDftRcal->Image*pDftRcal->Image); + RcalPhase = atan2(-pDftRcal->Image,pDftRcal->Real); + RzMag = sqrt((float)RzReal*RzReal+(float)RzImage*RzImage); + RzPhase = atan2(-RzImage,RzReal); + RloadMag = sqrt((float)pDftRload->Real*pDftRload->Real+(float)pDftRload->Image*pDftRload->Image); + RloadPhase = atan2(-pDftRload->Image,pDftRload->Real); + + RzMag = (AppIMPCfg.RcalVal*RcalMag*RzMag)/(RzRloadMag*RloadMag); + RzPhase = -(RcalPhase + RzPhase - RloadPhase - RzRloadPhase); + // RzPhase = (RcalPhase + RzPhase - RloadPhase - RzRloadPhase); + + + pOut[i].Magnitude = RzMag; + pOut[i].Phase = RzPhase; + } + } + *pDataCount = ImpResCount; + AppIMPCfg.FreqofData = AppIMPCfg.SweepCurrFreq; + /* Calculate next frequency point */ + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + { + AppIMPCfg.FreqofData = AppIMPCfg.SweepCurrFreq; + AppIMPCfg.SweepCurrFreq = AppIMPCfg.SweepNextFreq; + AD5940_SweepNext(&AppIMPCfg.SweepCfg, &AppIMPCfg.SweepNextFreq); + } + + return 0; +} + +/** + +*/ +int32_t AppIMPISR(void *pBuff, uint32_t *pCount) +{ + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + + *pCount = 0; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Prohibit AFE to enter sleep mode. */ + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/6)*6; + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppIMPRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter sleep mode. */ + /* Process data */ + AppIMPDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + + diff --git a/examples/AD5940_ECSns_EIS/Impedance.h b/examples/AD5940_ECSns_EIS/Impedance.h new file mode 100644 index 0000000..e7d5425 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/Impedance.h @@ -0,0 +1,91 @@ +/*! + ***************************************************************************** + @file: Impedance.h + @author: Neo Xu + @brief: Electrochemical impedance spectroscopy based on example AD5940_Impedance + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _IMPEDANCESEQUENCES_H_ +#define _IMPEDANCESEQUENCES_H_ +#include "AD5940.H" +#include +#include "string.h" +#include "math.h" + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + float ImpODR; /* */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /* The real frequency of system clock */ + float AdcClkFreq; /* The real frequency of ADC clock */ + float RcalVal; /* Rcal value in Ohm */ + /* Switch Configuration */ + uint32_t DswitchSel; + uint32_t PswitchSel; + uint32_t NswitchSel; + uint32_t TswitchSel; + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t ExcitBufGain; /* Select from EXCTBUFGAIN_2, EXCTBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; + float DacVoltPP; /* DAC output voltage in mV peak to peak. Maximum value is 600mVpp. Peak to peak voltage */ + float BiasVolt; /* The excitation signal is DC+AC. This parameter decides the DC value in mV unit. 0.0mV means no DC bias.*/ + float SinFreq; /* Frequency of excitation signal */ + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + uint32_t AdcPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; + uint8_t ADCSinc2Osr; + uint8_t ADCAvgNum; + uint8_t ADC_Rate; + + uint32_t LptiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t LpTiaRf; /* Rfilter select */ + uint32_t LpTiaRl; /* SE0 Rload select */ + float Vzero; /* Voltage on SE0 pin and Vzero, optimumly 1100mV*/ + float Vbias; /* Voltage on CE0 and PA */ + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ +/* Private variables for internal usage */ +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag IMPInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ +}AppIMPCfg_Type; + +#define IMPCTRL_START 0 +#define IMPCTRL_STOPNOW 1 +#define IMPCTRL_STOPSYNC 2 +#define IMPCTRL_GETFREQ 3 /* Get Current frequency of returned data from ISR */ +#define IMPCTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + + +int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize); +int32_t AppIMPGetCfg(void *pCfg); +int32_t AppIMPISR(void *pBuff, uint32_t *pCount); +int32_t AppIMPCtrl(uint32_t Command, void *pPara); + +#endif diff --git a/examples/AD5940_ECSns_EIS/NUCLEO-F411/AD5940_ECSns_EIS.uvoptx b/examples/AD5940_ECSns_EIS/NUCLEO-F411/AD5940_ECSns_EIS.uvoptx new file mode 100644 index 0000000..615740d --- /dev/null +++ b/examples/AD5940_ECSns_EIS/NUCLEO-F411/AD5940_ECSns_EIS.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Impedance.c + Impedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_ECSns_EIS/NUCLEO-F411/AD5940_ECSns_EIS.uvprojx b/examples/AD5940_ECSns_EIS/NUCLEO-F411/AD5940_ECSns_EIS.uvprojx new file mode 100644 index 0000000..a1b4295 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/NUCLEO-F411/AD5940_ECSns_EIS.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.14.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Impedance.c + 1 + ..\Impedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_ECSns_EIS/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_ECSns_EIS/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_ECSns_EIS/NUCLEO-F411/main.c b/examples/AD5940_ECSns_EIS/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_ECSns_EIS/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_EDA/AD5940Main.c b/examples/AD5940_EDA/AD5940Main.c new file mode 100644 index 0000000..1b4f383 --- /dev/null +++ b/examples/AD5940_EDA/AD5940Main.c @@ -0,0 +1,218 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Used to control specific application and furfur process data. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +/** + * @addtogroup AD5940_System_Examples + * @{ + * @defgroup BioElec_Example + * @{ + */ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include "math.h" +#include "ElectrodermalActivity.h" + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; +float LFOSCFreq; /* Measured LFOSC frequency */ +uint32_t ResistorForBaseline = 0; + + +/* print EDA result to uart */ +AD5940Err EDAShowResult(void *pData, uint32_t DataCount) +{ + float RtiaMag; + /*Process data*/ + fImpCar_Type *pImp = (fImpCar_Type*)pData; + AppEDACtrl(EDACTRL_GETRTIAMAG, &RtiaMag); + + /*Process data*/ + for(int i=0;iMaxSeqLen = 512; + + pCfg->LfoscClkFreq = 32000; /* Don't do LFOSC calibration now. We assume the default LFOSC is trimmed. */ + pCfg->RtiaAutoScaleEnable = bTRUE; /* We manually select resistor value. */ + pCfg->LptiaRtiaSel = LPTIARTIA_120K; + pCfg->SinAmplitude = 1100*3/4; /* Set excitation voltage to 0.75 times of full range. */ + pCfg->SinFreq = 100.0f; + pCfg->SampleFreq = 400.0f; /* Do not change sample frequency unless you know how it works. */ + pCfg->EDAODR = 4.0f; /* ODR decides how frequently to start the engine to measure impedance. */ + pCfg->FifoThresh = 4; /* The minimum threshold value is 4, and should always be 4*N, where N is 1,2,3... */ + pCfg->bParaChanged = bTRUE; +} + + +void AD5940_Main(void) +{ + uint32_t temp; + fImpCar_Type EDABase = + { + .Real = 24299.84f, + .Image = -110778.71f, + }; + + AD5940PlatformCfg(); + + AD5940EDAStructInit(); /* Configure your parameters in this function */ + + AppEDAInit(AppBuff, APPBUFF_SIZE); /* Initialize BIA application. Provide a buffer, which is used to store sequencer commands */ + AppEDACtrl(APPCTRL_START, 0); /* Control BIA measurement to start. Second parameter has no meaning with this command. */ + AppEDACtrl(EDACTRL_SETBASE, &EDABase); + ResistorForBaseline = 20000; /* Above result is obtained using 20kOhm resistor on BioElec Rev C board. */ + while(1) + { + /* Check if interrupt flag which will be set when interrupt occurred. */ + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); /* Clear this flag */ + temp = APPBUFF_SIZE; + AppEDAISR(AppBuff, &temp); /* Deal with it and provide a buffer to store data we got */ + EDAShowResult(AppBuff, temp); /* Show the results to UART */ + } + } +} + +uint32_t rst_eda_base(uint32_t para1, uint32_t para2) +{ + printf("Reset EDA impedance baseline\n"); + ResistorForBaseline = 0; + AppEDACtrl(EDACTRL_RSTBASE, 0); + return 0; +} + +uint32_t set_eda_base(uint32_t para1, uint32_t para2) +{ + fImpCar_Type ImpAVR; + printf("Set EDA impedance baseline with current measured impedance average result\n"); + printf("Resistor used to measure baseline is %dOhm\n", para1); + ResistorForBaseline = para1; + AppEDACtrl(EDACTRL_GETAVR, &ImpAVR); + AppEDACtrl(EDACTRL_SETBASE, &ImpAVR); + return 0; +} + +uint32_t get_average_imp(uint32_t para1, uint32_t para2) +{ + fImpCar_Type ImpAVR; + printf("Measured average impedance result is:\n"); + AppEDACtrl(EDACTRL_GETAVR, &ImpAVR); + printf("(Real,Image)=(%.2f,%.2f)Ohm\n", ImpAVR.Real, ImpAVR.Image); + return 0; +} + +uint32_t eda_start(uint32_t para1, uint32_t para2) +{ + printf("Start EDA measurement\n"); + AppEDACtrl(APPCTRL_START, 0); + return 0; +} + +uint32_t eda_stop(uint32_t para1, uint32_t para2) +{ + printf("Stop EDA measurement right now!!\n"); + AppEDACtrl(APPCTRL_STOPNOW, 0); + return 0; +} + +/** + * @} + * @} + * */ + diff --git a/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.ewd b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + 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-0,0 +1,2238 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + inputOutputBased + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 27 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + + Release + + ARM + + 0 + + General + 3 + + 35 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 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$PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.rteconfig b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.uvoptx b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.uvoptx new file mode 100644 index 0000000..599534f --- /dev/null +++ b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.uvoptx @@ -0,0 +1,306 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\ElectrodermalActivity.c + ElectrodermalActivity.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\UARTCmd.C + UARTCmd.C + 0 + 0 + + + + + ::CMSIS + 1 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.uvprojx b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.uvprojx new file mode 100644 index 0000000..011a9fc --- /dev/null +++ b/examples/AD5940_EDA/ADICUP3029/AD5940_EDA.uvprojx @@ -0,0 +1,508 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + ElectrodermalActivity.c + 1 + ..\ElectrodermalActivity.c + + + UARTCmd.C + 1 + ..\UARTCmd.C + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_EDA/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_EDA/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_EDA/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_EDA/ADICUP3029/main.c b/examples/AD5940_EDA/ADICUP3029/main.c new file mode 100644 index 0000000..42978a3 --- /dev/null +++ b/examples/AD5940_EDA/ADICUP3029/main.c @@ -0,0 +1,173 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0x40/*RX_FIFO_4BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} + +void UART_Int_Handler(void) +{ + void UARTCmd_Process(char); + uint32_t flag; + flag = pADI_UART0->LSR; + flag = pADI_UART0->IIR; + if((flag & 0x0e) == 0x04) /* Receive Byte */ + { + uint32_t count; + count = pADI_UART0->RFC; /* Receive FIFO count */ + for(int i=0;i < count; i++) + { + char c; + c = pADI_UART0->COMRX&0xff; + UARTCmd_Process(c); + } + } + if((flag & 0x0e) == 0xc) /* Time-out */ + { + uint32_t count; + count = pADI_UART0->RFC; /* Receive FIFO count */ + for(int i=0;i < count; i++) + { + char c; + c = pADI_UART0->COMRX&0xff; + UARTCmd_Process(c); + } + } +} diff --git a/examples/AD5940_EDA/ElectrodermalActivity.c b/examples/AD5940_EDA/ElectrodermalActivity.c new file mode 100644 index 0000000..f697986 --- /dev/null +++ b/examples/AD5940_EDA/ElectrodermalActivity.c @@ -0,0 +1,874 @@ +/*! + ***************************************************************************** + @file: ElectrodermalActivity.c + @author: Neo Xu + @brief: EDA measurement sequences. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ElectrodermalActivity.h" + +/** @addtogroup AD5940_System_Examples + * @{ + * @defgroup EDA_Example + * @brief This example is used to measure skin impedance. The main feature of this example is ultra low power consumption. + * @details + * @note Need to update code when runs at S2 silicon. + * + * + * + * @{ + * */ + +/** + * @brief The EDA application paramters. + * @details Do not modify following default parameters. Use the function in AD5940Main.c to change it. + * + * */ +AppEDACfg_Type AppEDACfg = +{ +/* Common configurations for all kinds of Application. */ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, +/* Application related parameters */ + .bBioElecBoard = bTRUE, + .ReDoRtiaCal = bFALSE, + .SysClkFreq = 16000000.0, + .LfoscClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .FifoThresh = 4, + .EDAODR = 4.0, /* 20.0 Hz*/ + .NumOfData = -1, + .VoltCalPoints = 8, + .RcalVal = 10000.0, /* 10kOhm */ + .SinFreq = 100.0, /* 100Hz */ + .SampleFreq = 400.0, /* 400Hz */ + .SinAmplitude = 1100.0f/2, /* 1100mV peak */ + .DacUpdateRate = 7, + .LptiaRtiaSel = LPTIARTIA_100K, + + .DftNum = DFTNUM_16, + .HanWinEn = bTRUE, + + .RtiaAutoScaleEnable = bTRUE, + .RtiaAutoScaleMax = LPTIARTIA_512K, + .RtiaAutoScaleMin = LPTIARTIA_1K, + + .RtiaIndexCurr = 0, + .RtiaIndexNext = 0, + .bChangeRtia = bFALSE, + + /* private varaibles */ + .SeqPatchInfo ={ + .BuffLen = 32, + .pSeqCmd = NULL, + }, + .ImpEDABase = {0,0}, + .ImpSum = {0,0}, + .EDAInited = bFALSE, + .StopRequired = bFALSE, + .bRunning = bFALSE, + .bMeasVoltReq = bFALSE, + .EDAStateCurr = EDASTATE_INIT, + .EDAStateNext = EDASTATE_INIT, +}; + +/** + * @brief This function is provided for upper controllers that want to change + * application parameters specially for user defined parameters. + * @param pCfg: The pointer used to store application configuration structure pointer. + * @return none. +*/ +AD5940Err AppEDAGetCfg(void *pCfg) +{ + if(pCfg){ + *(AppEDACfg_Type**)pCfg = &AppEDACfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +/** + * @brief Control application like start, stop. + * @param Command: The command for this application, select from below paramters + * - APPCTRL_START: start the measurement. Note: the ramp test need firstly call function AppRAMPInit() every time before start it. + * - APPCTRL_STOPNOW: Stop the measurement immediately. + * - APPCTRL_STOPSYNC: Stop the measuremnt when current measured data is read back. + * - APPCTRL_SHUTDOWN: Stop the measurement immediately and put AFE to shut down mode(turn off LP loop and enter hibernate). + * - EDACTRL_MEASVOLT: Measure voltage once current measurement is done(Interrupt occurred). + * - EDACTRL_GETRTIAMAG: Get current RTIA value. + * @return none. +*/ +AD5940Err AppEDACtrl(int32_t EDACtrl, void *pPara) +{ + switch (EDACtrl) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppEDACfg.EDAInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = (uint32_t)(AppEDACfg.LfoscClkFreq/AppEDACfg.EDAODR)-2-4; + wupt_cfg.SeqxWakeupTime[SEQID_0] = 4; /* The minimum value is 1. Do not set it to zero. Set it to 1 will spend 2 32kHz clock. */ + AD5940_WUPTCfg(&wupt_cfg); + AppEDACfg.FifoDataCount = 0; /* restart */ + AppEDACfg.bRunning = bTRUE; + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + AppEDACfg.bRunning = bFALSE; + break; + } + case APPCTRL_STOPSYNC: + { + AppEDACfg.StopRequired = bTRUE; + break; + } + case APPCTRL_SHUTDOWN: + { + AppEDACtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPLoop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + case EDACTRL_MEASVOLT: + AppEDACfg.bMeasVoltReq = bTRUE; + break; + case EDACTRL_GETRTIAMAG: + if(pPara == NULL) + return AD5940ERR_NULLP; /* Null pointer */ + *(float*)pPara = AD5940_ComplexMag(&AppEDACfg.RtiaCurrValue); + break; + case EDACTRL_RSTBASE: + AppEDACfg.ImpEDABase.Real = 0; + AppEDACfg.ImpEDABase.Image = 0; + AppEDACfg.ImpSum.Real = 0; + AppEDACfg.ImpSum.Image = 0; + AppEDACfg.ImpSumCount = 0; + break; + case EDACTRL_SETBASE: + { + fImpCar_Type *pImpBase = (fImpCar_Type *)pPara; /* The impedance used to set base line */ + AppEDACfg.ImpEDABase = *pImpBase; + } + break; + case EDACTRL_GETAVR: + if(pPara == NULL) return AD5940ERR_NULLP; + { + fImpCar_Type *pImpAVR = (fImpCar_Type *)pPara; + pImpAVR->Real = AppEDACfg.ImpSum.Real/AppEDACfg.ImpSumCount; + pImpAVR->Image = AppEDACfg.ImpSum.Image/AppEDACfg.ImpSumCount; + break; + } + case APPCTRL_RUNNING: + case EDACTRL_STATUS: + if(pPara == NULL) + return AD5940ERR_NULLP; /* Null pointer */ + *(BoolFlag*)pPara = AppEDACfg.bRunning; + break; + default: + break; + } + return AD5940ERR_OK; +} + +/** + * @brief Generate initialization sequence and write the commands to SRAM. + * @return return error code. +*/ +static AD5940Err AppEDASeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + AFERefCfg_Type aferef_cfg; + HSDACCfg_Type hsdac_cfg; /* Waveform Generator uses some parameter(DAC update rate) from HSDAC config registers */ + LPLoopCfg_Type lp_loop; + WGCfg_Type wg_cfg; + DSPCfg_Type dsp_cfg; + SWMatrixCfg_Type sw_cfg; + + AD5940_SEQGenCtrl(bTRUE); + /* Sequence starts here */ + AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5*/|AGPIO_Pin1); + AD5940_StructInit(&aferef_cfg, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); /* Turn off all references, we only enable it when we need it. */ + + AD5940_StructInit(&lp_loop, sizeof(lp_loop)); /* Disable everything, configure them during measurement */ + AD5940_LPLoopCfgS(&lp_loop); + + AD5940_StructInit(&wg_cfg, sizeof(wg_cfg)); + wg_cfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppEDACfg.SinAmplitude/1100.0f*2047); /* Maximum amplitude is 1100mV */ + wg_cfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(AppEDACfg.SinFreq, AppEDACfg.LfoscClkFreq); + wg_cfg.SinCfg.SinPhaseWord = 0; + wg_cfg.WgType = WGTYPE_SIN; + AD5940_WGCfgS(&wg_cfg); + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); + + /* Switch configuration for BioElec board */ + sw_cfg.Dswitch = SWD_OPEN; /* Open all switch D */ + sw_cfg.Pswitch = SWP_AIN2|SWP_SE0; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_AIN0|SWT_AFE3LOAD; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_StructInit(&dsp_cfg, sizeof(dsp_cfg)); + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_VSET1P1; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_AIN4; + dsp_cfg.ADCBaseCfg.ADCPga = ADCPGA_1; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_4; /* We use averaged SINC3 output as DFT input source */ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = ADCSINC2OSR_22; /* Don't care */ + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = ADCSINC3OSR_5; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bFALSE; + dsp_cfg.DftCfg.DftNum = AppEDACfg.DftNum; + dsp_cfg.DftCfg.DftSrc = DFTSRC_AVG; /* Use averaged SINC3 data */ + dsp_cfg.DftCfg.HanWinEn = AppEDACfg.HanWinEn; + AD5940_DSPCfgS(&dsp_cfg); + AD5940_ADCRepeatCfgS(5*(4+2)+1); /* (n+2)*osr + 1, n=4,osr=5*/ + hsdac_cfg.ExcitBufGain = EXCITBUFGAIN_2; + hsdac_cfg.HsDacGain = HSDACGAIN_1; + hsdac_cfg.HsDacUpdateRate = AppEDACfg.DacUpdateRate; /* Note: the DAC update rate is decided by register DACON.RATE */ + AD5940_HSDacCfgS(&hsdac_cfg); + + AD5940_SEQGpioCtrlS(0/*AGPIO_Pin6|AGPIO_Pin5|AGPIO_Pin1*/); //GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + /* Stop here */ + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(error == AD5940ERR_OK) + { + AppEDACfg.InitSeqInfo.SeqId = SEQID_1; + AppEDACfg.InitSeqInfo.SeqRamAddr = AppEDACfg.SeqStartAddr; + AppEDACfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppEDACfg.InitSeqInfo.SeqLen = SeqLen; + AppEDACfg.InitSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppEDACfg.InitSeqInfo); /* Write command to SRAM */ + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/** + * @brief Generate patch sequence according to current measurement type(Voltage or Current). + * @details The patch is used to adjust sequencer commands already stored in SRAM of AD5940 in order to perform different measurements. + * The reason is that the sequences need to be adjusted. Using the patch method will make things easily and we won't need to modify + * sequences in register level. + * @param pPatch: pointer to patch information include the measurement type, Rtia selection and buffers. + * @return return error code. +*/ +static AD5940Err ApPEDASeqPatchGen(SeqPatchInfo_Type *pPatch) +{ + AD5940Err err; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + LPAmpCfg_Type lpamp_cfg; + AD5940_SEQGenInit(pPatch->Buffer, pPatch->BuffLen); + AD5940_SEQGenCtrl(bTRUE); + lpamp_cfg.LpAmpSel = LPAMP0; + lpamp_cfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Use normal power mode is enough */ + lpamp_cfg.LpPaPwrEn = bTRUE; /* Enable Potential amplifier */ + lpamp_cfg.LpTiaPwrEn = bTRUE; /* Enable TIA amplifier */ + lpamp_cfg.LpTiaRf = LPF_RF; /* Rf resistor controls cut off frequency. */ + lpamp_cfg.LpTiaRload = LPTIARLOAD_100R; /** @note Use 100Ohm Rload. */ + lpamp_cfg.LpTiaRtia = pPatch->RtiaSel; /* If autoscaling is enabled, use selected value. */ + if(pPatch->Type == PATCHTYPE_VOLT) + lpamp_cfg.LpTiaSW = LPTIASW_VOLT; /* Switch settings for voltage measurement */ + else if(pPatch->Type == PATCHTYPE_CURR) + lpamp_cfg.LpTiaSW = LPTIASW_CURR; /* Switch settings for current measurement */ + AD5940_LPAMPCfgS(&lpamp_cfg); + AD5940_SEQGenCtrl(bFALSE); + err = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(err != AD5940ERR_OK) + return err; + pPatch->pSeqCmd = pSeqCmd; + pPatch->SeqLen = SeqLen; + return AD5940ERR_OK; +} + +/** + * @brief Generate measurement sequence and write the commands to SRAM. + * @return return error code. +*/ +static AD5940Err AppEDASeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + uint32_t i; + uint32_t DFTNumber; + + LPDACCfg_Type lpdac_cfg; + LPAmpCfg_Type lpamp_cfg; + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + /* Stage I: Initialization */ + AD5940_SEQGpioCtrlS(AGPIO_Pin6/*|AGPIO_Pin5|AGPIO_Pin1*/);//GP6->endSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + /* LP loop configure: LPDAC and LPAMP */ + lpdac_cfg.LpdacSel = LPDAC0; + lpdac_cfg.DataRst = bFALSE; + lpdac_cfg.LpDacSW = LPDACSW_VBIAS2LPPA/*|LPDACSW_VBIAS2PIN*/|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lpdac_cfg.LpDacRef = LPDACREF_2P5; /* Use internal 2.5V reference */ + lpdac_cfg.LpDacSrc = LPDACSRC_WG; /* Use data from waveform generator */ + lpdac_cfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lpdac_cfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Use 6bit LPDAC for Vzero */ + lpdac_cfg.PowerEn = bTRUE; /* Enable LPDAC */ + lpdac_cfg.DacData12Bit = 0; /* Don't care, 12bit DAC data is from WG */ + lpdac_cfg.DacData6Bit = 32; /* Set it to middle scale of LPDAC. Vzero is the bias voltage of LPTIA amplifier */ + AD5940_LPDACCfgS(&lpdac_cfg); + + /* Voltage and current measurement need different switch settings, record the difference and only modify this part for different purpose */ + error = AD5940_SEQGenFetchSeq(NULL, &AppEDACfg.SeqPatchInfo.SRAMAddr); /* Record the start address of below commands */ + if(error != AD5940ERR_OK) + return error; + + lpamp_cfg.LpAmpSel = LPAMP0; + lpamp_cfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Use normal power mode is enough */ + lpamp_cfg.LpPaPwrEn = bTRUE; /* Enable Potential amplifier */ + lpamp_cfg.LpTiaPwrEn = bTRUE; /* Enable TIA amplifier */ + lpamp_cfg.LpTiaRf = LPF_RF; /* Rf resistor controls cut off frequency. */ + lpamp_cfg.LpTiaRload = LPTIARLOAD_100R; /** @note Use 100Ohm Rload. */ + lpamp_cfg.LpTiaRtia = AppEDACfg.LptiaRtiaSel; /* If autoscaling is enabled, use seleted value. */ + lpamp_cfg.LpTiaSW = LPTIASW_VOLT; /* Swtich settings for voltage measurement */ + AD5940_LPAMPCfgS(&lpamp_cfg); + + AD5940_WriteReg(REG_AFE_LPREFBUFCON, 0); /* Enable low power bandgap and 2.5V reference buffer */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Off everything */ + + AD5940_LPModeEnS(bTRUE); /* Enter LP control mode. The registers are summarized to LPMODECON, so we can control some blocks convenniently */ + AD5940_LPModeClkS(LPMODECLK_LFOSC); /* Trigger switching system clock to 32kHz */ + AD5940_LPModeCtrlS(LPMODECTRL_NONE); /* Disable all */ + AD5940_AFECtrlS(AFECTRL_WG, bTRUE); /* Start waveform generator */ + AD5940_SEQGenInsert(SEQ_WAIT(LPF_TIME*32)); /* wait for stable */ + AD5940_AFECtrlS(AFECTRL_DFT, bTRUE); /* Enable DFT engine */ + + /* Stage II: ADC Run to sample enough data(DFT number) */ + DFTNumber = (1<<(AppEDACfg.DftNum +2)); + for(i=0;iendSeq, GP5 -> AD8233=OFF, GP1->RLD=OFF . + AD5940_EnterSleepS();/* Go to hibernate */ + + /* Sequence end. */ + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(error == AD5940ERR_OK) + { + if(AppEDACfg.MaxSeqLen < (SeqLen + AppEDACfg.InitSeqInfo.SeqLen)) + return AD5940ERR_BUFF; /* Buffer limited */ + AppEDACfg.MeasureSeqInfo.SeqId = SEQID_0; + AppEDACfg.MeasureSeqInfo.SeqRamAddr = AppEDACfg.InitSeqInfo.SeqRamAddr + AppEDACfg.InitSeqInfo.SeqLen ; + AppEDACfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppEDACfg.MeasureSeqInfo.SeqLen = SeqLen; + AppEDACfg.MeasureSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppEDACfg.MeasureSeqInfo); /* Write command to SRAM */ + /* Record where the patch should be applied. */ + AppEDACfg.SeqPatchInfo.SRAMAddr += AppEDACfg.MeasureSeqInfo.SeqRamAddr; /* The start address in AD5940 SRAM */ + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/** + * @brief Calibrate LPTIA internal RTIA resistor(s). + * @details This function will do calibration using parameters stored in @ref AppEDACfg structure. + * @return return error code. +*/ +static AD5940Err AppEDARtiaCal(void) +{ + fImpCar_Type RtiaCalValue; /* Calibration result */ + LPRTIACal_Type lprtia_cal; + AD5940_StructInit(&lprtia_cal, sizeof(lprtia_cal)); + + lprtia_cal.LpAmpSel = LPAMP0; + lprtia_cal.bPolarResult = bFALSE; /* Real + Image */ + lprtia_cal.AdcClkFreq = AppEDACfg.AdcClkFreq; + lprtia_cal.SysClkFreq = AppEDACfg.SysClkFreq; + lprtia_cal.ADCSinc3Osr = ADCSINC3OSR_4; + lprtia_cal.ADCSinc2Osr = ADCSINC2OSR_22; /* We don't use SINC2 for now. */ + lprtia_cal.DftCfg.DftNum = DFTNUM_2048; /* Maximum DFT number */ + lprtia_cal.DftCfg.DftSrc = DFTSRC_SINC2NOTCH; + lprtia_cal.DftCfg.HanWinEn = bTRUE; + lprtia_cal.fFreq = AppEDACfg.SinFreq; + lprtia_cal.fRcal = AppEDACfg.RcalVal; + lprtia_cal.bWithCtia = bTRUE; + lprtia_cal.LpAmpPwrMod = LPAMPPWR_NORM; + lprtia_cal.bWithCtia = bTRUE; + lprtia_cal.LpTiaRtia = AppEDACfg.LptiaRtiaSel; + if(AppEDACfg.RtiaAutoScaleEnable == bTRUE) + { + int i = AppEDACfg.RtiaAutoScaleMin; + for(;i<=AppEDACfg.RtiaAutoScaleMax; i++) + { + lprtia_cal.LpTiaRtia = i; + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppEDACfg.RtiaCalTable[i] = RtiaCalValue; + //printf("Rtia%d,%f,%f\n", i, RtiaCalValue.Real, RtiaCalValue.Image); + } + AppEDACfg.RtiaCurrValue = AppEDACfg.RtiaCalTable[AppEDACfg.RtiaIndexCurr]; + } + else + { + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppEDACfg.RtiaCurrValue = RtiaCalValue; + //printf("Rtia,%f,%f\n", RtiaCalValue.Real, RtiaCalValue.Image); + //printf("Rtia calibration done\n"); + } + return AD5940ERR_OK; +} + +/** + * @brief Initialize the EDA measurement. + * @details This function must be called before start measurement. It will initialize all needed hardwares and put AD5940 to ready state. + * The application parameters stored in @ref AppEDACfg can be changed. Call this function to re-initialize AD5940 with new parameters. + * @param pBuffer: the buffer for sequencer generator. Only need to provide it for the first time. + * @param BufferSize: The buffer size start from pBuffer. + * @return return error code. +*/ +AD5940Err AppEDAInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + AppEDACfg.EDAStateCurr = EDASTATE_INIT; + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + /* Do RTIA calibration */ + if((AppEDACfg.ReDoRtiaCal == bTRUE) || \ + AppEDACfg.EDAInited == bFALSE) /* Do calibration on the first initialization */ + { + AppEDACfg.EDAStateCurr = EDASTATE_RTIACAL; + AppEDARtiaCal(); + AppEDACfg.ReDoRtiaCal = bFALSE; + //AppEDAMeasureRserial(); + } + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppEDACfg.VoltCalPoints*2; /* The first measurement is for excitation voltage. */ + AD5940_FIFOCfg(&fifo_cfg); + + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppEDACfg.EDAInited == bFALSE)||\ + (AppEDACfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppEDASeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppEDASeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppEDACfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequence */ + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, run initialization sequence */ + AD5940_SEQMmrTrig(AppEDACfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Apply patch for voltage measurement */ + AppEDACfg.EDAStateCurr = EDASTATE_VOLT; /* After initialization, the first thing is to measure excitation voltage */ + AppEDACfg.RtiaIndexCurr = AppEDACfg.RtiaIndexNext = AppEDACfg.LptiaRtiaSel; /* Init with a value */ + AppEDACfg.SeqPatchInfo.RtiaSel = LPTIARTIA_OPEN;//AppEDACfg.RtiaIndexCurr; + //AppEDACfg.SeqPatchInfo.bMeasureVolt = bTRUE; + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_VOLT; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + AD5940_WriteReg(REG_AFE_SWMUX, 0x01); /**@todo remove it? close switch SW1 */ + + if(AppEDACfg.RtiaAutoScaleMin > AppEDACfg.RtiaAutoScaleMax) + { + uint32_t temp; + temp = AppEDACfg.RtiaAutoScaleMin; + AppEDACfg.RtiaAutoScaleMin = AppEDACfg.RtiaAutoScaleMax; + AppEDACfg.RtiaAutoScaleMax = temp; + } + AppEDACfg.EDAInited = bTRUE; /* EDA application has been initialized. */ + return AD5940ERR_OK; +} + +/** + * @brief Register modification function. + * @details This function is called in ISR when AFE has been wakeup and we can access registers. + * @param pData: the buffer points to data read back from FIFO. Not needed for this application-RAMP + * @param pDataCount: The data count in pData buffer. + * @return return error code. +*/ +static AD5940Err AppEDARegModify(int32_t * const pData, uint32_t *pDataCount) +{ + AD5940Err error = AD5940ERR_OK; + if(AppEDACfg.EDAStateCurr == EDASTATE_VOLT) + { + SWMatrixCfg_Type sw_cfg; + /* Next step is to measure current */ + AppEDACfg.EDAStateNext = EDASTATE_CURR; + /* Need change some registers in order to measure current */ + AD5940_SEQCtrlS(bFALSE); /* Stop it for now. */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly because we are going to change FIFO threshold */ + AD5940_FIFOThrshSet(AppEDACfg.FifoThresh); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bTRUE); /* Enable FIFO. */ + /* Change Switch matrix settings to connect AIN2(body) to SE0 */ + sw_cfg.Dswitch = SWD_OPEN; /* Open all switch D */ + sw_cfg.Pswitch = SWP_AIN2|SWP_SE0; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_AIN0|SWT_AFE3LOAD; /* This switch is for ECG. */ + AD5940_SWMatrixCfgS(&sw_cfg); + /* Apply patch for current measurement */ + //AppEDACfg.SeqPatchInfo.bMeasureVolt = bFALSE; + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_CURR; + AppEDACfg.SeqPatchInfo.RtiaSel = AppEDACfg.RtiaIndexNext; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer. Sequencer will run when next valid trigger comes */ + } + else if(AppEDACfg.EDAStateCurr == EDASTATE_CURR) + { + if(AppEDACfg.bChangeRtia == bTRUE) + { + AppEDACfg.bChangeRtia = bFALSE; + /* Apply patch for next RTIA selection */ + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_CURR; + AppEDACfg.SeqPatchInfo.RtiaSel = AppEDACfg.RtiaIndexNext; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + } + } + + if(AppEDACfg.bMeasVoltReq == bTRUE) + { + SWMatrixCfg_Type sw_cfg; + AppEDACfg.bMeasVoltReq = bFALSE; /* Clear this request */ + /* Next step is to measure voltage */ + AppEDACfg.EDAStateNext = EDASTATE_VOLT; + + /* Change Switch matrix settings to connect AIN2(body) to SE0 */ + sw_cfg.Dswitch = SWD_OPEN; /* Open all switch D */ + sw_cfg.Pswitch = SWP_OPEN; + sw_cfg.Nswitch = SWN_OPEN; + sw_cfg.Tswitch = SWT_AIN0|SWT_AFE3LOAD; /* This switch is for ECG. */ + AD5940_SWMatrixCfgS(&sw_cfg); + + /* Need change some registers in order to measure current */ + AD5940_SEQCtrlS(bFALSE); /* Stop it for now. */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly because we are going to change FIFO threshold */ + AD5940_FIFOThrshSet(AppEDACfg.VoltCalPoints*2); + AD5940_FIFOCtrlS(FIFOSRC_DFT, bTRUE); /* Enable FIFO. */ + + /* Apply patch for current measurement */ + AppEDACfg.SeqPatchInfo.Type = PATCHTYPE_VOLT; + AppEDACfg.SeqPatchInfo.RtiaSel = LPTIARTIA_OPEN;//AppEDACfg.RtiaIndexNext; + error = ApPEDASeqPatchGen(&AppEDACfg.SeqPatchInfo); + if(error != AD5940ERR_OK) + return error; + AD5940_SEQCmdWrite(AppEDACfg.SeqPatchInfo.SRAMAddr, \ + AppEDACfg.SeqPatchInfo.pSeqCmd, AppEDACfg.SeqPatchInfo.SeqLen); /* Apply the patch to SRAM */ + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer. Sequencer will run when next valid trigger comes */ + } + + if(AppEDACfg.NumOfData > 0) + { + AppEDACfg.FifoDataCount += *pDataCount/4; + if(AppEDACfg.FifoDataCount >= AppEDACfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppEDACfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + AppEDACfg.StopRequired = bFALSE; + AppEDACfg.bRunning = bFALSE; + return AD5940ERR_OK; + } + return AD5940ERR_OK; +} + +/** + * @brief Depending on the data type, do appropriate data pre-process before return back to controller + * @param pImpedance: the buffer points to pre-processed data. We use the impedance magnitude value to decide new RTIA settings. + * @param uiDataCount: The data count in pData buffer. + * @return return the next appropriate RTIA index value. +*/ +static uint32_t EDARtiaAutoScaling(fImpCar_Type * const pImpedance, uint32_t uiDataCount) +{ + uint32_t OptRtiaIndex; + float MagMean = 0; + fImpCar_Type SumImp={0,0}; + + /* Get Averaged Magnitude Result */ + for(int i=0;i 4) + { + DftResCnt -= 4; + pDftRes += 4; /* Discard the first 4 results */ + } + for(uint32_t i=0;i 20) /* Wakeup AFE by read register, read 20 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Don't enter hibernate */ + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + + if(FifoCnt > BuffCount) + { + //@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppEDARegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Don't enter hibernate */ + /* Process data */ + AppEDADataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return AD5940ERR_OK; + } + return AD5940ERR_WAKEUP; +} + +/** + * @} + * @} +*/ + + diff --git a/examples/AD5940_EDA/ElectrodermalActivity.h b/examples/AD5940_EDA/ElectrodermalActivity.h new file mode 100644 index 0000000..7690390 --- /dev/null +++ b/examples/AD5940_EDA/ElectrodermalActivity.h @@ -0,0 +1,139 @@ +/*! + ***************************************************************************** + @file: ElectrodermalActivity.h + @author: Neo Xu + @brief: skin impedance measurement header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _EDA_H_ +#define _EDA_H_ +#include "ad5940.h" +#include "stdio.h" +#include "string.h" +#include "math.h" + +/* Do not modify following parameters */ +#define LPTIAPA_PMOD 0 /* Power Mode of PA and LPTIA, Set to Half Power Mode is better for power consumption, 0: normal. 0x18: boost power. BITM_AFE_ULPTIACON0_HALFPWR: half power */ +#define LPF_RF LPTIARF_20K /* Set RF resistor of Low Pass Filter */ +#define LPF_TIME 10.0 /* Unit is ms. Low Pass Filter need time to settle. 10ms is OK for now */ + +#define LPTIASW_VOLT LPTIASW(5)|LPTIASW(6)|LPTIASW(7)|LPTIASW(8)|LPTIASW(9)|LPTIASW(13) +#define LPTIASW_CURR LPTIASW(2)|LPTIASW(5)|LPTIASW(10)|LPTIASW(13) + +/** + * @brief The structure for sequencer patch. +*/ +typedef struct +{ + enum __PatchType + { + PATCHTYPE_VOLT = 0, /**< Generate patch for measuring voltage */ + PATCHTYPE_CURR, /**< Generate patch for measuring current of body */ + }Type; + uint32_t RtiaSel; /**< LPTIA RTIA selection */ + const uint32_t *pSeqCmd; /**< The sequence to measure voltage and current is similar. The difference is stored in a command patch. */ + uint32_t SeqLen; /**< Length of patch sequence */ + uint32_t SRAMAddr; /**< Start address of the sequence command patch */ + uint32_t Buffer[32]; /**< 32Byte should be enough for sequence generator */ + const uint32_t BuffLen; /**< The buffer length of Buffer */ +}SeqPatchInfo_Type; + +/* + Note: this example will use SEQID_0 as measurement sequence, and use SEQID_1 as init sequence. + SEQID_3 is used for calibration if there is need. +*/ +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /**< Indicate to generate sequence again. It's auto cleared by AppEDAInit */ + uint32_t SeqStartAddr; /**< Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /**< Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /**< Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + BoolFlag bBioElecBoard; /**< Select between AD5941Sens1 board and BioElec board */ + BoolFlag ReDoRtiaCal; /**< Set this flag to bTRUE when there is need to do calibration. */ + float SysClkFreq; /**< The real frequency of system clock */ + float LfoscClkFreq; /**< The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + uint32_t FifoThresh; /**< FIFO threshold. Should be N*4 */ + float EDAODR; /**< in Hz. ODR decides the period of WakeupTimer who will trigger sequencer periodically. DFT number and sample frequency decides the maxim ODR. */ + int32_t NumOfData; /**< By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + uint32_t VoltCalPoints; /**< Use how many points to calculate average excitation voltage */ + float RcalVal; /**< Rcal value in Ohm */ + float SinFreq; /**< Frequency of excitation signal */ + float SampleFreq; /**< Sample Frequency in Hz. Clock source is 32kHz.*/ + float SinAmplitude; /**< Signal in amplitude in mV unit. Range: 0Vp to 1100mVp (0Vpp to 2.2Vpp) */ + uint32_t DacUpdateRate; /**< DAC update rate is SystemCLock/Divider. The available value is 7 to 255. */ + uint32_t LptiaRtiaSel; /**< Use internal RTIA, Select from LPTIARTIA_OPEN, LPTIARTIA_200R, ... , LPTIARTIA_512K */ + + uint32_t DftNum; /**< DFT number */ + BoolFlag HanWinEn; /**< Enable Hanning window */ + + BoolFlag RtiaAutoScaleEnable; /**< Automatically change RTIA value according to measurement results. 0: Set RTIA with RTIA_SEL. 1: Automatically choose RTIA in software */ + uint32_t RtiaAutoScaleMax; /**< Limit the maximum RTIA value that auto scale function can use. Select from LPTIARTIA_OPEN, LPTIARTIA_200R, ... , LPTIARTIA_512K */ + uint32_t RtiaAutoScaleMin; /**< Limit the minimum RTIA value that auto scale function can use. Select from LPTIARTIA_OPEN, LPTIARTIA_200R, ... , LPTIARTIA_512K */ + +/* Private variables for internal usage */ + fImpCar_Type RtiaCurrValue; /**< Calibrated Rtia value of current frequency */ + fImpCar_Type RtiaCalTable[LPTIARTIA_512K+1]; /**< Calibrated Rtia Value table */ + fImpCar_Type ImpEDABase; /**< Impedance of EDA base line */ + fImpCar_Type ImpSum; /**< Sum of all measured results. Used to calculate base line of EDA */ + uint32_t ImpSumCount; /**< Count of data added to 'ImpSum' */ + uint32_t RtiaIndexCurr; /**< Index value 0 to 26 means Open, 200Ohm, to 512kOhm */ + uint32_t RtiaIndexNext; + BoolFlag bChangeRtia; /**< Auto scaling method says we need to change RTIA */ + + SeqPatchInfo_Type SeqPatchInfo; /**< The sequence patch for different RTIA and both voltage/current measurement */ + fImpCar_Type ExcitVolt; /**< Measured excitation voltage result */ + BoolFlag bDataIsVolt; /**< Current DFT result is voltage */ + BoolFlag bMeasVoltReq; /**< User says we need to measure voltage */ + + BoolFlag EDAInited; /**< If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /**< After FIFO is ready, stop the measurement sequence */ + BoolFlag bRunning; /**< status of if EDA is running. Useful when send STOP_SYNC to detect if it's actually stopped. */ + uint32_t FifoDataCount; /**< Count how many times impedance have been measured */ + + enum __EDAState{ + EDASTATE_INIT = 0, /**< Initializing */ + EDASTATE_RTIACAL, /**< Internal RTIA resistor calibrating. */ + EDASTATE_VOLT, /**< Measuring excitation voltage */ + EDASTATE_CURR, /**< Measuring respond current */ + }EDAStateCurr, EDAStateNext; /**< When interrupt happens, the state is EDACurrState. At the end of interrupt function, go to EDANextState */ +/* End */ +}AppEDACfg_Type; + +/* Common application control message */ +#define APPCTRL_START 0 /**< Start the measurement by starting Wakeup Timer */ +#define APPCTRL_STOPNOW 1 /**< Stop immediately by stop Wakeup Timer*/ +#define APPCTRL_STOPSYNC 2 /**< Stop the measurement when interrupt occurred */ +#define APPCTRL_SHUTDOWN 3 /**< Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ +#define APPCTRL_RUNNING 4 /**< Is application running? */ + +#define EDACTRL_MEASVOLT 100 /**< Measure Excitation voltage now */ +#define EDACTRL_GETRTIAMAG 101 /**< Get the rtia magnitude for current measured data */ + +#define EDACTRL_RSTBASE 102 /**< Reset base line of EDA result. */ +#define EDACTRL_SETBASE 103 /**< Set base line of EDA result */ +#define EDACTRL_GETAVR 104 /**< Get average value of all measured impedance */ +#define EDACTRL_STATUS 105 /**< Get if EDA is running. */ + +/* Error message */ +#define EDAERR_ERROR AD5940ERR_APPERROR /**< General error */ +#define EDAERR_VOLTMEASURE AD5940ERR_APPERROR-1 /**< Excitation voltage measurement error. Points not match */ + +AD5940Err AppEDAGetCfg(void *pCfg); +AD5940Err AppEDAInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppEDAISR(void *pBuff, uint32_t *pCount); +AD5940Err AppEDACtrl(int32_t EDACtrl, void *pPara); + +#endif diff --git a/examples/AD5940_EDA/NUCLEO-F411/AD5940_EDA.uvoptx b/examples/AD5940_EDA/NUCLEO-F411/AD5940_EDA.uvoptx new file mode 100644 index 0000000..de19425 --- /dev/null +++ b/examples/AD5940_EDA/NUCLEO-F411/AD5940_EDA.uvoptx @@ -0,0 +1,345 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\ElectrodermalActivity.c + ElectrodermalActivity.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\UARTCmd.c + UARTCmd.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_EDA/NUCLEO-F411/AD5940_EDA.uvprojx b/examples/AD5940_EDA/NUCLEO-F411/AD5940_EDA.uvprojx new file mode 100644 index 0000000..4fc2881 --- /dev/null +++ b/examples/AD5940_EDA/NUCLEO-F411/AD5940_EDA.uvprojx @@ -0,0 +1,594 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + ElectrodermalActivity.c + 1 + ..\ElectrodermalActivity.c + + + UARTCmd.c + 1 + ..\UARTCmd.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_EDA/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_EDA/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_EDA/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_EDA/NUCLEO-F411/main.c b/examples/AD5940_EDA/NUCLEO-F411/main.c new file mode 100644 index 0000000..07ae303 --- /dev/null +++ b/examples/AD5940_EDA/NUCLEO-F411/main.c @@ -0,0 +1,124 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + return 1; +} + +void USART2_IRQHandler(void) +{ + void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + UARTCmd_Process(c); + } +} + + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + diff --git a/examples/AD5940_EDA/UARTCmd.c b/examples/AD5940_EDA/UARTCmd.c new file mode 100644 index 0000000..3e5add8 --- /dev/null +++ b/examples/AD5940_EDA/UARTCmd.c @@ -0,0 +1,198 @@ +/*! + ***************************************************************************** + @file: UARTCmd.c + @author: $Author: nxu2 $ + @brief: UART Command process + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "stdint.h" +#include "string.h" +#include "stdio.h" +#include + +#define LINEBUFF_SIZE 128 +#define CMDTABLE_SIZE 8 + +uint32_t help(uint32_t para1, uint32_t para2); +uint32_t say_hello(uint32_t para1, uint32_t para2); +uint32_t rst_eda_base(uint32_t para1, uint32_t para2); +uint32_t set_eda_base(uint32_t para1, uint32_t para2); +uint32_t get_average_imp(uint32_t para1, uint32_t para2); +uint32_t eda_start(uint32_t para1, uint32_t para2); +uint32_t eda_stop(uint32_t para1, uint32_t para2); + +struct __uartcmd_table +{ + void *pObj; + const char *cmd_name; + const char *pDesc; +}uart_cmd_table[CMDTABLE_SIZE]= +{ + {(void*)help, "help", "print supported commands"}, + {(void*)help, "?", "print supported commands"}, + {(void*)say_hello, "hello", "print parameteres and say hello"}, + {(void*)eda_start, "edastart", "Start EDA measurement"}, + {(void*)eda_stop, "edastop", "Stop EDA measurement immediately"}, + {(void*)rst_eda_base, "rstbase", "Reset EDA baseline impedance"}, + {(void*)set_eda_base, "setbase", "Set EDA impedance baseline with current averaged impedance result"}, + {(void*)get_average_imp, "getavr", "get average impedance of all result"}, +}; + + +uint32_t help(uint32_t para1, uint32_t para2) +{ + int i = 0; + printf("*****help menu*****\nbelow are supported commands:\n"); + for(;i= LINEBUFF_SIZE-1) + line_buffer_index = 0; /* Error: buffer overflow */ + if( (c == '\r') || (c == '\n')) + { + uint32_t res; + line_buffer[line_buffer_index] = '\0'; + /* Start to process command */ + if(line_buffer_index == 0) + { + line_buffer_index = 0; /* Reset buffer */ + return; /* No command inputs, return */ + } + /* Step1, remove space */ + UARTCmd_RemoveSpaces(); + if(token_count == 0) + { + line_buffer_index = 0; /* Reset buffer */ + return; /* No valid input */ + } + /* Step2, match commands */ + UARTCmd_MatchCommand(); + if(pObjFound == 0) + { + line_buffer_index = 0; /* Reset buffer */ + return; /* Command not support */ + } + if(token_count > 1) /* There is parameters */ + { + UARTCmd_TranslateParas(); + } + /* Step3, call function */ + res = ((uint32_t (*)(uint32_t, uint32_t))(pObjFound))(parameter1, parameter2); + printf("res:0x%08x\n", res); + line_buffer_index = 0; /* Reset buffer */ + } + else + { + line_buffer[line_buffer_index++] = c; + } +} diff --git a/examples/AD5940_HSDACCal/AD5940_HSDACCal.c b/examples/AD5940_HSDACCal/AD5940_HSDACCal.c new file mode 100644 index 0000000..130bd7a --- /dev/null +++ b/examples/AD5940_HSDACCal/AD5940_HSDACCal.c @@ -0,0 +1,95 @@ +/*! +***************************************************************************** +@file: AD5940_HSDACCal.c +@author: $Author: nxu2 $ +@brief: HSDAC Offset Calibration Demo calibration demo. +@version: $Revision: 766 $ +@date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ +----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include "ad5940.h" +#include +#include "string.h" + +/* The HSDAC has a number of different gain settings shown in table below. +The HSDAC needs to be calibrated seperately for each gain setting. HSDAC has two powe +modes. There are seperate offset registers for both, DACOFFSET and DACOFFSETHP. The +HSDAC needs to be calibrated for each mode. + +HSDACCON[12] | HSDACCON[0] | Output Range | +0 | 0 | +-607mV | +1 | 0 | +-75mV | +1 | 1 | +-15.14mV | +0 | 1 | +-121.2mV | + +*/ +void AD5940_Main(void){ + HSDACCal_Type hsdac_cal; + ADCPGACal_Type adcpga_cal; + CLKCfg_Type clk_cfg; + /* Use hardware reset */ + AD5940_HWReset(); + AD5940_Initialize(); + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bTRUE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + + + printf("ADC Offset Cal\n"); + adcpga_cal.AdcClkFreq=16000000; + adcpga_cal.ADCPga = ADCPGA_1; + adcpga_cal.ADCSinc2Osr = ADCSINC2OSR_1333; + adcpga_cal.ADCSinc3Osr = ADCSINC3OSR_4; + adcpga_cal.PGACalType = PGACALTYPE_OFFSET; + adcpga_cal.TimeOut10us = 1000; + adcpga_cal.VRef1p11 = 1.11; + adcpga_cal.VRef1p82 = 1.82; + AD5940_ADCPGACal(&adcpga_cal); + + printf("\n 607mV Range Cal\n"); + hsdac_cal.ExcitBufGain = EXCITBUFGAIN_2; /**< Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + hsdac_cal.HsDacGain = HSDACGAIN_1; /**< Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + hsdac_cal.AfePwrMode = AFEPWR_LP; + hsdac_cal.ADCSinc2Osr = ADCSINC2OSR_1333; + hsdac_cal.ADCSinc3Osr = ADCSINC3OSR_4; + AD5940_HSDACCal(&hsdac_cal); + + printf("\nADC GN 4 Offset Cal\n"); + adcpga_cal.ADCPga = ADCPGA_4; + AD5940_ADCPGACal(&adcpga_cal); + + printf("\n 125mV Range Cal\n"); + hsdac_cal.ExcitBufGain = EXCITBUFGAIN_2; /**< Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + hsdac_cal.HsDacGain = HSDACGAIN_0P2; /**< Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + AD5940_HSDACCal(&hsdac_cal); + + printf("\n 75mV Range Cal\n"); + hsdac_cal.ExcitBufGain = EXCITBUFGAIN_0P25; /**< Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + hsdac_cal.HsDacGain = HSDACGAIN_1; /**< Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + AD5940_HSDACCal(&hsdac_cal); + + printf("\n 15mV Range Cal\n"); + hsdac_cal.ExcitBufGain = EXCITBUFGAIN_0P25; /**< Select from EXCITBUFGAIN_2, EXCITBUFGAIN_0P25 */ + hsdac_cal.HsDacGain = HSDACGAIN_0P2; /**< Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + AD5940_HSDACCal(&hsdac_cal); + + printf("HSDAC Cal Complete!\n"); +} + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.ewd b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 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$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.ewp b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.ewp new file mode 100644 index 0000000..89e28c5 --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.ewp @@ -0,0 +1,2232 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.rteconfig b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.uvoptx b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.uvoptx new file mode 100644 index 0000000..9333caf --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.uvoptx @@ -0,0 +1,289 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"DAPLink CMSIS-DAP" -U0600000032624e45004a2015b1750046 -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + ADCCode + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_HSDACCal.c + AD5940_HSDACCal.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.uvprojx b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.uvprojx new file mode 100644 index 0000000..100a55a --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/AD5940_HSDACCal.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_HSDACCal.c + 1 + ..\AD5940_HSDACCal.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_HSDACCal/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_HSDACCal/ADICUP3029/main.c b/examples/AD5940_HSDACCal/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_HSDACCal/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_HSDACCal/NUCLEO-F411/AD5940_HSDACCal.uvoptx b/examples/AD5940_HSDACCal/NUCLEO-F411/AD5940_HSDACCal.uvoptx new file mode 100644 index 0000000..510786a --- /dev/null +++ b/examples/AD5940_HSDACCal/NUCLEO-F411/AD5940_HSDACCal.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 0 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_HSDACCal.c + AD5940_HSDACCal.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_HSDACCal/NUCLEO-F411/AD5940_HSDACCal.uvprojx b/examples/AD5940_HSDACCal/NUCLEO-F411/AD5940_HSDACCal.uvprojx new file mode 100644 index 0000000..d8fda2e --- /dev/null +++ b/examples/AD5940_HSDACCal/NUCLEO-F411/AD5940_HSDACCal.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_HSDACCal.c + 1 + ..\AD5940_HSDACCal.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_HSDACCal/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_HSDACCal/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_HSDACCal/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_HSDACCal/NUCLEO-F411/main.c b/examples/AD5940_HSDACCal/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_HSDACCal/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Impedance/AD5940Main.c b/examples/AD5940_Impedance/AD5940Main.c new file mode 100644 index 0000000..f94be43 --- /dev/null +++ b/examples/AD5940_Impedance/AD5940Main.c @@ -0,0 +1,142 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Standard 4-wire or 2-wire impedance measurement example. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "Impedance.h" + +/** + User could configure following parameters +**/ + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +int32_t ImpedanceShowResult(uint32_t *pData, uint32_t DataCount) +{ + float freq; + + fImpPol_Type *pImp = (fImpPol_Type*)pData; + AppIMPCtrl(IMPCTRL_GETFREQ, &freq); + + printf("Freq:%.2f ", freq); + /*Process data*/ + for(int i=0;iSeqStartAddr = 0; + pImpedanceCfg->MaxSeqLen = 512; /* @todo add checker in function */ + + pImpedanceCfg->RcalVal = 10000.0; + pImpedanceCfg->SinFreq = 60000.0; + pImpedanceCfg->FifoThresh = 4; + + /* Set switch matrix to onboard(EVAL-AD5940ELECZ) dummy sensor. */ + /* Note the RCAL0 resistor is 10kOhm. */ + pImpedanceCfg->DswitchSel = SWD_CE0; + pImpedanceCfg->PswitchSel = SWP_RE0; + pImpedanceCfg->NswitchSel = SWN_SE0; + pImpedanceCfg->TswitchSel = SWT_SE0LOAD; + /* The dummy sensor is as low as 5kOhm. We need to make sure RTIA is small enough that HSTIA won't be saturated. */ + pImpedanceCfg->HstiaRtiaSel = HSTIARTIA_5K; + + /* Configure the sweep function. */ + pImpedanceCfg->SweepCfg.SweepEn = bTRUE; + pImpedanceCfg->SweepCfg.SweepStart = 100.0f; /* Start from 1kHz */ + pImpedanceCfg->SweepCfg.SweepStop = 100e3f; /* Stop at 100kHz */ + pImpedanceCfg->SweepCfg.SweepPoints = 101; /* Points is 101 */ + pImpedanceCfg->SweepCfg.SweepLog = bTRUE; + /* Configure Power Mode. Use HP mode if frequency is higher than 80kHz. */ + pImpedanceCfg->PwrMod = AFEPWR_HP; + /* Configure filters if necessary */ + pImpedanceCfg->ADCSinc3Osr = ADCSINC3OSR_2; /* Sample rate is 800kSPS/2 = 400kSPS */ + pImpedanceCfg->DftNum = DFTNUM_16384; + pImpedanceCfg->DftSrc = DFTSRC_SINC3; +} + +void AD5940_Main(void) +{ + uint32_t temp; + AD5940PlatformCfg(); + AD5940ImpedanceStructInit(); + + AppIMPInit(AppBuff, APPBUFF_SIZE); /* Initialize IMP application. Provide a buffer, which is used to store sequencer commands */ + AppIMPCtrl(IMPCTRL_START, 0); /* Control IMP measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + temp = APPBUFF_SIZE; + AppIMPISR(AppBuff, &temp); + ImpedanceShowResult(AppBuff, temp); + } + } +} + diff --git a/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.ewd b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + 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Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.rteconfig b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.uvoptx b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.uvoptx new file mode 100644 index 0000000..697650c --- /dev/null +++ b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Impedance.c + Impedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.uvprojx b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.uvprojx new file mode 100644 index 0000000..111d301 --- /dev/null +++ b/examples/AD5940_Impedance/ADICUP3029/AD5940_Impedance.uvprojx @@ -0,0 +1,505 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::..\..\Program Files (x86)\ARM_Compiler_5.06u7 + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.1 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X, ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Impedance.c + 1 + ..\Impedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_Impedance/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Impedance/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_Impedance/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Impedance/ADICUP3029/main.c b/examples/AD5940_Impedance/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Impedance/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Impedance/Impedance.c b/examples/AD5940_Impedance/Impedance.c new file mode 100644 index 0000000..a5cb03b --- /dev/null +++ b/examples/AD5940_Impedance/Impedance.c @@ -0,0 +1,585 @@ +/*! + ***************************************************************************** + @file: Impedance.c + @author: Neo Xu + @brief: standard 4-wire or 2-wire impedance measurement sequences. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "Impedance.h" + +/* Default LPDAC resolution(2.5V internal reference). */ +#define DAC12BITVOLT_1LSB (2200.0f/4095) //mV +#define DAC6BITVOLT_1LSB (DAC12BITVOLT_1LSB*64) //mV + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppIMPCfg_Type AppIMPCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ImpODR = 20.0, /* 20.0 Hz*/ + .NumOfData = -1, + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .RcalVal = 10000.0, + + .DswitchSel = SWD_CE0, + .PswitchSel = SWP_CE0, + .NswitchSel = SWN_AIN1, + .TswitchSel = SWT_AIN1, + + .PwrMod = AFEPWR_HP, + + .HstiaRtiaSel = HSTIARTIA_5K, + .ExcitBufGain = EXCITBUFGAIN_2, + .HsDacGain = HSDACGAIN_1, + .HsDacUpdateRate = 7, + .DacVoltPP = 800.0, + .BiasVolt = -0.0f, + + .SinFreq = 100000.0, /* 1000Hz */ + + .DftNum = DFTNUM_16384, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .AdcPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .ADCAvgNum = ADCAVGNUM_16, + + .SweepCfg.SweepEn = bTRUE, + .SweepCfg.SweepStart = 1000, + .SweepCfg.SweepStop = 100000.0, + .SweepCfg.SweepPoints = 101, + .SweepCfg.SweepLog = bFALSE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 4, + .IMPInited = bFALSE, + .StopRequired = bFALSE, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +int32_t AppIMPGetCfg(void *pCfg) +{ + if(pCfg) + { + *(AppIMPCfg_Type**)pCfg = &AppIMPCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +int32_t AppIMPCtrl(uint32_t Command, void *pPara) +{ + + switch (Command) + { + case IMPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppIMPCfg.IMPInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppIMPCfg.WuptClkFreq/AppIMPCfg.ImpODR)-4; + AD5940_WUPTCfg(&wupt_cfg); + + AppIMPCfg.FifoDataCount = 0; /* restart */ + break; + } + case IMPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case IMPCTRL_STOPSYNC: + { + AppIMPCfg.StopRequired = bTRUE; + break; + } + case IMPCTRL_GETFREQ: + { + if(pPara == 0) + return AD5940ERR_PARA; + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppIMPCfg.FreqofData; + else + *(float*)pPara = AppIMPCfg.SinFreq; + } + break; + case IMPCTRL_SHUTDOWN: + { + AppIMPCtrl(IMPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* generated code snnipet */ +float AppIMPGetCurrFreq(void) +{ + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + return AppIMPCfg.FreqofData; + else + return AppIMPCfg.SinFreq; +} + +/* Application initialization */ +static AD5940Err AppIMPSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type HsLoopCfg; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + if(AppIMPCfg.BiasVolt != 0.0f) /* With bias voltage */ + { + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + } + else + { + aferef_cfg.LpBandgapEn = bFALSE; + aferef_cfg.LpRefBufEn = bFALSE; + } + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + HsLoopCfg.HsDacCfg.ExcitBufGain = AppIMPCfg.ExcitBufGain; + HsLoopCfg.HsDacCfg.HsDacGain = AppIMPCfg.HsDacGain; + HsLoopCfg.HsDacCfg.HsDacUpdateRate = AppIMPCfg.HsDacUpdateRate; + + HsLoopCfg.HsTiaCfg.DiodeClose = bFALSE; + if(AppIMPCfg.BiasVolt != 0.0f) /* With bias voltage */ + HsLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_VZERO0; + else + HsLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + HsLoopCfg.HsTiaCfg.HstiaCtia = 31; /* 31pF + 2pF */ + HsLoopCfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + HsLoopCfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + HsLoopCfg.HsTiaCfg.HstiaRtiaSel = AppIMPCfg.HstiaRtiaSel; + + HsLoopCfg.SWMatCfg.Dswitch = AppIMPCfg.DswitchSel; + HsLoopCfg.SWMatCfg.Pswitch = AppIMPCfg.PswitchSel; + HsLoopCfg.SWMatCfg.Nswitch = AppIMPCfg.NswitchSel; + HsLoopCfg.SWMatCfg.Tswitch = SWT_TRTIA|AppIMPCfg.TswitchSel; + + HsLoopCfg.WgCfg.WgType = WGTYPE_SIN; + HsLoopCfg.WgCfg.GainCalEn = bTRUE; + HsLoopCfg.WgCfg.OffsetCalEn = bTRUE; + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + { + AppIMPCfg.FreqofData = AppIMPCfg.SweepCfg.SweepStart; + AppIMPCfg.SweepCurrFreq = AppIMPCfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppIMPCfg.SweepCfg, &AppIMPCfg.SweepNextFreq); + sin_freq = AppIMPCfg.SweepCurrFreq; + } + else + { + sin_freq = AppIMPCfg.SinFreq; + AppIMPCfg.FreqofData = sin_freq; + } + HsLoopCfg.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppIMPCfg.SysClkFreq); + HsLoopCfg.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppIMPCfg.DacVoltPP/800.0f*2047 + 0.5f); + HsLoopCfg.WgCfg.SinCfg.SinOffsetWord = 0; + HsLoopCfg.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&HsLoopCfg); + if(AppIMPCfg.BiasVolt != 0.0f) /* With bias voltage */ + { + LPDACCfg_Type lpdac_cfg; + + lpdac_cfg.LpdacSel = LPDAC0; + lpdac_cfg.LpDacVbiasMux = LPDACVBIAS_12BIT; /* Use Vbias to tuning BiasVolt. */ + lpdac_cfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Vbias-Vzero = BiasVolt */ + lpdac_cfg.DacData6Bit = 0x40>>1; /* Set Vzero to middle scale. */ + if(AppIMPCfg.BiasVolt<-1100.0f) AppIMPCfg.BiasVolt = -1100.0f + DAC12BITVOLT_1LSB; + if(AppIMPCfg.BiasVolt> 1100.0f) AppIMPCfg.BiasVolt = 1100.0f - DAC12BITVOLT_1LSB; + lpdac_cfg.DacData12Bit = (uint32_t)((AppIMPCfg.BiasVolt + 1100.0f)/DAC12BITVOLT_1LSB); + lpdac_cfg.DataRst = bFALSE; /* Do not reset data register */ + lpdac_cfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN|LPDACSW_VZERO2HSTIA; + lpdac_cfg.LpDacRef = LPDACREF_2P5; + lpdac_cfg.LpDacSrc = LPDACSRC_MMR; /* Use MMR data, we use LPDAC to generate bias voltage for LPTIA - the Vzero */ + lpdac_cfg.PowerEn = bTRUE; /* Power up LPDAC */ + AD5940_LPDACCfgS(&lpdac_cfg); + } + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppIMPCfg.AdcPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = AppIMPCfg.ADCAvgNum; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppIMPCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppIMPCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppIMPCfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppIMPCfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppIMPCfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + if(AppIMPCfg.BiasVolt == 0.0f) + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + else + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH|AFECTRL_DCBUFPWR, bTRUE); + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppIMPCfg.InitSeqInfo.SeqId = SEQID_1; + AppIMPCfg.InitSeqInfo.SeqRamAddr = AppIMPCfg.SeqStartAddr; + AppIMPCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppIMPCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppIMPCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + + +static AD5940Err AppIMPSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppIMPCfg.DftSrc; + clks_cal.DataCount = 1L<<(AppIMPCfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppIMPCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppIMPCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = AppIMPCfg.ADCAvgNum; + clks_cal.RatioSys2AdcClk = AppIMPCfg.SysClkFreq/AppIMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin2); /* Set GPIO1, clear others that under control */ + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* @todo wait 250us? */ + sw_cfg.Dswitch = SWD_RCAL0; + sw_cfg.Pswitch = SWP_RCAL0; + sw_cfg.Nswitch = SWN_RCAL1; + sw_cfg.Tswitch = SWT_RCAL1|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator */ + //delay for signal settling DFT_WAIT + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); + //wait for first data ready + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG, bFALSE); /* Stop ADC convert and DFT */ + + /* Configure matrix for external Rz */ + sw_cfg.Dswitch = AppIMPCfg.DswitchSel; + sw_cfg.Pswitch = AppIMPCfg.PswitchSel; + sw_cfg.Nswitch = AppIMPCfg.NswitchSel; + sw_cfg.Tswitch = SWT_TRTIA|AppIMPCfg.TswitchSel; + AD5940_SWMatrixCfgS(&sw_cfg); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_WG, bTRUE); /* Enable Waveform generator */ + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); //delay for signal settling DFT_WAIT + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bFALSE); + AD5940_SEQGpioCtrlS(0); /* Clr GPIO1 */ + + AD5940_EnterSleepS();/* Goto hibernate */ + + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppIMPCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppIMPCfg.MeasureSeqInfo.SeqRamAddr = AppIMPCfg.InitSeqInfo.SeqRamAddr + AppIMPCfg.InitSeqInfo.SeqLen ; + AppIMPCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppIMPCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppIMPCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + + +/* This function provide application initialize. It can also enable Wupt that will automatically trigger sequence. Or it can configure */ +int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bTRUE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppIMPCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppIMPCfg.IMPInited == bFALSE)||\ + (AppIMPCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppIMPSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppIMPSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppIMPCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppIMPCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppIMPCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppIMPCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + + /* Measurement sequence */ + AppIMPCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppIMPCfg.MeasureSeqInfo); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AppIMPCfg.PwrMod, AFEBW_250KHZ); + + AppIMPCfg.IMPInited = bTRUE; /* IMP application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +int32_t AppIMPRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppIMPCfg.NumOfData > 0) + { + AppIMPCfg.FifoDataCount += *pDataCount/4; + if(AppIMPCfg.FifoDataCount >= AppIMPCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppIMPCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppIMPCfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AD5940_WGFreqCtrlS(AppIMPCfg.SweepNextFreq, AppIMPCfg.SysClkFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +int32_t AppIMPDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/4; + + fImpPol_Type * const pOut = (fImpPol_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/4)*4;/* We expect RCAL data together with Rz data. One DFT result has two data in FIFO, real part and imaginary part. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal*pDftRcal->Real+(float)pDftRcal->Image*pDftRcal->Image); + RcalPhase = atan2(-pDftRcal->Image,pDftRcal->Real); + RzMag = sqrt((float)pDftRz->Real*pDftRz->Real+(float)pDftRz->Image*pDftRz->Image); + RzPhase = atan2(-pDftRz->Image,pDftRz->Real); + + RzMag = RcalMag/RzMag*AppIMPCfg.RcalVal; + RzPhase = RcalPhase - RzPhase; + //printf("V:%d,%d,I:%d,%d ",pDftRcal->Real,pDftRcal->Image, pDftRz->Real, pDftRz->Image); + + pOut[i].Magnitude = RzMag; + pOut[i].Phase = RzPhase; + } + *pDataCount = ImpResCount; + AppIMPCfg.FreqofData = AppIMPCfg.SweepCurrFreq; + /* Calculate next frequency point */ + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + { + AppIMPCfg.FreqofData = AppIMPCfg.SweepCurrFreq; + AppIMPCfg.SweepCurrFreq = AppIMPCfg.SweepNextFreq; + AD5940_SweepNext(&AppIMPCfg.SweepCfg, &AppIMPCfg.SweepNextFreq); + } + + return 0; +} + +/** + +*/ +int32_t AppIMPISR(void *pBuff, uint32_t *pCount) +{ + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + + *pCount = 0; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Prohibit AFE to enter sleep mode. */ + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppIMPRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter sleep mode. */ + /* Process data */ + AppIMPDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + + diff --git a/examples/AD5940_Impedance/Impedance.h b/examples/AD5940_Impedance/Impedance.h new file mode 100644 index 0000000..dc3c157 --- /dev/null +++ b/examples/AD5940_Impedance/Impedance.h @@ -0,0 +1,84 @@ +/*! + ***************************************************************************** + @file: Impedance.h + @author: Neo XU + @brief: 4-wire/2-wire impedance measurement header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _IMPEDANCESEQUENCES_H_ +#define _IMPEDANCESEQUENCES_H_ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; +/* Application related parameters */ + float ImpODR; /* */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /* The real frequency of system clock */ + float AdcClkFreq; /* The real frequency of ADC clock */ + float RcalVal; /* Rcal value in Ohm */ + /* Switch Configuration */ + uint32_t DswitchSel; + uint32_t PswitchSel; + uint32_t NswitchSel; + uint32_t TswitchSel; + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t ExcitBufGain; /* Select from EXCTBUFGAIN_2, EXCTBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; + float DacVoltPP; /* DAC output voltage in mV peak to peak. Maximum value is 800mVpp. Peak to peak voltage */ + float BiasVolt; /* The excitation signal is DC+AC. This parameter decides the DC value in mV unit. 0.0mV means no DC bias.*/ + float SinFreq; /* Frequency of excitation signal */ + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + uint32_t AdcPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; + uint8_t ADCSinc2Osr; + uint8_t ADCAvgNum; + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ +/* Private variables for internal usage */ +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag IMPInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ +}AppIMPCfg_Type; + +#define IMPCTRL_START 0 +#define IMPCTRL_STOPNOW 1 +#define IMPCTRL_STOPSYNC 2 +#define IMPCTRL_GETFREQ 3 /* Get Current frequency of returned data from ISR */ +#define IMPCTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + + +int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize); +int32_t AppIMPGetCfg(void *pCfg); +int32_t AppIMPISR(void *pBuff, uint32_t *pCount); +int32_t AppIMPCtrl(uint32_t Command, void *pPara); + +#endif diff --git a/examples/AD5940_Impedance/NUCLEO-F411/AD5940_Impedance.uvoptx b/examples/AD5940_Impedance/NUCLEO-F411/AD5940_Impedance.uvoptx new file mode 100644 index 0000000..615740d --- /dev/null +++ b/examples/AD5940_Impedance/NUCLEO-F411/AD5940_Impedance.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Impedance.c + Impedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Impedance/NUCLEO-F411/AD5940_Impedance.uvprojx b/examples/AD5940_Impedance/NUCLEO-F411/AD5940_Impedance.uvprojx new file mode 100644 index 0000000..3e428dc --- /dev/null +++ b/examples/AD5940_Impedance/NUCLEO-F411/AD5940_Impedance.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Impedance.c + 1 + ..\Impedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Impedance/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Impedance/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Impedance/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Impedance/NUCLEO-F411/main.c b/examples/AD5940_Impedance/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Impedance/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/AD5940Main.c b/examples/AD5940_Impedance_Adjustable_with_frequency/AD5940Main.c new file mode 100644 index 0000000..fa9680e --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/AD5940Main.c @@ -0,0 +1,142 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Standard 4-wire or 2-wire impedance measurement example. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "Impedance.h" + +/** + User could configure following parameters +**/ + +#define APPBUFF_SIZE 512 +uint32_t AppBuff[APPBUFF_SIZE]; + +int32_t ImpedanceShowResult(uint32_t *pData, uint32_t DataCount) +{ + float freq; + + fImpPol_Type *pImp = (fImpPol_Type*)pData; + AppIMPCtrl(IMPCTRL_GETFREQ, &freq); + + printf("Freq:%.2f ", freq); + /*Process data*/ + for(int i=0;iSeqStartAddr = 0; + pImpedanceCfg->MaxSeqLen = 512; /* @todo add checker in function */ + + pImpedanceCfg->RcalVal = 10000.0; + pImpedanceCfg->SinFreq = 60000.0; + pImpedanceCfg->FifoThresh = 4; + + /* Set switch matrix to onboard(EVAL-AD5940ELECZ) dummy sensor. */ + /* Note the RCAL0 resistor is 10kOhm. */ + pImpedanceCfg->DswitchSel = SWD_CE0; + pImpedanceCfg->PswitchSel = SWP_RE0; + pImpedanceCfg->NswitchSel = SWN_SE0; + pImpedanceCfg->TswitchSel = SWT_SE0LOAD; + /* The dummy sensor is as low as 5kOhm. We need to make sure RTIA is small enough that HSTIA won't be saturated. */ + pImpedanceCfg->HstiaRtiaSel = HSTIARTIA_5K; + + /* Configure the sweep function. */ + pImpedanceCfg->SweepCfg.SweepEn = bTRUE; + pImpedanceCfg->SweepCfg.SweepStart = 1.0f; /* Start from 1kHz */ + pImpedanceCfg->SweepCfg.SweepStop = 200e3f; /* Stop at 100kHz */ + pImpedanceCfg->SweepCfg.SweepPoints = 101; /* Points is 101 */ + pImpedanceCfg->SweepCfg.SweepLog = bTRUE; + /* Configure Power Mode. Use HP mode if frequency is higher than 80kHz. */ + pImpedanceCfg->PwrMod = AFEPWR_LP; + /* Configure filters if necessary */ + pImpedanceCfg->ADCSinc3Osr = ADCSINC3OSR_2; /* Sample rate is 800kSPS/2 = 400kSPS */ + pImpedanceCfg->DftNum = DFTNUM_16384; + pImpedanceCfg->DftSrc = DFTSRC_SINC3; +} + +void AD5940_Main(void) +{ + uint32_t temp; + AD5940PlatformCfg(); + AD5940ImpedanceStructInit(); + + AppIMPInit(AppBuff, APPBUFF_SIZE); /* Initialize IMP application. Provide a buffer, which is used to store sequencer commands */ + AppIMPCtrl(IMPCTRL_START, 0); /* Control IMP measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + temp = APPBUFF_SIZE; + AppIMPISR(AppBuff, &temp); + ImpedanceShowResult(AppBuff, temp); + } + } +} + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/.project b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/.project new file mode 100644 index 0000000..4a97130 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/.project @@ -0,0 +1,11 @@ + + + AD5940_Impedance_Adjustable_with_frequency + + + + + + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.rteconfig b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.rteconfig new file mode 100644 index 0000000..e223854 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.rteconfig @@ -0,0 +1,62 @@ + + + + + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.uvoptx b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.uvoptx new file mode 100644 index 0000000..697650c --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.uvoptx @@ -0,0 +1,294 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Impedance.c + Impedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.uvprojx b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.uvprojx new file mode 100644 index 0000000..111d301 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance.uvprojx @@ -0,0 +1,505 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::..\..\Program Files (x86)\ARM_Compiler_5.06u7 + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.1 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 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--git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance_Adjustable_with_frequency.ewp b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance_Adjustable_with_frequency.ewp new file mode 100644 index 0000000..23df817 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance_Adjustable_with_frequency.ewp @@ -0,0 +1,2266 @@ + + + 4 + + Debug + + ARM + + 1 + + General + 3 + + 36 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 38 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 12 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + inputOutputBased + + + + ILINK + 0 + + 27 + 1 + 1 + + + + + + + + + + + + + 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BUILDACTION + 2 + + + + + AD5940Lib + + $PROJ_DIR$\..\..\ad5940lib\ad5940.c + + + $PROJ_DIR$\ADICUP3029Port.c + + + + application + + $PROJ_DIR$\..\AD5940Main.c + + + $PROJ_DIR$\..\Impedance.c + + + $PROJ_DIR$\main.c + + + + CMSIS-Pack + CMSISPack.Component + + $PROJ_DIR$\RTE\RTE_Components.h + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.1"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.6.0"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + <file category="header" condition="TrustZone" name="CMSIS/Core/Include/tz_context.h"/> + <file attr="template" category="sourceC" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="Secure mode 'main' module for ARMv8-M" version="1.1.1"/> + <file attr="template" category="sourceC" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" version="1.1.1"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.1"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.1"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance_Adjustable_with_frequency.rteconfig b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance_Adjustable_with_frequency.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/AD5940_Impedance_Adjustable_with_frequency.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/main.c b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/Impedance.c b/examples/AD5940_Impedance_Adjustable_with_frequency/Impedance.c new file mode 100644 index 0000000..0a0ad3c --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/Impedance.c @@ -0,0 +1,740 @@ +/*! + ***************************************************************************** + @file: Impedance.c + @author: Neo Xu + @brief: standard 4-wire or 2-wire impedance measurement sequences. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*******************************************************************************/ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "Impedance.h" + +/* Default LPDAC resolution(2.5V internal reference). */ +#define DAC12BITVOLT_1LSB (2200.0f/4095) //mV +#define DAC6BITVOLT_1LSB (DAC12BITVOLT_1LSB*64) //mV + +/* + Application configuration structure. Specified by user from template. + The variables are usable in this whole application. + It includes basic configuration for sequencer generator and application related parameters +*/ +AppIMPCfg_Type AppIMPCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .ImpODR = 0.0001, /* 20.0 Hz*/ + .NumOfData = -1, + .SysClkFreq = 16000000.0, + .WuptClkFreq = 32000.0, + .AdcClkFreq = 16000000.0, + .RcalVal = 10000.0, + + .DswitchSel = SWD_CE0, + .PswitchSel = SWP_CE0, + .NswitchSel = SWN_AIN1, + .TswitchSel = SWT_AIN1, + + .PwrMod = AFEPWR_HP, + + .HstiaRtiaSel = HSTIARTIA_5K, + .ExtRtia = 0, //set only when HstiaRtiaSel = HSTIARTIA_OPEN + .ExcitBufGain = EXCITBUFGAIN_0P25,//EXCITBUFGAIN_2, + .HsDacGain = HSDACGAIN_0P2,//HSDACGAIN_1, + .HsDacUpdateRate = 7, + .DacVoltPP = 800.0, + .BiasVolt = -0.0f, + + .SinFreq = 100000.0, /* 1000Hz */ + + .DftNum = DFTNUM_16384, + .DftSrc = DFTSRC_SINC3, + .HanWinEn = bTRUE, + + .AdcPgaGain = ADCPGA_4,//ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .ADCSinc2Osr = ADCSINC2OSR_22, + + .ADCAvgNum = ADCAVGNUM_16, + + .SweepCfg.SweepEn = bTRUE, + .SweepCfg.SweepStart = 1000, + .SweepCfg.SweepStop = 100000.0, + .SweepCfg.SweepPoints = 101, + .SweepCfg.SweepLog = bFALSE, + .SweepCfg.SweepIndex = 0, + + .FifoThresh = 4, + .IMPInited = bFALSE, + .StopRequired = bFALSE, +}; + +/** + This function is provided for upper controllers that want to change + application parameters specially for user defined parameters. +*/ +int32_t AppIMPGetCfg(void *pCfg) +{ + if(pCfg) + { + *(AppIMPCfg_Type**)pCfg = &AppIMPCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +int32_t AppIMPCtrl(uint32_t Command, void *pPara) +{ + + switch (Command) + { + case IMPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppIMPCfg.IMPInited == bFALSE) + return AD5940ERR_APPERROR; + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppIMPCfg.WuptClkFreq/AppIMPCfg.ImpODR)-4; + AD5940_WUPTCfg(&wupt_cfg); + + AppIMPCfg.FifoDataCount = 0; /* restart */ + break; + } + case IMPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case IMPCTRL_STOPSYNC: + { + AppIMPCfg.StopRequired = bTRUE; + break; + } + case IMPCTRL_GETFREQ: + { + if(pPara == 0) + return AD5940ERR_PARA; + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + *(float*)pPara = AppIMPCfg.FreqofData; + else + *(float*)pPara = AppIMPCfg.SinFreq; + } + break; + case IMPCTRL_SHUTDOWN: + { + AppIMPCtrl(IMPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + /* Turn off LPloop related blocks which are not controlled automatically by hibernate operation */ + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lp_loop; + memset(&aferef_cfg, 0, sizeof(aferef_cfg)); + AD5940_REFCfgS(&aferef_cfg); + memset(&lp_loop, 0, sizeof(lp_loop)); + AD5940_LPLoopCfgS(&lp_loop); + AD5940_EnterSleepS(); /* Enter Hibernate */ + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/* generated code snnipet */ +float AppIMPGetCurrFreq(void) +{ + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + return AppIMPCfg.FreqofData; + else + return AppIMPCfg.SinFreq; +} + +/* Application initialization */ +static AD5940Err AppIMPSeqCfgGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type HsLoopCfg; + DSPCfg_Type dsp_cfg; + float sin_freq; + + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + if(AppIMPCfg.BiasVolt != 0.0f) /* With bias voltage */ + { + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + } + else + { + aferef_cfg.LpBandgapEn = bFALSE; + aferef_cfg.LpRefBufEn = bFALSE; + } + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + HsLoopCfg.HsDacCfg.ExcitBufGain = AppIMPCfg.ExcitBufGain; + HsLoopCfg.HsDacCfg.HsDacGain = AppIMPCfg.HsDacGain; + HsLoopCfg.HsDacCfg.HsDacUpdateRate = AppIMPCfg.HsDacUpdateRate; + + HsLoopCfg.HsTiaCfg.DiodeClose = bFALSE; + if(AppIMPCfg.BiasVolt != 0.0f) /* With bias voltage */ + HsLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_VZERO0; + else + HsLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + HsLoopCfg.HsTiaCfg.HstiaCtia = 31; /* 31pF + 2pF */ + HsLoopCfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + HsLoopCfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_OPEN; + HsLoopCfg.HsTiaCfg.HstiaRtiaSel = AppIMPCfg.HstiaRtiaSel; + + HsLoopCfg.SWMatCfg.Dswitch = AppIMPCfg.DswitchSel; + HsLoopCfg.SWMatCfg.Pswitch = AppIMPCfg.PswitchSel; + HsLoopCfg.SWMatCfg.Nswitch = AppIMPCfg.NswitchSel; + HsLoopCfg.SWMatCfg.Tswitch = SWT_TRTIA|AppIMPCfg.TswitchSel; + + HsLoopCfg.WgCfg.WgType = WGTYPE_SIN; + HsLoopCfg.WgCfg.GainCalEn = bTRUE; + HsLoopCfg.WgCfg.OffsetCalEn = bTRUE; + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + { + AppIMPCfg.FreqofData = AppIMPCfg.SweepCfg.SweepStart; + AppIMPCfg.SweepCurrFreq = AppIMPCfg.SweepCfg.SweepStart; + AD5940_SweepNext(&AppIMPCfg.SweepCfg, &AppIMPCfg.SweepNextFreq); + sin_freq = AppIMPCfg.SweepCurrFreq; + } + else + { + sin_freq = AppIMPCfg.SinFreq; + AppIMPCfg.FreqofData = sin_freq; + } + HsLoopCfg.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(sin_freq, AppIMPCfg.SysClkFreq); + HsLoopCfg.WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(AppIMPCfg.DacVoltPP/800.0f*2047 + 0.5f); + HsLoopCfg.WgCfg.SinCfg.SinOffsetWord = 0; + HsLoopCfg.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&HsLoopCfg); + if(AppIMPCfg.BiasVolt != 0.0f) /* With bias voltage */ + { + LPDACCfg_Type lpdac_cfg; + + lpdac_cfg.LpdacSel = LPDAC0; + lpdac_cfg.LpDacVbiasMux = LPDACVBIAS_12BIT; /* Use Vbias to tuning BiasVolt. */ + lpdac_cfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Vbias-Vzero = BiasVolt */ + lpdac_cfg.DacData6Bit = 0x40>>1; /* Set Vzero to middle scale. */ + if(AppIMPCfg.BiasVolt<-1100.0f) AppIMPCfg.BiasVolt = -1100.0f + DAC12BITVOLT_1LSB; + if(AppIMPCfg.BiasVolt> 1100.0f) AppIMPCfg.BiasVolt = 1100.0f - DAC12BITVOLT_1LSB; + lpdac_cfg.DacData12Bit = (uint32_t)((AppIMPCfg.BiasVolt + 1100.0f)/DAC12BITVOLT_1LSB); + lpdac_cfg.DataRst = bFALSE; /* Do not reset data register */ + lpdac_cfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN|LPDACSW_VZERO2HSTIA; + lpdac_cfg.LpDacRef = LPDACREF_2P5; + lpdac_cfg.LpDacSrc = LPDACSRC_MMR; /* Use MMR data, we use LPDAC to generate bias voltage for LPTIA - the Vzero */ + lpdac_cfg.PowerEn = bTRUE; /* Power up LPDAC */ + AD5940_LPDACCfgS(&lpdac_cfg); + } + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_HSTIA_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_HSTIA_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppIMPCfg.AdcPgaGain; + + memset(&dsp_cfg.ADCDigCompCfg, 0, sizeof(dsp_cfg.ADCDigCompCfg)); + + dsp_cfg.ADCFilterCfg.ADCAvgNum = AppIMPCfg.ADCAvgNum; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* Tell filter block clock rate of ADC*/ + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = AppIMPCfg.ADCSinc2Osr; + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppIMPCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.DftCfg.DftNum = AppIMPCfg.DftNum; + dsp_cfg.DftCfg.DftSrc = AppIMPCfg.DftSrc; + dsp_cfg.DftCfg.HanWinEn = AppIMPCfg.HanWinEn; + + memset(&dsp_cfg.StatCfg, 0, sizeof(dsp_cfg.StatCfg)); + AD5940_DSPCfgS(&dsp_cfg); + + /* Enable all of them. They are automatically turned off during hibernate mode to save power */ + if(AppIMPCfg.BiasVolt == 0.0f) + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + else + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH|AFECTRL_DCBUFPWR, bTRUE); + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop here */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + if(error == AD5940ERR_OK) + { + AppIMPCfg.InitSeqInfo.SeqId = SEQID_1; + AppIMPCfg.InitSeqInfo.SeqRamAddr = AppIMPCfg.SeqStartAddr; + AppIMPCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppIMPCfg.InitSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppIMPCfg.InitSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + + +static AD5940Err AppIMPSeqMeasureGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + SWMatrixCfg_Type sw_cfg; + ClksCalInfo_Type clks_cal; + + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = AppIMPCfg.DftSrc; + clks_cal.DataCount = 1L<<(AppIMPCfg.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = AppIMPCfg.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = AppIMPCfg.ADCSinc3Osr; + clks_cal.ADCAvgNum = AppIMPCfg.ADCAvgNum; + clks_cal.RatioSys2AdcClk = AppIMPCfg.SysClkFreq/AppIMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin2); /* Set GPIO1, clear others that under control */ + AD5940_SEQGenInsert(SEQ_WAIT(16*250)); /* @todo wait 250us? */ + sw_cfg.Dswitch = SWD_RCAL0; + sw_cfg.Pswitch = SWP_RCAL0; + sw_cfg.Nswitch = SWN_RCAL1; + sw_cfg.Tswitch = SWT_RCAL1|SWT_TRTIA; + AD5940_SWMatrixCfgS(&sw_cfg); + + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bTRUE); + AD5940_AFECtrlS(AFECTRL_WG|AFECTRL_ADCPWR, bTRUE); /* Enable Waveform generator */ + //delay for signal settling DFT_WAIT + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + + AD5940_SEQGenFetchSeq(NULL, &AppIMPCfg.SeqWaitAddr[0]); /* Record the start address of the next command. */ + + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks/2)); + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks/2)); + + //wait for first data ready + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG, bFALSE); /* Stop ADC convert and DFT */ + + /* Configure matrix for external Rz */ + sw_cfg.Dswitch = AppIMPCfg.DswitchSel; + sw_cfg.Pswitch = AppIMPCfg.PswitchSel; + sw_cfg.Nswitch = AppIMPCfg.NswitchSel; + sw_cfg.Tswitch = SWT_TRTIA|AppIMPCfg.TswitchSel; + AD5940_SWMatrixCfgS(&sw_cfg); + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_WG, bTRUE); /* Enable Waveform generator */ + AD5940_SEQGenInsert(SEQ_WAIT(16*10)); //delay for signal settling DFT_WAIT + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT, bTRUE); /* Start ADC convert and DFT */ + + AD5940_SEQGenFetchSeq(NULL, &AppIMPCfg.SeqWaitAddr[1]); /* Record the start address of next command */ + + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks/2)); + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks/2)); + + AD5940_AFECtrlS(AFECTRL_ADCCNV|AFECTRL_DFT|AFECTRL_WG|AFECTRL_ADCPWR, bFALSE); /* Stop ADC convert and DFT */ + AD5940_AFECtrlS(AFECTRL_HSTIAPWR|AFECTRL_INAMPPWR|AFECTRL_EXTBUFPWR|\ + AFECTRL_WG|AFECTRL_DACREFPWR|AFECTRL_HSDACPWR|\ + AFECTRL_SINC2NOTCH, bFALSE); + AD5940_SEQGpioCtrlS(0); /* Clr GPIO1 */ + + AD5940_EnterSleepS();/* Goto hibernate */ + + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AppIMPCfg.MeasureSeqInfo.SeqId = SEQID_0; + AppIMPCfg.MeasureSeqInfo.SeqRamAddr = AppIMPCfg.InitSeqInfo.SeqRamAddr + AppIMPCfg.InitSeqInfo.SeqLen ; + AppIMPCfg.MeasureSeqInfo.pSeqCmd = pSeqCmd; + AppIMPCfg.MeasureSeqInfo.SeqLen = SeqLen; + /* Write command to SRAM */ + AD5940_SEQCmdWrite(AppIMPCfg.MeasureSeqInfo.SeqRamAddr, pSeqCmd, SeqLen); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/* Depending on frequency of Sin wave set optimum filter settings */ +AD5940Err AppIMPCheckFreq(float freq) +{ + ADCFilterCfg_Type filter_cfg; + DFTCfg_Type dft_cfg; + HSDACCfg_Type hsdac_cfg; + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + FreqParams_Type freq_params; + uint32_t SeqCmdBuff[32]; + uint32_t SRAMAddr = 0;; + /* Step 1: Check Frequency */ + freq_params = AD5940_GetFreqParameters(freq); + + if(freq < 0.51) + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain =EXCITBUFGAIN_2;// AppIMPCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = HSDACGAIN_1;//AppIMPCfg.HsDacGain; + hsdac_cfg.HsDacUpdateRate = 0x1B; + AD5940_HSDacCfgS(&hsdac_cfg); + AD5940_HSRTIACfgS(HSTIARTIA_40K); //set as per load current range + + /*Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_800KHZ; + AppIMPCfg.AdcClkFreq = 16e6; + + /* Change clock to 16MHz oscillator */ + AD5940_HPModeEn(bFALSE); + } + else if(freq < 5 ) + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain =EXCITBUFGAIN_2;// AppIMPCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = HSDACGAIN_1;//AppIMPCfg.HsDacGain; + hsdac_cfg.HsDacUpdateRate = 0x1B; + AD5940_HSDacCfgS(&hsdac_cfg); + AD5940_HSRTIACfgS(HSTIARTIA_40K); //set as per load current range + + /*Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_800KHZ; + AppIMPCfg.AdcClkFreq = 16e6; + + /* Change clock to 16MHz oscillator */ + AD5940_HPModeEn(bFALSE); + + }else if(freq < 450) + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain =AppIMPCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = AppIMPCfg.HsDacGain; + + hsdac_cfg.HsDacUpdateRate = 0x1B; + AD5940_HSDacCfgS(&hsdac_cfg); + AD5940_HSRTIACfgS(HSTIARTIA_5K); //set as per load current range + + /*Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_800KHZ; + AppIMPCfg.AdcClkFreq = 16e6; + + /* Change clock to 16MHz oscillator */ + AD5940_HPModeEn(bFALSE); + } + else if(freq<80000) + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain =AppIMPCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = AppIMPCfg.HsDacGain; + hsdac_cfg.HsDacUpdateRate = 0x1B; + AD5940_HSDacCfgS(&hsdac_cfg); + AD5940_HSRTIACfgS(HSTIARTIA_5K); //set as per load current range + + /*Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_800KHZ; + AppIMPCfg.AdcClkFreq = 16e6; + + /* Change clock to 16MHz oscillator */ + AD5940_HPModeEn(bFALSE); + } + /* High power mode */ + if(freq >= 80000) + { + /* Update HSDAC update rate */ + hsdac_cfg.ExcitBufGain =AppIMPCfg.ExcitBufGain; + hsdac_cfg.HsDacGain = AppIMPCfg.HsDacGain; + hsdac_cfg.HsDacUpdateRate = 0x07; + AD5940_HSDacCfgS(&hsdac_cfg); + AD5940_HSRTIACfgS(HSTIARTIA_5K); //set as per load current range + + /*Update ADC rate */ + filter_cfg.ADCRate = ADCRATE_1P6MHZ; + AppIMPCfg.AdcClkFreq = 32e6; + + /* Change clock to 32MHz oscillator */ + AD5940_HPModeEn(bTRUE); + } + + /* Step 2: Adjust ADCFILTERCON and DFTCON to set optimumn SINC3, SINC2 and DFTNUM settings */ + filter_cfg.ADCAvgNum = ADCAVGNUM_16; /* Don't care because it's disabled */ + filter_cfg.ADCSinc2Osr = freq_params.ADCSinc2Osr; + filter_cfg.ADCSinc3Osr = freq_params.ADCSinc3Osr; + filter_cfg.BpSinc3 = bFALSE; + filter_cfg.BpNotch = bTRUE; + filter_cfg.Sinc2NotchEnable = bTRUE; + dft_cfg.DftNum = freq_params.DftNum; + dft_cfg.DftSrc = freq_params.DftSrc; + dft_cfg.HanWinEn = AppIMPCfg.HanWinEn; + AD5940_ADCFilterCfgS(&filter_cfg); + AD5940_DFTCfgS(&dft_cfg); + + /* Step 3: Calculate clocks needed to get result to FIFO and update sequencer wait command */ + clks_cal.DataType = DATATYPE_DFT; + clks_cal.DftSrc = freq_params.DftSrc; + clks_cal.DataCount = 1L<<(freq_params.DftNum+2); /* 2^(DFTNUMBER+2) */ + clks_cal.ADCSinc2Osr = freq_params.ADCSinc2Osr; + clks_cal.ADCSinc3Osr = freq_params.ADCSinc3Osr; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = AppIMPCfg.SysClkFreq/AppIMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + + SRAMAddr = AppIMPCfg.MeasureSeqInfo.SeqRamAddr + AppIMPCfg.SeqWaitAddr[0]; + + SeqCmdBuff[0] =SEQ_WAIT(WaitClks/2); + SeqCmdBuff[1] =SEQ_WAIT(WaitClks/2); + + AD5940_SEQCmdWrite(SRAMAddr, SeqCmdBuff, 2); + + SRAMAddr = AppIMPCfg.MeasureSeqInfo.SeqRamAddr + AppIMPCfg.SeqWaitAddr[1]; + + SeqCmdBuff[0] =SEQ_WAIT(WaitClks/2); + SeqCmdBuff[1] =SEQ_WAIT(WaitClks/2); + + AD5940_SEQCmdWrite(SRAMAddr, SeqCmdBuff, 2); + + + return AD5940ERR_OK; +} + + +/* This function provide application initialize. It can also enable Wupt that will automatically trigger sequence. Or it can configure */ +int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bTRUE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = AppIMPCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppIMPCfg.IMPInited == bFALSE)||\ + (AppIMPCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + AD5940_SEQGenInit(pBuffer, BufferSize); + + /* Generate initialize sequence */ + error = AppIMPSeqCfgGen(); /* Application initialization sequence using either MCU or sequencer */ + if(error != AD5940ERR_OK) return error; + + /* Generate measurement sequence */ + error = AppIMPSeqMeasureGen(); + if(error != AD5940ERR_OK) return error; + + AppIMPCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Initialization sequencer */ + AppIMPCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppIMPCfg.InitSeqInfo); + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppIMPCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + /* Measurement sequence */ + AppIMPCfg.MeasureSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppIMPCfg.MeasureSeqInfo); + + AppIMPCheckFreq(AppIMPCfg.FreqofData); + + seq_cfg.SeqEnable = bTRUE; + AD5940_SEQCfg(&seq_cfg); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + //AD5940_AFEPwrBW(AppIMPCfg.PwrMod, AFEBW_250KHZ); + + AppIMPCfg.IMPInited = bTRUE; /* IMP application has been initialized. */ + return AD5940ERR_OK; +} + +/* Modify registers when AFE wakeup */ +int32_t AppIMPRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppIMPCfg.NumOfData > 0) + { + AppIMPCfg.FifoDataCount += *pDataCount/4; + if(AppIMPCfg.FifoDataCount >= AppIMPCfg.NumOfData) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + } + if(AppIMPCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + if(AppIMPCfg.SweepCfg.SweepEn) /* Need to set new frequency and set power mode */ + { + AD5940_WGFreqCtrlS(AppIMPCfg.SweepNextFreq, AppIMPCfg.SysClkFreq); + AppIMPCheckFreq(AppIMPCfg.SweepNextFreq); + } + return AD5940ERR_OK; +} + +/* Depending on the data type, do appropriate data pre-process before return back to controller */ +int32_t AppIMPDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t DataCount = *pDataCount; + uint32_t ImpResCount = DataCount/4; + + fImpPol_Type * const pOut = (fImpPol_Type*)pData; + iImpCar_Type * pSrcData = (iImpCar_Type*)pData; + + *pDataCount = 0; + + DataCount = (DataCount/4)*4;/* We expect RCAL data together with Rz data. One DFT result has two data in FIFO, real part and imaginary part. */ + + /* Convert DFT result to int32_t type */ + for(uint32_t i=0; iReal*pDftRcal->Real+(float)pDftRcal->Image*pDftRcal->Image); + RcalPhase = atan2(-pDftRcal->Image,pDftRcal->Real); + RzMag = sqrt((float)pDftRz->Real*pDftRz->Real+(float)pDftRz->Image*pDftRz->Image); + RzPhase = atan2(-pDftRz->Image,pDftRz->Real); + + RzMag = RcalMag/RzMag*AppIMPCfg.RcalVal; + RzPhase = RcalPhase - RzPhase; + //printf("V:%d,%d,I:%d,%d ",pDftRcal->Real,pDftRcal->Image, pDftRz->Real, pDftRz->Image); + + pOut[i].Magnitude = RzMag; + pOut[i].Phase = RzPhase; + } + *pDataCount = ImpResCount; + AppIMPCfg.FreqofData = AppIMPCfg.SweepCurrFreq; + /* Calculate next frequency point */ + if(AppIMPCfg.SweepCfg.SweepEn == bTRUE) + { + AppIMPCfg.FreqofData = AppIMPCfg.SweepCurrFreq; + AppIMPCfg.SweepCurrFreq = AppIMPCfg.SweepNextFreq; + AD5940_SweepNext(&AppIMPCfg.SweepCfg, &AppIMPCfg.SweepNextFreq); + } + + return 0; +} + +/** + +*/ +int32_t AppIMPISR(void *pBuff, uint32_t *pCount) +{ + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + + *pCount = 0; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* Prohibit AFE to enter sleep mode. */ + + if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE) + { + /* Now there should be 4 data in FIFO */ + FifoCnt = (AD5940_FIFOGetCnt()/4)*4; + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppIMPRegModify(pBuff, &FifoCnt); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + //AD5940_EnterSleepS(); /* Manually put AFE back to hibernate mode. This operation only takes effect when register value is ACTIVE previously */ + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter sleep mode. */ + /* Process data */ + AppIMPDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + + return 0; +} + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/Impedance.h b/examples/AD5940_Impedance_Adjustable_with_frequency/Impedance.h new file mode 100644 index 0000000..c24cdf5 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/Impedance.h @@ -0,0 +1,85 @@ +/*! + ***************************************************************************** + @file: Impedance.h + @author: Neo XU + @brief: 4-wire/2-wire impedance measurement header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _IMPEDANCESEQUENCES_H_ +#define _IMPEDANCESEQUENCES_H_ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" + +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /* Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /* Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /* Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /* Measurement sequence start address in SRAM of AD5940 */ + uint32_t SeqWaitAddr[2]; + uint32_t MaxSeqLenCal; +/* Application related parameters */ + float ImpODR; /* */ + int32_t NumOfData; /* By default it's '-1'. If you want the engine stops after get NumofData, then set the value here. Otherwise, set it to '-1' which means never stop. */ + float WuptClkFreq; /* The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /* The real frequency of system clock */ + float AdcClkFreq; /* The real frequency of ADC clock */ + float RcalVal; /* Rcal value in Ohm */ + /* Switch Configuration */ + uint32_t DswitchSel; + uint32_t PswitchSel; + uint32_t NswitchSel; + uint32_t TswitchSel; + uint32_t PwrMod; /* Control Chip power mode(LP/HP) */ + uint32_t HstiaRtiaSel; /* Use internal RTIA, select from RTIA_INT_200, RTIA_INT_1K, RTIA_INT_5K, RTIA_INT_10K, RTIA_INT_20K, RTIA_INT_40K, RTIA_INT_80K, RTIA_INT_160K */ + uint32_t ExcitBufGain; /* Select from EXCTBUFGAIN_2, EXCTBUFGAIN_0P25 */ + uint32_t HsDacGain; /* Select from HSDACGAIN_1, HSDACGAIN_0P2 */ + uint32_t HsDacUpdateRate; + float DacVoltPP; /* DAC output voltage in mV peak to peak. Maximum value is 800mVpp. Peak to peak voltage */ + float BiasVolt; /* The excitation signal is DC+AC. This parameter decides the DC value in mV unit. 0.0mV means no DC bias.*/ + float SinFreq; /* Frequency of excitation signal */ + uint32_t DftNum; /* DFT number */ + uint32_t DftSrc; /* DFT Source */ + BoolFlag HanWinEn; /* Enable Hanning window */ + uint32_t AdcPgaGain; /* PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; + uint8_t ADCSinc2Osr; + uint8_t ADCAvgNum; + /* Sweep Function Control */ + SoftSweepCfg_Type SweepCfg; + uint32_t FifoThresh; /* FIFO threshold. Should be N*4 */ +/* Private variables for internal usage */ +/* Private variables for internal usage */ + float SweepCurrFreq; + float SweepNextFreq; + float FreqofData; /* The frequency of latest data sampled */ + BoolFlag IMPInited; /* If the program run firstly, generated sequence commands */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type MeasureSeqInfo; + BoolFlag StopRequired; /* After FIFO is ready, stop the measurement sequence */ + uint32_t FifoDataCount; /* Count how many times impedance have been measured */ +}AppIMPCfg_Type; + +#define IMPCTRL_START 0 +#define IMPCTRL_STOPNOW 1 +#define IMPCTRL_STOPSYNC 2 +#define IMPCTRL_GETFREQ 3 /* Get Current frequency of returned data from ISR */ +#define IMPCTRL_SHUTDOWN 4 /* Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + + +int32_t AppIMPInit(uint32_t *pBuffer, uint32_t BufferSize); +int32_t AppIMPGetCfg(void *pCfg); +int32_t AppIMPISR(void *pBuff, uint32_t *pCount); +int32_t AppIMPCtrl(uint32_t Command, void *pPara); + +#endif diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/AD5940_Impedance.uvoptx b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/AD5940_Impedance.uvoptx new file mode 100644 index 0000000..615740d --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/AD5940_Impedance.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\Impedance.c + Impedance.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/AD5940_Impedance.uvprojx b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/AD5940_Impedance.uvprojx new file mode 100644 index 0000000..3e428dc --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/AD5940_Impedance.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + Impedance.c + 1 + ..\Impedance.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/main.c b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Impedance_Adjustable_with_frequency/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_LPDAC/AD5940_LPDAC.c b/examples/AD5940_LPDAC/AD5940_LPDAC.c new file mode 100644 index 0000000..3949529 --- /dev/null +++ b/examples/AD5940_LPDAC/AD5940_LPDAC.c @@ -0,0 +1,67 @@ +/*! + ***************************************************************************** + @file: AD5940_LPDAC.c + @author: Neo Xu + @brief: Low power DAC example. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** + * Note: This example will use LP loop to output voltage on RE0 pin. + * LPDAC reference: internal 2.5V + * LP PA(potentialstat amplifier) is used to buffer voltage from Vbias which connects to 12bit LPDAC output +**/ + +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" + +void AD5940_Main(void) +{ + AFERefCfg_Type ref_cfg; + LPLoopCfg_Type lp_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + AD5940_Initialize(); + + /* Initialize everything to zero(false/OFF/PowerDown), only turn on what we need */ + AD5940_StructInit(&ref_cfg, sizeof(ref_cfg)); + ref_cfg.LpBandgapEn = bTRUE; /* Enable low power bandgap */ + ref_cfg.LpRefBufEn = bTRUE; /* Enable the low power reference buffer - 2.5V output */ + AD5940_REFCfgS(&ref_cfg); /* Call reference configuration function */ + + AD5940_StructInit(&lp_cfg, sizeof(lp_cfg)); /* Reset everything to zero(OFF) */ + /* Configure what we need below */ + lp_cfg.LpDacCfg.LpdacSel = LPDAC0; /* Select LPDAC0. Note LPDAC1 is available on ADuCM355 */ + lp_cfg.LpDacCfg.DacData12Bit = 0x800; /* Output midscale voltage (0.2V + 2.4V)/2 = 1.3V */ + lp_cfg.LpDacCfg.DacData6Bit = 0; /* 6Bit DAC data */ + lp_cfg.LpDacCfg.DataRst =bFALSE; /* Do not keep DATA registers at reset status */ + lp_cfg.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; /* Select internal 2.5V reference */ + lp_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; /* The LPDAC data comes from MMR not WG in this case */ + lp_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; /* Connect Vbias signal to 12Bit LPDAC output */ + lp_cfg.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Connect Vzero signal to 6bit LPDAC output */ + lp_cfg.LpDacCfg.PowerEn = bTRUE; /* Power up LPDAC */ + lp_cfg.LpAmpCfg.LpAmpSel = LPAMP0; + lp_cfg.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Set low power amplifiers to normal power mode */ + lp_cfg.LpAmpCfg.LpPaPwrEn = bTRUE; /* Enable LP PA(potentialstat amplifier) power */ + lp_cfg.LpAmpCfg.LpTiaPwrEn = bTRUE; /* Leave LPTIA power off */ + lp_cfg.LpAmpCfg.LpTiaSW = LPTIASW(12)|LPTIASW(13)|LPTIASW(2)|LPTIASW(10)\ + |LPTIASW(5)|LPTIASW(9); /* Close these switches to make sure LP PA amplifier is closed loop */ + lp_cfg.LpAmpCfg.LpTiaRf = LPTIARF_SHORT; + lp_cfg.LpAmpCfg.LpTiaRtia = LPTIARTIA_200R; + lp_cfg.LpAmpCfg.LpTiaRload = LPTIARLOAD_100R; + + AD5940_LPLoopCfgS(&lp_cfg); + while(1); +} + diff --git a/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.ewd b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 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+ + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.rteconfig b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.uvoptx b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.uvoptx new file mode 100644 index 0000000..7215fb9 --- /dev/null +++ b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.uvoptx @@ -0,0 +1,306 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ 0 + 0 + 0 + 0 + 0 + 1 + C:\Users\neo\Documents\gitprojects\ad5940-examples\examples\AD5940_BioElec\AD5940_LPDAC.c + + \\ADICUP3029\../AD5940_LPDAC.c\110 + + + + + 0 + 1 + VzeroCode + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_LPDAC.c + AD5940_LPDAC.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.uvprojx b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.uvprojx new file mode 100644 index 0000000..230a517 --- /dev/null +++ b/examples/AD5940_LPDAC/ADICUP3029/AD5940_LPDAC.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060528::V5.06 update 5 (build 528)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_LPDAC.c + 1 + ..\AD5940_LPDAC.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_LPDAC/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_LPDAC/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_LPDAC/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_LPDAC/ADICUP3029/main.c b/examples/AD5940_LPDAC/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_LPDAC/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_LPDAC/NUCLEO-F411/AD5940_LPDAC.uvoptx b/examples/AD5940_LPDAC/NUCLEO-F411/AD5940_LPDAC.uvoptx new file mode 100644 index 0000000..5df700d --- /dev/null +++ b/examples/AD5940_LPDAC/NUCLEO-F411/AD5940_LPDAC.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_LPDAC.c + AD5940_LPDAC.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_LPDAC/NUCLEO-F411/AD5940_LPDAC.uvprojx b/examples/AD5940_LPDAC/NUCLEO-F411/AD5940_LPDAC.uvprojx new file mode 100644 index 0000000..ac5bb4e --- /dev/null +++ b/examples/AD5940_LPDAC/NUCLEO-F411/AD5940_LPDAC.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_LPDAC.c + 1 + ..\AD5940_LPDAC.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_LPDAC/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_LPDAC/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_LPDAC/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_LPDAC/NUCLEO-F411/main.c b/examples/AD5940_LPDAC/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_LPDAC/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_LPLoop/AD5940_LpLoop.c b/examples/AD5940_LPLoop/AD5940_LpLoop.c new file mode 100644 index 0000000..c85d59c --- /dev/null +++ b/examples/AD5940_LPLoop/AD5940_LpLoop.c @@ -0,0 +1,64 @@ +/*! + ***************************************************************************** + @file: AD5940_LpLoop.c + @author: Neo Xu + @brief: Example of using low power loop amplifiers and LPDAC. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** + * Note: This example will use LP loop to output voltage on RE0 pin. + * LPDAC reference: internal 2.5V + * LP PA(potentialstat amplifier) is used to buffer voltage from Vbias which connects to 12bit LPDAC output +**/ + +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" + +void AD5940_Main(void) +{ + AFERefCfg_Type ref_cfg; + LPLoopCfg_Type lp_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + AD5940_Initialize(); + + /* Initialize everything to zero(false/OFF/PowerDown), only turn on what we need */ + AD5940_StructInit(&ref_cfg, sizeof(ref_cfg)); + ref_cfg.LpBandgapEn = bTRUE; /* Enable low power bandgap */ + ref_cfg.LpRefBufEn = bTRUE; /* Enable the low power reference buffer - 2.5V output */ + AD5940_REFCfgS(&ref_cfg); /* Call reference configuration function */ + + AD5940_StructInit(&lp_cfg, sizeof(lp_cfg)); /* Reset everything to zero(OFF) */ + /* Configure what we need below */ + lp_cfg.LpDacCfg.LpdacSel = LPDAC0; + lp_cfg.LpDacCfg.DacData12Bit = 0x800; /* Output midscale voltage (0.2V + 2.4V)/2 = 1.3V */ + lp_cfg.LpDacCfg.DacData6Bit = 0; /* 6Bit DAC data */ + lp_cfg.LpDacCfg.DataRst =bFALSE; /* Do not keep DATA registers at reset status */ + lp_cfg.LpDacCfg.LpDacSW = LPDACSW_VBIAS2PIN|LPDACSW_VZERO2PIN;//LPDACSW_VBIAS2LPPA|LPDACSW_VBIAS2PIN|LPDACSW_VZERO2LPTIA|LPDACSW_VZERO2PIN; + lp_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; /* Select internal 2.5V reference */ + lp_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; /* The LPDAC data comes from MMR not WG in this case */ + lp_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; /* Connect Vbias signal to 12Bit LPDAC output */ + lp_cfg.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Connect Vzero signal to 6bit LPDAC output */ + lp_cfg.LpDacCfg.PowerEn = bTRUE; /* Power up LPDAC */ + + lp_cfg.LpAmpCfg.LpAmpSel = LPAMP0; + lp_cfg.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Set low power amplifiers to normal power mode */ + lp_cfg.LpAmpCfg.LpPaPwrEn = bTRUE; /* Enable LP PA(potentialstat amplifier) power */ + lp_cfg.LpAmpCfg.LpTiaPwrEn = bFALSE; /* Leave LPTIA power off */ + lp_cfg.LpAmpCfg.LpTiaSW = LPTIASW(12)|LPTIASW(15)|LPTIASW(4); /* Close these switches to make sure LP PA amplifier is closed loop */ + AD5940_LPLoopCfgS(&lp_cfg); + AD5940_LPDAC0WriteS(0x800,31); + while(1); +} + diff --git a/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.ewd b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> +<url>http://www.keil.com/dd2/analogdevices/aducm3029</url> +<package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> +</device> +<toolchain Tcompiler="IAR" Toutput="exe"/> +<components/> +<apis/> +</configuration> + + + diff --git a/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.rteconfig b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.rteconfig new file mode 100644 index 0000000..c3f2bd4 --- /dev/null +++ b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.rteconfig @@ -0,0 +1,11 @@ + + + + +http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + diff --git a/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.uvoptx b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.uvoptx new file mode 100644 index 0000000..667d777 --- /dev/null +++ b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.uvoptx @@ -0,0 +1,282 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 2 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_LpLoop.c + AD5940_LpLoop.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.uvprojx b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.uvprojx new file mode 100644 index 0000000..d3d9abb --- /dev/null +++ b/examples/AD5940_LPLoop/ADICUP3029/AD5940_LPLoop.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060528::V5.06 update 5 (build 528)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_LpLoop.c + 1 + ..\AD5940_LpLoop.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_LPLoop/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_LPLoop/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_LPLoop/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_LPLoop/ADICUP3029/main.c b/examples/AD5940_LPLoop/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_LPLoop/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_LPLoop/NUCLEO-F411/AD5940_LPLoop.uvoptx b/examples/AD5940_LPLoop/NUCLEO-F411/AD5940_LPLoop.uvoptx new file mode 100644 index 0000000..13383bb --- /dev/null +++ b/examples/AD5940_LPLoop/NUCLEO-F411/AD5940_LPLoop.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_LpLoop.c + AD5940_LpLoop.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_LPLoop/NUCLEO-F411/AD5940_LPLoop.uvprojx b/examples/AD5940_LPLoop/NUCLEO-F411/AD5940_LPLoop.uvprojx new file mode 100644 index 0000000..3cd7613 --- /dev/null +++ b/examples/AD5940_LPLoop/NUCLEO-F411/AD5940_LPLoop.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_LpLoop.c + 1 + ..\AD5940_LpLoop.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_LPLoop/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_LPLoop/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_LPLoop/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_LPLoop/NUCLEO-F411/main.c b/examples/AD5940_LPLoop/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_LPLoop/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Ramp/AD5940Main.c b/examples/AD5940_Ramp/AD5940Main.c new file mode 100644 index 0000000..72a726a --- /dev/null +++ b/examples/AD5940_Ramp/AD5940Main.c @@ -0,0 +1,171 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: Neo Xu + @brief: Example of ramp test for electro-chemical sensor. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "RampTest.h" + +/** + User could configure following parameters +**/ + +#define APPBUFF_SIZE 1024 +uint32_t AppBuff[APPBUFF_SIZE]; +float LFOSCFreq; /* Measured LFOSC frequency */ + +/** + * @brief An example to deal with data read back from AD5940. Here we just print data to UART + * @note UART has limited speed, it has impact when sample rate is fast. Try to print some of the data not all of them. + * @param pData: the buffer stored data for this application. The data from FIFO has been pre-processed. + * @param DataCount: The available data count in buffer pData. + * @return return 0. +*/ +static int32_t RampShowResult(float *pData, uint32_t DataCount) +{ + static uint32_t index; + /* Print data*/ + for(int i=0;iSeqStartAddr = 0x10; /* leave 16 commands for LFOSC calibration. */ + pRampCfg->MaxSeqLen = 1024-0x10; /* 4kB/4 = 1024 */ + pRampCfg->RcalVal = 10000.0; /* 10kOhm RCAL */ + pRampCfg->ADCRefVolt = 1820.0f; /* The real ADC reference voltage. Measure it from capacitor C12 with DMM. */ + pRampCfg->FifoThresh = 480; /* Maximum value is 2kB/4-1 = 512-1. Set it to higher value to save power. */ + pRampCfg->SysClkFreq = 16000000.0f; /* System clock is 16MHz by default */ + pRampCfg->LFOSCClkFreq = LFOSCFreq; /* LFOSC frequency */ + /* Configure ramp signal parameters */ + pRampCfg->RampStartVolt = -1000.0f; /* -1V */ + pRampCfg->RampPeakVolt = +1000.0f; /* +1V */ + pRampCfg->VzeroStart = 1300.0f; /* 1.3V */ + pRampCfg->VzeroPeak = 1300.0f; /* 1.3V */ + pRampCfg->StepNumber = 800; /* Total steps. Equals to ADC sample number */ + pRampCfg->RampDuration = 24*1000; /* X * 1000, where x is total duration of ramp signal. Unit is ms. */ + pRampCfg->SampleDelay = 7.0f; /* 7ms. Time between update DAC and ADC sample. Unit is ms. */ + pRampCfg->LPTIARtiaSel = LPTIARTIA_4K; /* Maximum current decides RTIA value */ + pRampCfg->LPTIARloadSel = LPTIARLOAD_SHORT; + pRampCfg->AdcPgaGain = ADCPGA_1P5; + + +} + +void AD5940_Main(void) +{ + uint32_t temp; + AppRAMPCfg_Type *pRampCfg; + AD5940PlatformCfg(); + AD5940RampStructInit(); + + AppRAMPInit(AppBuff, APPBUFF_SIZE); /* Initialize RAMP application. Provide a buffer, which is used to store sequencer commands */ + AppRAMPCtrl(APPCTRL_START, 0); /* Control IMP measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + AppRAMPGetCfg(&pRampCfg); + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + temp = APPBUFF_SIZE; + AppRAMPISR(AppBuff, &temp); + RampShowResult((float*)AppBuff, temp); + } + /* Repeat Measurement continuously*/ + if(pRampCfg->bTestFinished ==bTRUE) + { + AD5940_Delay10us(200000); + pRampCfg->bTestFinished = bFALSE; + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger */ + AppRAMPCtrl(APPCTRL_START, 0); + } + } +} + diff --git a/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.ewd b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 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$PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.rteconfig b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.uvoptx b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.uvoptx new file mode 100644 index 0000000..5e47efd --- /dev/null +++ b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.uvoptx @@ -0,0 +1,356 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.RampState + + + 1 + 1 + AppRAMPCfg.StepNumber,0x0A + + + 2 + 1 + AppRAMPCfg.CurrStepPos,0x0A + + + 3 + 1 + DACSeqLenMax,0x0A + + + 4 + 1 + StepsThisBlock,0x0A + + + 5 + 1 + SeqLen,0x0A + + + 6 + 1 + AppBuff + + + 7 + 1 + bIsFinalBlk + + + 8 + 1 + StepsThisBlock,0x0A + + + 9 + 1 + BlockStartSRAMAddr,0x0A + + + 10 + 1 + SRAMAddr,0x0A + + + 11 + 1 + AppRAMPCfg + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 1 + 0 + 0 + ..\RampTest.c + RampTest.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.uvprojx b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.uvprojx new file mode 100644 index 0000000..fce8071 --- /dev/null +++ b/examples/AD5940_Ramp/ADICUP3029/AD5940_Ramp.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + RampTest.c + 1 + ..\RampTest.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_Ramp/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Ramp/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_Ramp/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Ramp/ADICUP3029/main.c b/examples/AD5940_Ramp/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Ramp/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Ramp/NUCLEO-F411/AD5940_Ramp.uvoptx b/examples/AD5940_Ramp/NUCLEO-F411/AD5940_Ramp.uvoptx new file mode 100644 index 0000000..4116d30 --- /dev/null +++ b/examples/AD5940_Ramp/NUCLEO-F411/AD5940_Ramp.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\RampTest.c + RampTest.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Ramp/NUCLEO-F411/AD5940_Ramp.uvprojx b/examples/AD5940_Ramp/NUCLEO-F411/AD5940_Ramp.uvprojx new file mode 100644 index 0000000..141606d --- /dev/null +++ b/examples/AD5940_Ramp/NUCLEO-F411/AD5940_Ramp.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + RampTest.c + 1 + ..\RampTest.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Ramp/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Ramp/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Ramp/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Ramp/NUCLEO-F411/main.c b/examples/AD5940_Ramp/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Ramp/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Ramp/RampTest.c b/examples/AD5940_Ramp/RampTest.c new file mode 100644 index 0000000..b46bfaa --- /dev/null +++ b/examples/AD5940_Ramp/RampTest.c @@ -0,0 +1,930 @@ +/*! + ***************************************************************************** + @file: RAMPTest.c + @author: Neo Xu + @brief: RAMP measurement sequences. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** @addtogroup AD5940_System_Examples + * @{ + * @defgroup Ramp_Test_Example + * @brief Using sequencer to generate ramp signal and control ADC to sample data. + * @details + * @note Need to update code when runs at S2 silicon. + * @todo update LPDAC switch settings for S2 and LPDAC 1LSB bug. + * @todo Calibrate ADC/PGA firstly to get accurate current. (Voltage/Rtia = Current) + * @note The method to calculate LPDAC ouput voltage + * - #define LSB_DAC12BIT (2.2V/4095) + * - #define LSB_DAC6BIT (2.2V/4095*64) + * - Volt_12bit = Code12Bit*LSB_DAC12BIT + 0.2V + * - Volt_6bit = Code6Bit*LSB_DAC6BIT + 0.2V + * + * # Ramp Signal Parameters definition + * + * @code + * (Vbias - Vzero): + * RampPeakVolt --> /\ + * / \ + * / \ + * / \ + * / \ + * / \ + * / \ + * / \ + * / \ + * RampStartVolt --> / \ + * + * Vzero: If there is no limitation on Vzero, Set VzeroStart to 2.2 and VzeroPeak to 0.4V + * Voltage VzeroStart --> ______ _____ + * | | + * Voltage VzeroPeak --> |________| + * + * + * Vbias: Vbias is calculated from RampPeakVolt, RampStartVolt, VzeroStart and VzeroPeak. + * Voltage VbiasPeak --> /| /\ |\ + * / | / \ | \ + * / | / \ | \ + * / |/ \| \ + * Voltage VbiasStart --> / | | \ + * + * RampState define: S0 | S1 | S2 |S3 | S4 | + * RampDuration define: | <--RampDuration--> | + * @endcode + * + * # The sequencer method to do Ramp test. + * The Ramp test need to update DAC data in real time to generate required waveform, and control ADC to start sample data. \n + * We used two kinds of sequence to realize it. One is to control DAC where SEQ0 and SEQ1 are used, another sequence SEQ2 controls ADC. + * ## Sequence Allocation + * SEQ3 is used to initialize AD5940.\n + * SEQ0/1 is used to generate voltage step.\n + * SEQ2 is used to startup ADC to sample one point. + * + * |SRAM allocation||| + * |------------|----------------|---------| + * |SequenceID | AddressRange | Usage | + * |SEQID_3 | 0x0000-0xzzzz | Initialization sequence| + * |SEQID_2 | 0xzzzz-0xyyyy | ADC control sequence, run this sequence will get one ADC result| + * |SEQID_0/1 | 0xyyyy-end | DAC update sequence. If size if not enough for all steps, use it like a Ping Pong buffer.| + * Where 0xzzzz equals to SEQ3 length, 0xyyyy equals to sum of SEQ2 and SEQ3 length. + * In one word, put SEQ2 commands right after SEQ3. Don't waste any SRAM resource. + * ##Sequencer Running Order + * The sequencer running order is set to firstly update DAC then start ADC. Repeat this process until all waveform generated. + * Below is explanation of sequencer running order. + * @code + * DAC voltage changes with sequencer, assume each step is 0.05V start from 0.2V + * 400mV-> _______ + * 350mV-> _______/ \_______ + * 300mV-> _______/ \_________ + * 250mV-> _______/ + * 200mV-> __/ + * Update DAC: ↑ ↑ ↑ ↑ ↑ ↑ -No update + * SEQ0 SEQ1 SEQ0 SEQ1 SEQ0 SEQ1 SEQ0 + * | / | / | / | / | / | / | + * SEQ2 SEQ2 SEQ2 SEQ2 SEQ2 SEQ2 |The final sequence is set to disable sequencer + * WuptTrigger ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑ + * Time Spend |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 + * |The following triggers are ignored because sequencer is disabled + * Wupt: Wakeup Timer + * @endcode + * + * The final sequence will disable sequencer thus disable the whole measurement. It could be SEQ0 or SEQ1. \n + * SEQ2 will always follow SEQ0/SEQ1 to turn on ADC to sample data. \n + * SEQ0/1 and SEQ2 is managed by wakeup timer. The time delay between SEQ0/1 and SEQ + * is set by user. Reason is that after updating DAC, signal needs some time to settle before sample it. \n + * In above figure, the time t1 is the delay set by user which controls where ADC starts sampling. + * (t1+t2)*StepNumber is the total time used by ramp. It's defined by @ref RampDuration. + * + * SEQ2 commands are fixed. Function is simply turn on ADC for a while and turn off it + * after required number of data ready. \n + * SEQ0/1 is always changing its start address to update DAC with different voltage. \n + * Check above figure we can see SEQ0/SEQ1 is repeatedly trigged by Wakeuptimer, if we don't change the start + * Address of SEQ0/SEQ1, they will always update DAC with same data, thus no waveform generated. + * + * Considering below SEQ0 command which is similar for SEQ1 on modifying SEQxINFO register.: + * + * **Sequencer Command Block 1** + * @code + * //Total sequence command length is **4** + * SEQ_WR(REG_AFE_LPDACDAT0, 0x1234); //update DAC with correct voltage + * SEQ_WAIT(10); //wait 10clocks to allow DAC update + * SEQ_WR(REG_AFE_SEQ1INFO, NextAddr|SeqLen); //The next sequence is SEQ1, set it to correct address where stores commands. + * SEQ_SLP(); //Put AFE to hibernate/sleep mode. + * @endcode + * + * It will update DAC with data 0x1234, then it wait 10 clocks to allow LPDAC update. + * The final command is to send AFE to sleep state. + * The third commands here is to allow modify sequence infomation by sequencer. Above piece of commands are running by SEQ0. + * It modify the start address of **SEQ1**. SEQ1 has same ability to update DAC data but with **different** data. + * By the time Wakeup Timer triggers SEQ1, it will update DAC with correct data. + * + * The last block of sequencer command is to disable sequencer. + * + * **Sequencer Command Block 2** + * @code + * SEQ_NOP(); + * SEQ_NOP(); + * SEQ_NOP(); + * SEQ_STOP(); //Put AFE to hibernate/sleep mode. + * @endcode + * + * Total SRAM is 6kB in AD594x. In normal other application, we use 2kB for sequencer and 4kB for FIFO. + * Assume the ramp test require 128 steps, then the sequence length is 4*128 = 512, each command need 4Byte. So it costs 2kB SRAM. + * When ramp test requires hundres of voltage steps(ADC samples), 2kB SRAM is far from enough. We recommend to use 4kB for sequencer + * and 2kB for data FIFO. + * If ramp test require more steps, then we need to update SRAM with commands dynamically, use it as a ping-pong buffer. + * + * **Sequencer Command Block 3** + * @code + * SEQ_WR(REG_AFE_LPDACDAT0, 0x1234); + * SEQ_WAIT(10); + * SEQ_WR(REG_AFE_SEQ1INFO, NextAddr|SeqLen); + * SEQ_INT0(); //Generate custom interrupt 0 to inform MCU to update ping-pong buffer. + * @endcode + * + * @{ + * **/ + +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "RampTest.h" + +/** + * @brief The ramp application paramters. + * @details Do not modify following default parameters. Use the function in AD5940Main.c to change it. + * + * */ +AppRAMPCfg_Type AppRAMPCfg = + { + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .LFOSCClkFreq = 32000.0, + .SysClkFreq = 16000000.0, + .AdcClkFreq = 16000000.0, + .RcalVal = 10000.0, + .ADCRefVolt = 1820.0f, /* 1.8V or 1.82V? */ + .bTestFinished = bFALSE, + /* Describe Ramp signal */ + .RampStartVolt = -1000.0f, /* -1V */ + .RampPeakVolt = +1000.0f, /* +1V */ + .VzeroStart = 2200.0f, /* 2.2V */ + .VzeroPeak = 400.0f, /* 0.4V */ + .StepNumber = 866, + .RampDuration = 240 * 1000, /* 240s */ + /* Receive path configuration */ + .SampleDelay = 1.0f, /* 1ms */ + .LPTIARtiaSel = LPTIARTIA_20K, /* Maximum current decides RTIA value */ + .ExternalRtiaValue = 20000.0f, /* Optional external RTIA resistore value in Ohm. */ + .AdcPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_2, + .FifoThresh = 4, + /* Priviate parameters */ + .RAMPInited = bFALSE, + .StopRequired = bFALSE, + .RampState = RAMP_STATE0, + .bFirstDACSeq = bTRUE, + .bRampOneDir = bFALSE, + }; + +/** + * @todo add paramater check. + * SampleDelay will limited by wakeup timer, check WUPT register value calculation equation below for reference. + * SampleDelay > 1.0ms is acceptable. + * RampDuration/StepNumber > 2.0ms + * ... + * */ + +/** + * @brief This function is provided for upper controllers that want to change + * application parameters specially for user defined parameters. + * @param pCfg: The pointer used to store application configuration structure pointer. + * @return none. +*/ +AD5940Err AppRAMPGetCfg(void *pCfg) + { + if(pCfg) + { + *(AppRAMPCfg_Type **)pCfg = &AppRAMPCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; + } + +/** + * @brief Control application like start, stop. + * @param Command: The command for this application, select from below paramters + * - APPCTRL_START: start the measurement. Note: the ramp test need firstly call function AppRAMPInit() every time before start it. + * - APPCTRL_STOPNOW: Stop the measurement immediately. + * - APPCTRL_STOPSYNC: Stop the measuremnt when current measured data is read back. + * - APPCTRL_SHUTDOWN: Stop the measurement immediately and put AFE to shut down mode(turn off LP loop and enter hibernate). + * @return none. +*/ +AD5940Err AppRAMPCtrl(uint32_t Command, void *pPara) + { + switch (Command) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppRAMPCfg.RAMPInited == bFALSE) + return AD5940ERR_APPERROR; + /** + * RAMP example is special, because the sequence is dynamically generated. + * Before 'START' ramp test, call AppRAMPInit firstly. + */ + if(AppRAMPCfg.RampState == RAMP_STOP) + return AD5940ERR_APPERROR; + + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_D; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.WuptOrder[1] = SEQID_2; + wupt_cfg.WuptOrder[2] = SEQID_1; + wupt_cfg.WuptOrder[3] = SEQID_2; + wupt_cfg.SeqxSleepTime[SEQID_2] = 4; + wupt_cfg.SeqxWakeupTime[SEQID_2] = (uint32_t)(AppRAMPCfg.LFOSCClkFreq * AppRAMPCfg.SampleDelay / 1000.0f) - 4 - 2; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppRAMPCfg.LFOSCClkFreq * (AppRAMPCfg.RampDuration / AppRAMPCfg.StepNumber - AppRAMPCfg.SampleDelay) / 1000.0f) - 4 - 2; + wupt_cfg.SeqxSleepTime[SEQID_1] = wupt_cfg.SeqxSleepTime[SEQID_0]; + wupt_cfg.SeqxWakeupTime[SEQID_1] = wupt_cfg.SeqxWakeupTime[SEQID_0]; + AD5940_WUPTCfg(&wupt_cfg); + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case APPCTRL_STOPSYNC: + { + AppRAMPCfg.StopRequired = bTRUE; + break; + } + case APPCTRL_SHUTDOWN: + { + AppRAMPCtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + AD5940_ShutDownS(); + } + break; + default: + break; + } + return AD5940ERR_OK; + } + +/** + * @brief Generate initialization sequence and write the commands to SRAM. + * @return return error code. +*/ +static AD5940Err AppRAMPSeqInitGen(void) + { + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lploop_cfg; + DSPCfg_Type dsp_cfg; + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + lploop_cfg.LpAmpCfg.LpAmpSel = LPAMP0; + lploop_cfg.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_BOOST3; + lploop_cfg.LpAmpCfg.LpPaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaRf = LPTIARF_20K; + lploop_cfg.LpAmpCfg.LpTiaRload = AppRAMPCfg.LPTIARloadSel; + lploop_cfg.LpAmpCfg.LpTiaRtia = AppRAMPCfg.LPTIARtiaSel; + if(AppRAMPCfg.LPTIARtiaSel == LPTIARTIA_OPEN) /* User want to use external RTIA */ + lploop_cfg.LpAmpCfg.LpTiaSW = LPTIASW(2) | LPTIASW(4) | LPTIASW(5) | LPTIASW(9)/*|LPTIASW(10)*/; /* SW5/9 is closed to support external RTIA resistor */ + else + lploop_cfg.LpAmpCfg.LpTiaSW = LPTIASW(2)|LPTIASW(4)|LPTIASW(5); + + lploop_cfg.LpDacCfg.LpdacSel = LPDAC0; + lploop_cfg.LpDacCfg.DacData12Bit = 0x800; + lploop_cfg.LpDacCfg.DacData6Bit = 0; + lploop_cfg.LpDacCfg.DataRst = bFALSE; + lploop_cfg.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA/*|LPDACSW_VBIAS2PIN*/ | LPDACSW_VZERO2LPTIA/*|LPDACSW_VZERO2PIN*/; + lploop_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; + lploop_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lploop_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; /* Step Vbias. Use 12bit DAC ouput */ + lploop_cfg.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Base is Vzero. Use 6 bit DAC ouput */ + lploop_cfg.LpDacCfg.PowerEn = bTRUE; + AD5940_LPLoopCfgS(&lploop_cfg); + + AD5940_StructInit(&dsp_cfg, sizeof(dsp_cfg)); + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_LPTIA0_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_LPTIA0_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppRAMPCfg.AdcPgaGain; + + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppRAMPCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* ADC runs at 16MHz clock in this example, sample rate is 800kHz */ + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; /* We use data from SINC3 filter */ + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = ADCSINC2OSR_1067; /* Don't care */ + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_2; /* Don't care because it's disabled */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop sequence generator here */ + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(error == AD5940ERR_OK) + { + AD5940_StructInit(&AppRAMPCfg.InitSeqInfo, sizeof(AppRAMPCfg.InitSeqInfo)); + if(SeqLen >= AppRAMPCfg.MaxSeqLen) + return AD5940ERR_SEQLEN; + + AppRAMPCfg.InitSeqInfo.SeqId = SEQID_3; + AppRAMPCfg.InitSeqInfo.SeqRamAddr = AppRAMPCfg.SeqStartAddr; + AppRAMPCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppRAMPCfg.InitSeqInfo.SeqLen = SeqLen; + AppRAMPCfg.InitSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppRAMPCfg.InitSeqInfo); + } + else + return error; /* Error */ + return AD5940ERR_OK; + } + +/** + * @brief Generate ADC control sequence and write the commands to SRAM. + * @return return error code. +*/ +static AD5940Err AppRAMPSeqADCCtrlGen(void) + { + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataCount = 1; /* Sample one point everytime */ + clks_cal.DataType = DATATYPE_SINC3; + clks_cal.ADCSinc3Osr = AppRAMPCfg.ADCSinc3Osr; + clks_cal.ADCSinc2Osr = ADCSINC2OSR_1067; /* Don't care */ + clks_cal.ADCAvgNum = ADCAVGNUM_2; /* Don't care */ + clks_cal.RatioSys2AdcClk = AppRAMPCfg.SysClkFreq / AppRAMPCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin2); + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16 * 250)); /* wait 250us for reference power up */ + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCPWR | AFECTRL_ADCCNV, bFALSE); /* Stop ADC */ + AD5940_SEQGpioCtrlS(0); + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AD5940_StructInit(&AppRAMPCfg.ADCSeqInfo, sizeof(AppRAMPCfg.ADCSeqInfo)); + if((SeqLen + AppRAMPCfg.InitSeqInfo.SeqLen) >= AppRAMPCfg.MaxSeqLen) + return AD5940ERR_SEQLEN; + AppRAMPCfg.ADCSeqInfo.SeqId = SEQID_2; + AppRAMPCfg.ADCSeqInfo.SeqRamAddr = AppRAMPCfg.InitSeqInfo.SeqRamAddr + AppRAMPCfg.InitSeqInfo.SeqLen ; + AppRAMPCfg.ADCSeqInfo.pSeqCmd = pSeqCmd; + AppRAMPCfg.ADCSeqInfo.SeqLen = SeqLen; + AppRAMPCfg.ADCSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppRAMPCfg.ADCSeqInfo); + } + else + return error; /* Error */ + return AD5940ERR_OK; + } + +/** + * @brief Calculate DAC code step by step. + * @details The calculation is based on following variables. + * - RampStartVolt + * - RampPeakVolt + * - VzeroStart + * - VzeroPeak + * - StepNumber + * Below variables must be initialzed before call this function. It's done in function @ref AppRAMPInit + * - RampState + * - CurrStepPos + * - bDACCodeInc + * - CurrRampCode + * @return return error code. +*/ +static AD5940Err RampDacRegUpdate(uint32_t *pDACData) + { + uint32_t VbiasCode, VzeroCode; + + if (AppRAMPCfg.bRampOneDir) + { + switch(AppRAMPCfg.RampState) + { + case RAMP_STATE0: /* Begin of Ramp */ + AppRAMPCfg.CurrVzeroCode = (uint32_t)((AppRAMPCfg.VzeroStart - 200.0f) / DAC6BITVOLT_1LSB); + AppRAMPCfg.RampState = RAMP_STATE1; + break; + case RAMP_STATE1: + if(AppRAMPCfg.CurrStepPos >= AppRAMPCfg.StepNumber / 2) + { + AppRAMPCfg.RampState = RAMP_STATE4; /* Enter State4 */ + AppRAMPCfg.CurrVzeroCode = (uint32_t)((AppRAMPCfg.VzeroPeak - 200.0f) / DAC6BITVOLT_1LSB); + } + break; + case RAMP_STATE4: + if(AppRAMPCfg.CurrStepPos >= AppRAMPCfg.StepNumber) + AppRAMPCfg.RampState = RAMP_STOP; /* Enter Stop */ + break; + case RAMP_STOP: + break; + } + } + else + { + switch(AppRAMPCfg.RampState) + { + case RAMP_STATE0: /* Begin of Ramp */ + AppRAMPCfg.CurrVzeroCode = (uint32_t)((AppRAMPCfg.VzeroStart - 200.0f) / DAC6BITVOLT_1LSB); + AppRAMPCfg.RampState = RAMP_STATE1; + break; + case RAMP_STATE1: + if(AppRAMPCfg.CurrStepPos >= AppRAMPCfg.StepNumber / 4) + { + AppRAMPCfg.RampState = RAMP_STATE2; /* Enter State2 */ + AppRAMPCfg.CurrVzeroCode = (uint32_t)((AppRAMPCfg.VzeroPeak - 200.0f) / DAC6BITVOLT_1LSB); + } + break; + case RAMP_STATE2: + if(AppRAMPCfg.CurrStepPos >= (AppRAMPCfg.StepNumber * 2) / 4) + { + AppRAMPCfg.RampState = RAMP_STATE3; /* Enter State3 */ + AppRAMPCfg.bDACCodeInc = AppRAMPCfg.bDACCodeInc ? bFALSE : bTRUE; + + } + break; + case RAMP_STATE3: + if(AppRAMPCfg.CurrStepPos >= (AppRAMPCfg.StepNumber * 3) / 4) + { + AppRAMPCfg.RampState = RAMP_STATE4; /* Enter State4 */ + AppRAMPCfg.CurrVzeroCode = (uint32_t)((AppRAMPCfg.VzeroStart - 200.0f) / DAC6BITVOLT_1LSB); + } + break; + case RAMP_STATE4: + if(AppRAMPCfg.CurrStepPos >= AppRAMPCfg.StepNumber) + AppRAMPCfg.RampState = RAMP_STOP; /* Enter Stop */ + break; + case RAMP_STOP: + break; + } + } + + AppRAMPCfg.CurrStepPos ++; + if(AppRAMPCfg.bDACCodeInc) + AppRAMPCfg.CurrRampCode += AppRAMPCfg.DACCodePerStep; + else + AppRAMPCfg.CurrRampCode -= AppRAMPCfg.DACCodePerStep; + VzeroCode = AppRAMPCfg.CurrVzeroCode; + VbiasCode = (uint32_t)(VzeroCode * 64 + AppRAMPCfg.CurrRampCode); + if(VbiasCode < (VzeroCode * 64)) + VbiasCode --; + /* Truncate */ + if(VbiasCode > 4095) VbiasCode = 4095; + if(VzeroCode > 63) VzeroCode = 63; + *pDACData = (VzeroCode << 12) | VbiasCode; + return AD5940ERR_OK; + } + +/* Geneate sequence(s) to update DAC step by step */ +/* Note: this function doesn't need sequencer generator */ + +/** + * @brief Update DAC sequence in SRAM in real time. + * @details This function generates sequences to update DAC code step by step. It's also called in interrupt + * function when half commands in SRAM has been completed. We don't use sequence generator to save memory. + * Check more details from documentation of this example. @ref Ramp_Test_Example + * @return return error code + * + * */ +static AD5940Err AppRAMPSeqDACCtrlGen(void) + { +#define SEQLEN_ONESTEP 4L /* How many sequence commands are needed to update LPDAC. */ +#define CURRBLK_BLK0 0 /* Current block is BLOCK0 */ +#define CURRBLK_BLK1 1 /* Current block is BLOCK1 */ + AD5940Err error = AD5940ERR_OK; + uint32_t BlockStartSRAMAddr; + uint32_t DACData, SRAMAddr; + uint32_t i; + uint32_t StepsThisBlock; + BoolFlag bIsFinalBlk; + uint32_t SeqCmdBuff[SEQLEN_ONESTEP]; + + /* All below static variables are inited in below 'if' block. They are only used in this function */ + static BoolFlag bCmdForSeq0 = bTRUE; + static uint32_t DACSeqBlk0Addr, DACSeqBlk1Addr; + static uint32_t StepsRemainning, StepsPerBlock, DACSeqCurrBlk; + + /* Do some math calculations */ + if(AppRAMPCfg.bFirstDACSeq == bTRUE) + { + /* Reset bIsFirstRun at end of function. */ + int32_t DACSeqLenMax; + StepsRemainning = AppRAMPCfg.StepNumber; + DACSeqLenMax = (int32_t)AppRAMPCfg.MaxSeqLen - (int32_t)AppRAMPCfg.InitSeqInfo.SeqLen - (int32_t)AppRAMPCfg.ADCSeqInfo.SeqLen; + if(DACSeqLenMax < SEQLEN_ONESTEP * 4) + return AD5940ERR_SEQLEN; /* No enough sequencer SRAM available */ + DACSeqLenMax -= SEQLEN_ONESTEP * 2; /* Reserve commands each block */ + StepsPerBlock = DACSeqLenMax / SEQLEN_ONESTEP / 2; + DACSeqBlk0Addr = AppRAMPCfg.ADCSeqInfo.SeqRamAddr + AppRAMPCfg.ADCSeqInfo.SeqLen; + DACSeqBlk1Addr = DACSeqBlk0Addr + StepsPerBlock * SEQLEN_ONESTEP; + DACSeqCurrBlk = CURRBLK_BLK0; + + /* Analog part */ + if (AppRAMPCfg.bRampOneDir) + { + /* Ramping between RampStartVolt and RampPeakVolt in StepNumber steps */ + AppRAMPCfg.DACCodePerStep = ((AppRAMPCfg.RampPeakVolt - AppRAMPCfg.RampStartVolt) / AppRAMPCfg.StepNumber) + / DAC12BITVOLT_1LSB; + } + else + { + /* Ramping between RampStartVolt and RampPeakVolt in StepNumber/2 steps */ + AppRAMPCfg.DACCodePerStep = ((AppRAMPCfg.RampPeakVolt - AppRAMPCfg.RampStartVolt) / AppRAMPCfg.StepNumber * 2) + / DAC12BITVOLT_1LSB; + } + +#if ALIGIN_VOLT2LSB + AppRAMPCfg.DACCodePerStep = (int32_t)AppRAMPCfg.DACCodePerStep; +#endif + if(AppRAMPCfg.DACCodePerStep > 0) + AppRAMPCfg.bDACCodeInc = bTRUE; + else + { + AppRAMPCfg.DACCodePerStep = -AppRAMPCfg.DACCodePerStep; /* Always positive */ + AppRAMPCfg.bDACCodeInc = bFALSE; + } + AppRAMPCfg.CurrRampCode = AppRAMPCfg.RampStartVolt / DAC12BITVOLT_1LSB; + + AppRAMPCfg.RampState = RAMP_STATE0; /* Init state to STATE0 */ + AppRAMPCfg.CurrStepPos = 0; + + bCmdForSeq0 = bTRUE; /* Start with SEQ0 */ + } + + if(StepsRemainning == 0) return AD5940ERR_OK; /* Done. */ + bIsFinalBlk = StepsRemainning <= StepsPerBlock ? bTRUE : bFALSE; + if(bIsFinalBlk) + StepsThisBlock = StepsRemainning; + else + StepsThisBlock = StepsPerBlock; + StepsRemainning -= StepsThisBlock; + + BlockStartSRAMAddr = (DACSeqCurrBlk == CURRBLK_BLK0) ? \ + DACSeqBlk0Addr : DACSeqBlk1Addr; + SRAMAddr = BlockStartSRAMAddr; + + for(i = 0; i < StepsThisBlock - 1; i++) + { + uint32_t CurrAddr = SRAMAddr; + SRAMAddr += SEQLEN_ONESTEP; /* Jump to next sequence */ + RampDacRegUpdate(&DACData); + SeqCmdBuff[0] = SEQ_WR(REG_AFE_LPDACDAT0, DACData); + SeqCmdBuff[1] = SEQ_WAIT(10); /* !!!NOTE LPDAC need 10 clocks to update data. Before send AFE to sleep state, wait 10 extra clocks */ + SeqCmdBuff[2] = SEQ_WR(bCmdForSeq0 ? REG_AFE_SEQ1INFO : REG_AFE_SEQ0INFO, \ + (SRAMAddr << BITP_AFE_SEQ1INFO_ADDR) | (SEQLEN_ONESTEP << BITP_AFE_SEQ1INFO_LEN)); + SeqCmdBuff[3] = SEQ_SLP(); + AD5940_SEQCmdWrite(CurrAddr, SeqCmdBuff, SEQLEN_ONESTEP); + bCmdForSeq0 = bCmdForSeq0 ? bFALSE : bTRUE; + } + /* Add final DAC update */ + if(bIsFinalBlk)/* This is the final block */ + { + uint32_t CurrAddr = SRAMAddr; + SRAMAddr += SEQLEN_ONESTEP; /* Jump to next sequence */ + /* After update LPDAC with final data, we let sequencer to run 'final final' command, to disable sequencer. */ + RampDacRegUpdate(&DACData); + SeqCmdBuff[0] = SEQ_WR(REG_AFE_LPDACDAT0, DACData); + SeqCmdBuff[1] = SEQ_WAIT(10); /* !!!NOTE LPDAC need 10 clocks to update data. Before send AFE to sleep state, wait 10 extra clocks */ + SeqCmdBuff[2] = SEQ_WR(bCmdForSeq0 ? REG_AFE_SEQ1INFO : REG_AFE_SEQ0INFO, \ + (SRAMAddr << BITP_AFE_SEQ1INFO_ADDR) | (SEQLEN_ONESTEP << BITP_AFE_SEQ1INFO_LEN)); + SeqCmdBuff[3] = SEQ_SLP(); + AD5940_SEQCmdWrite(CurrAddr, SeqCmdBuff, SEQLEN_ONESTEP); + CurrAddr += SEQLEN_ONESTEP; + /* The final final command is to disable sequencer. */ + SeqCmdBuff[0] = SEQ_NOP(); /* Do nothing */ + SeqCmdBuff[1] = SEQ_NOP(); + SeqCmdBuff[2] = SEQ_NOP(); + SeqCmdBuff[3] = SEQ_STOP(); /* Stop sequencer. */ + /* Disable sequencer, END of sequencer interrupt is generated. */ + AD5940_SEQCmdWrite(CurrAddr, SeqCmdBuff, SEQLEN_ONESTEP); + } + else /* This is not the final block */ + { + /* Jump to next block. */ + uint32_t CurrAddr = SRAMAddr; + SRAMAddr = (DACSeqCurrBlk == CURRBLK_BLK0) ? \ + DACSeqBlk1Addr : DACSeqBlk0Addr; + RampDacRegUpdate(&DACData); + SeqCmdBuff[0] = SEQ_WR(REG_AFE_LPDACDAT0, DACData); + SeqCmdBuff[1] = SEQ_WAIT(10); + SeqCmdBuff[2] = SEQ_WR(bCmdForSeq0 ? REG_AFE_SEQ1INFO : REG_AFE_SEQ0INFO, + (SRAMAddr << BITP_AFE_SEQ1INFO_ADDR) | (SEQLEN_ONESTEP << BITP_AFE_SEQ1INFO_LEN)); + SeqCmdBuff[3] = SEQ_INT0(); /* Generate Custom interrupt 0. */ + AD5940_SEQCmdWrite(CurrAddr, SeqCmdBuff, SEQLEN_ONESTEP); + bCmdForSeq0 = bCmdForSeq0 ? bFALSE : bTRUE; + } + + DACSeqCurrBlk = (DACSeqCurrBlk == CURRBLK_BLK0) ? \ + CURRBLK_BLK1 : CURRBLK_BLK0; /* Switch between Block0 and block1 */ + if(AppRAMPCfg.bFirstDACSeq) + { + AppRAMPCfg.bFirstDACSeq = bFALSE; + if(bIsFinalBlk == bFALSE) + { + /* Otherwise there is no need to init block1 sequence */ + error = AppRAMPSeqDACCtrlGen(); + if(error != AD5940ERR_OK) + return error; + } + /* This is the first DAC sequence. */ + AppRAMPCfg.DACSeqInfo.SeqId = SEQID_0; + AppRAMPCfg.DACSeqInfo.SeqLen = SEQLEN_ONESTEP; + AppRAMPCfg.DACSeqInfo.SeqRamAddr = BlockStartSRAMAddr; + AppRAMPCfg.DACSeqInfo.WriteSRAM = bFALSE; /* No need to write to SRAM. We already write them above. */ + AD5940_SEQInfoCfg(&AppRAMPCfg.DACSeqInfo); + } + return AD5940ERR_OK; + } + + +/** + * @brief Calibrate LPTIA internal RTIA resistor(s). + * @details This function will do calibration using parameters stored in @ref AppEDACfg structure. + * @return return error code. +*/ +static AD5940Err AppRAMPRtiaCal(void) + { + fImpPol_Type RtiaCalValue; /* Calibration result */ + LPRTIACal_Type lprtia_cal; + AD5940_StructInit(&lprtia_cal, sizeof(lprtia_cal)); + + lprtia_cal.LpAmpSel = LPAMP0; + lprtia_cal.bPolarResult = bTRUE; /* Magnitude + Phase */ + lprtia_cal.AdcClkFreq = AppRAMPCfg.AdcClkFreq; + lprtia_cal.SysClkFreq = AppRAMPCfg.SysClkFreq; + lprtia_cal.ADCSinc3Osr = ADCSINC3OSR_4; + lprtia_cal.ADCSinc2Osr = ADCSINC2OSR_22; /* Use SINC2 data as DFT data source */ + lprtia_cal.DftCfg.DftNum = DFTNUM_2048; /* Maximum DFT number */ + lprtia_cal.DftCfg.DftSrc = DFTSRC_SINC2NOTCH; + lprtia_cal.DftCfg.HanWinEn = bTRUE; + lprtia_cal.fFreq = AppRAMPCfg.AdcClkFreq / 4 / 22 / 2048 * 3; /* Sample 3 period of signal, 13.317Hz here. Do not use DC method, because it needs ADC/PGA calibrated firstly(but it's faster) */ + lprtia_cal.fRcal = AppRAMPCfg.RcalVal; + lprtia_cal.LpTiaRtia = AppRAMPCfg.LPTIARtiaSel; + lprtia_cal.LpAmpPwrMod = LPAMPPWR_NORM; + lprtia_cal.bWithCtia = bFALSE; + AD5940_LPRtiaCal(&lprtia_cal, &RtiaCalValue); + AppRAMPCfg.RtiaValue = RtiaCalValue; + //printf("Rtia,%f,%f\n", RtiaCalValue.Magnitude, RtiaCalValue.Phase); + return AD5940ERR_OK; + } + +/** + * @brief Initialize the ramp test. Call this functions every time before start ramp test. + * @param pBuffer: the buffer for sequencer generator. Only need to provide it for the first time. + * @param BufferSize: The buffer size start from pBuffer. + * @return return error code. +*/ +AD5940Err AppRAMPInit(uint32_t *pBuffer, uint32_t BufferSize) + { + AD5940Err error = AD5940ERR_OK; + FIFOCfg_Type fifo_cfg; + SEQCfg_Type seq_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_4KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppRAMPCfg.RAMPInited == bFALSE) || \ + (AppRAMPCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + + if(AppRAMPCfg.LPTIARtiaSel == LPTIARTIA_OPEN) /* Internal RTIA is opened. User wants to use external RTIA resistor */ + { + AppRAMPCfg.RtiaValue.Magnitude = AppRAMPCfg.ExternalRtiaValue; + AppRAMPCfg.RtiaValue.Phase = 0; + } + else + AppRAMPRtiaCal(); + + AppRAMPCfg.RAMPInited = bFALSE; + AD5940_SEQGenInit(pBuffer, BufferSize); + /* Generate sequence and write them to SRAM start from address AppRAMPCfg.SeqStartAddr */ + error = AppRAMPSeqInitGen(); /* Application initialization sequence */ + if(error != AD5940ERR_OK) return error; + error = AppRAMPSeqADCCtrlGen(); /* ADC control sequence */ + if(error != AD5940ERR_OK) return error; + AppRAMPCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Reconfigure FIFO, The Rtia calibration function may generate data that stored to FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOSrc = FIFOSRC_SINC3; + fifo_cfg.FIFOThresh = AppRAMPCfg.FifoThresh; /* Change FIFO paramters */ + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_2KB; + AD5940_FIFOCfg(&fifo_cfg); + + /* Clear all interrupts */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + /* Generate DAC sequence */ + AppRAMPCfg.bFirstDACSeq = bTRUE; + error = AppRAMPSeqDACCtrlGen(); + if(error != AD5940ERR_OK) return error; + + /* Configure sequence info. */ + AppRAMPCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppRAMPCfg.InitSeqInfo); + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppRAMPCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + + AppRAMPCfg.ADCSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppRAMPCfg.ADCSeqInfo); + + AppRAMPCfg.DACSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppRAMPCfg.DACSeqInfo); + + AD5940_SEQCtrlS(bFALSE); + AD5940_WriteReg(REG_AFE_SEQCNT, 0); + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); /* Set to low power mode */ + + AppRAMPCfg.RAMPInited = bTRUE; /* RAMP application has been initialized. */ + return AD5940ERR_OK; + } + +/** + * @brief This function is called in ISR when AFE has been wakeup and we can access registers. + * @param pData: the buffer points to data read back from FIFO. Not needed for this application-RAMP + * @param pDataCount: The data count in pData buffer. + * @return return error code. +*/ +static int32_t AppRAMPRegModify(int32_t *const pData, uint32_t *pDataCount) + { + if(AppRAMPCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + return AD5940ERR_OK; + } + +/** + * @brief Depending on the data type, do appropriate data pre-process before return back to controller + * @param pData: the buffer points to data read back from FIFO. Not needed for this application-RAMP + * @param pDataCount: The data count in pData buffer. + * @return return error code. +*/ +static int32_t AppRAMPDataProcess(int32_t *const pData, uint32_t *pDataCount) + { + uint32_t i, datacount; + datacount = *pDataCount; + float *pOut = (float *)pData; + float temp; + for(i = 0; i < datacount; i++) + { + pData[i] &= 0xffff; + temp = -AD5940_ADCCode2Volt(pData[i], AppRAMPCfg.AdcPgaGain, AppRAMPCfg.ADCRefVolt); + pOut[i] = temp / AppRAMPCfg.RtiaValue.Magnitude * 1e3f; /* Result unit is uA. */ + } + return 0; + } + +/** + * @brief The interrupt service routine for RAMP test. + * @param pBuff: The buffer provides by host, used to store data read back from FIFO. + * @param pCount: The available buffer size starts from pBuff. + * @return return error code. +*/ +AD5940Err AppRAMPISR(void *pBuff, uint32_t *pCount) + { + uint32_t BuffCount; + uint32_t FifoCnt; + BuffCount = *pCount; + uint32_t IntFlag; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); + *pCount = 0; + IntFlag = AD5940_INTCGetFlag(AFEINTC_0); + if(IntFlag & AFEINTSRC_CUSTOMINT0) /* High priority. */ + { + AD5940Err error; + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT0); + error = AppRAMPSeqDACCtrlGen(); + if(error != AD5940ERR_OK) return error; + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); + //AD5940_EnterSleepS(); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + } + if(IntFlag & AFEINTSRC_DATAFIFOTHRESH) + { + FifoCnt = AD5940_FIFOGetCnt(); + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppRAMPRegModify(pBuff, &FifoCnt); + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); + //AD5940_EnterSleepS(); + /* Process data */ + AppRAMPDataProcess((int32_t *)pBuff, &FifoCnt); + *pCount = FifoCnt; + return 0; + } + if(IntFlag & AFEINTSRC_ENDSEQ) + { + FifoCnt = AD5940_FIFOGetCnt(); + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + /* Process data */ + AppRAMPDataProcess((int32_t *)pBuff, &FifoCnt); + *pCount = FifoCnt; + AppRAMPCtrl(APPCTRL_STOPNOW, 0); /* Stop the Wakeup Timer. */ + + /* Reset variables so measurement can be restarted*/ + AppRAMPCfg.bTestFinished = bTRUE; + AppRAMPCfg.RampState = RAMP_STATE0; + AppRAMPCfg.bFirstDACSeq = bTRUE; + AppRAMPCfg.bDACCodeInc = bTRUE; + AppRAMPSeqDACCtrlGen(); + } + return 0; + } + +/** + * @} + * @} +*/ diff --git a/examples/AD5940_Ramp/RampTest.h b/examples/AD5940_Ramp/RampTest.h new file mode 100644 index 0000000..ca83cd4 --- /dev/null +++ b/examples/AD5940_Ramp/RampTest.h @@ -0,0 +1,88 @@ +/*! + ***************************************************************************** + @file: RampTest.h + @author: Neo Xu + @brief: Ramp Test header file. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _RAMPTEST_H_ +#define _RAMPTEST_H_ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" + +/* Do not modify following parameters */ +#define ALIGIN_VOLT2LSB 0 /* Set it to 1 to align each voltage step to 1LSB of DAC. 0: step code is fractional. */ +#define DAC12BITVOLT_1LSB (2200.0f/4095) //mV +#define DAC6BITVOLT_1LSB (DAC12BITVOLT_1LSB*64) //mV + +/** + * The Ramp application related paramter structure +*/ +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /**< Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /**< Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /**< Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /**< Not used for Ramp.Calibration sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; /**< Not used for Ramp. */ +/* Application related parameters */ + float LFOSCClkFreq; /**< The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + float RcalVal; /**< Rcal value in Ohm */ + float ADCRefVolt; /**< The real ADC voltage in mV. */ + BoolFlag bTestFinished; /**< Variable to indicate ramt test has finished >*/ + /* Describe Ramp signal */ + float RampStartVolt; /**< The start voltage of ramp signal in mV */ + float RampPeakVolt; /**< The maximum or minimum voltage of ramp in mV */ + float VzeroStart; /**< The start voltage of Vzero in mV. Set it to 2400mV by default */ + float VzeroPeak; /**< The peak voltage of Vzero in mV. Set it to 200mV by default */ + uint32_t StepNumber; /**< Total number of steps. Limited to 4095. */ + uint32_t RampDuration; /**< Ramp signal duration(total time) in ms */ + /* Receive path configuration */ + float SampleDelay; /**< The time delay between update DAC and start ADC */ + uint32_t LPTIARtiaSel; /**< Select RTIA */ + uint32_t LPTIARloadSel; /**< Select Rload */ + float ExternalRtiaValue; /**< The optional external RTIA value in Ohm. Disconnect internal RTIA to use external RTIA. When using internal RTIA, this value is ignored. */ + uint32_t AdcPgaGain; /**< PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /**< We use data from SINC3 filter. */ + /* Digital related */ + uint32_t FifoThresh; /**< FIFO Threshold value */ +/* Private variables for internal usage */ + BoolFlag RAMPInited; /**< If the program run firstly, generated initialization sequence commands */ + fImpPol_Type RtiaValue; /**< Calibrated Rtia value */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type ADCSeqInfo; + BoolFlag bFirstDACSeq; /**< Init DAC sequence */ + SEQInfo_Type DACSeqInfo; /**< The first DAC update sequence info */ + uint32_t CurrStepPos; /**< Current position */ + float DACCodePerStep; /**< */ + float CurrRampCode; /**< */ + uint32_t CurrVzeroCode; + BoolFlag bDACCodeInc; /**< Increase DAC code. */ + BoolFlag StopRequired; /**< After FIFO is ready, stop the measurement sequence */ + enum _RampState{RAMP_STATE0 = 0, RAMP_STATE1, RAMP_STATE2, RAMP_STATE3, RAMP_STATE4, RAMP_STOP} RampState; + BoolFlag bRampOneDir; /**< Ramp in a single direction, no return to start */ +}AppRAMPCfg_Type; + +#define APPCTRL_START 0 +#define APPCTRL_STOPNOW 1 +#define APPCTRL_STOPSYNC 2 +#define APPCTRL_SHUTDOWN 3 /**< Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + +AD5940Err AppRAMPInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppRAMPGetCfg(void *pCfg); +AD5940Err AppRAMPISR(void *pBuff, uint32_t *pCount); +AD5940Err AppRAMPCtrl(uint32_t Command, void *pPara); + +#endif diff --git a/examples/AD5940_Reset/AD5940_Reset.c b/examples/AD5940_Reset/AD5940_Reset.c new file mode 100644 index 0000000..fab2426 --- /dev/null +++ b/examples/AD5940_Reset/AD5940_Reset.c @@ -0,0 +1,82 @@ +/*! + ***************************************************************************** + @file: AD5940_Reset.c + @author: $Author: nxu2 $ + @brief: Demostrate three methods to reset AD5940: External Reset, MMR Reset and Power On Reset. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** + * The example shows three kinds of reset source of AD5940: + * - Hardware/External Reset, this is done via RESET pin. Pull it low to reset AD5940. + * - Software Reset, this is done by write regiter. + * - POR Reset, power on reset is done when the power is firstly applied. + * + * After power up, the program firlsty check reset status, there should be only POR reset flag set. + * Then we perform hardware reset. The reset status should reflect this. + * Note the flag in RSTSTA register is stiky. You can clear it by write 1 to corresponding bit. + * Finally, we perform software reset. + * Program then complete required initialization which should be done whenever there is a reset. +*/ + +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include + +void print_rststa(uint32_t reg) +{ + printf("<<<<<<>>>>>>Reset Status Done>>>>>\n"); +} + +void AD5940_Main(void) +{ + uint32_t temp; + printf("Wait 5 secondes\n"); + AD5940_Delay10us(100*5000); /* Delay 5s */ + printf("\n1. AD5940 Power ON\n"); + temp = AD5940_ReadReg(REG_ALLON_RSTSTA); + print_rststa(temp); + AD5940_WriteReg(REG_ALLON_RSTSTA, 0xf); /* Clear reset status. This register will remain its value until we manually clear it. Reset operation won't reset this register. */ + + printf("\n2. Perform Hardware reset now!\n"); + AD5940_HWReset(); + printf("Hardware reset done, status is:\n"); + temp = AD5940_ReadReg(REG_ALLON_RSTSTA); + print_rststa(temp); + AD5940_WriteReg(REG_ALLON_RSTSTA, 0xf); + + printf("\n3. Perform Software Reset now \n"); + AD5940_SoftRst(); + printf("Software reset done, status is:\n"); + temp = AD5940_ReadReg(REG_ALLON_RSTSTA); + print_rststa(temp); + printf("\nReset Test done \n"); + /** + * @note MUST call this function whenever there is reset happened. This function will put AD5940 to right state. + */ + AD5940_Initialize(); + AD5940_WriteReg(REG_ALLON_RSTSTA, 0xf); /* Clear reset status register. */ + + while(1); +} + diff --git a/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.ewd b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.rteconfig b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.uvoptx b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.uvoptx new file mode 100644 index 0000000..9ba9489 --- /dev/null +++ b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.uvoptx @@ -0,0 +1,306 @@ + + + + 1.0 + +
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+ 0 + 0 + 0 + 0 + 0 + 0 + C:\Users\neo\Documents\gitprojects\ad5940-examples\examples\AD5940_ECSns_EIS\AD5940_Reset.c + + + + + + + 0 + 1 + VzeroCode + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_Reset.c + AD5940_Reset.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.uvprojx b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.uvprojx new file mode 100644 index 0000000..82384d1 --- /dev/null +++ b/examples/AD5940_Reset/ADICUP3029/AD5940_Reset.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060528::V5.06 update 5 (build 528)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_Reset.c + 1 + ..\AD5940_Reset.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_Reset/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Reset/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_Reset/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Reset/ADICUP3029/main.c b/examples/AD5940_Reset/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Reset/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Reset/NUCLEO-F411/AD5940_Reset.uvoptx b/examples/AD5940_Reset/NUCLEO-F411/AD5940_Reset.uvoptx new file mode 100644 index 0000000..a342f81 --- /dev/null +++ b/examples/AD5940_Reset/NUCLEO-F411/AD5940_Reset.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_Reset.c + AD5940_Reset.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Reset/NUCLEO-F411/AD5940_Reset.uvprojx b/examples/AD5940_Reset/NUCLEO-F411/AD5940_Reset.uvprojx new file mode 100644 index 0000000..ffedafc --- /dev/null +++ b/examples/AD5940_Reset/NUCLEO-F411/AD5940_Reset.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_Reset.c + 1 + ..\AD5940_Reset.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Reset/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Reset/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Reset/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Reset/NUCLEO-F411/main.c b/examples/AD5940_Reset/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Reset/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Reset/main.c b/examples/AD5940_Reset/main.c new file mode 100644 index 0000000..f759fda --- /dev/null +++ b/examples/AD5940_Reset/main.c @@ -0,0 +1,41 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "ADuCM3029.H" +#include "AD5940PORT.h" +#include "stdio.h" + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + MCUGpioInit(0); + MCUExtiInit(0); + MCUSPIInit(0); + MCUSysTickInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +//void Host_EnterHibernate(void) +//{ +// int32_t index = 0; +// uint32_t savedWDT; +// savedWDT = pADI_WDT0->CTL; //None of the watchdog timer registers are retained in hibernate mode +// SCB->SCR = 0x04; // sleepdeep mode - write to the Cortex-m3 System Control register bit2 +// pADI_PMG0->PWRKEY = 0x4859; // key1 +// pADI_PMG0->PWRMOD = ENUM_PMG_PWRMOD_HIBERNATE|BITM_PMG_PWRMOD_MONVBATN; +// for (index=0;index<2;index++); +// __WFI(); +// for (index=0;index<2;index++); +// pADI_WDT0->CTL = savedWDT; //restore WDT control register. +// UrtCfg(230400);/*Baud rate: 230400*/ +// SpiMasterInit(); +//} diff --git a/examples/AD5940_SPI/AD5940_SPI.c b/examples/AD5940_SPI/AD5940_SPI.c new file mode 100644 index 0000000..e0984df --- /dev/null +++ b/examples/AD5940_SPI/AD5940_SPI.c @@ -0,0 +1,83 @@ +/*! + ***************************************************************************** + @file: AD5940_SPI.c + @author: $Author: nxu2 $ + @brief: Basic register read/write test example. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** + * This example shows how to read/write AD5940 registers through SPI. + * Use function called AD5940_ReadReg and AD5940_WriteReg. +**/ +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" +#include + +void AD5940_Main(void) +{ + unsigned long temp, i; + /** + * Hardware reset can always put AD5940 to default state. + * We recommend to use hardware reset rather than software reset + * because there are some situations that SPI won't work, for example, AD59840 is in hibernate mode, + * or AD5940 system clock is 32kHz that SPI bus clock should also be limited.. + * */ + AD5940_HWReset(); + /** + * @note MUST call this function whenever there is reset happened. This function will put AD5940 to right state. + * The reset can be software reset or hardware reset or power up reset. + */ + AD5940_Initialize(); + /** + * Normal application code starts here. + */ + /** + * Read register test. + */ + temp = AD5940_ReadReg(REG_AFECON_ADIID); + printf("Read ADIID register, got: 0x%04lx\n", temp); + if(temp != AD5940_ADIID) + printf("Read register test failed.\n" ); + else + printf("Read register test pass\n"); + /** + * Write register test. + * */ + srand(0x1234); + i =10000; + while(i--) + { + static unsigned long count; + static unsigned long data; + /* Generate a 32bit random data */ + data = rand()&0xffff; + data <<= 16; + data |= rand()&0xffff; + count ++; /* Read write count */ + /** + * Register CALDATLOCK is 32-bit width, it's readable and writable. + * We use it to test SPI register access. + */ + AD5940_WriteReg(REG_AFE_CALDATLOCK, data); + temp = AD5940_ReadReg(REG_AFE_CALDATLOCK); + if(temp != data) + printf("Write register test failed @0x%08lx\n", data); + if(!(count%1000)) + printf("Read/Write has been done %ld times, latest data is 0x%08lx\n", count, data); + } + printf("SPI read/write test completed"); + while(1); +} + diff --git a/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.ewd b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.rteconfig b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.uvoptx b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.uvoptx new file mode 100644 index 0000000..6b87e44 --- /dev/null +++ b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.uvoptx @@ -0,0 +1,306 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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+ 0 + 0 + 0 + 0 + 0 + 1 + C:\Users\neo\Documents\gitprojects\ad5940-examples\examples\AD5940_ChronoAmperometric\AD5940_SPI.c + + \\ADICUP3029\../AD5940_SPI.c\110 + + + + + 0 + 1 + VzeroCode + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 0 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_SPI.c + AD5940_SPI.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.uvprojx b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.uvprojx new file mode 100644 index 0000000..c8b8669 --- /dev/null +++ b/examples/AD5940_SPI/ADICUP3029/AD5940_SPI.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_SPI.c + 1 + ..\AD5940_SPI.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_SPI/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_SPI/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_SPI/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_SPI/ADICUP3029/main.c b/examples/AD5940_SPI/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_SPI/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_SPI/NUCLEO-F411/AD5940_SPI.uvoptx b/examples/AD5940_SPI/NUCLEO-F411/AD5940_SPI.uvoptx new file mode 100644 index 0000000..0b08bb8 --- /dev/null +++ b/examples/AD5940_SPI/NUCLEO-F411/AD5940_SPI.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_SPI.c + AD5940_SPI.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_SPI/NUCLEO-F411/AD5940_SPI.uvprojx b/examples/AD5940_SPI/NUCLEO-F411/AD5940_SPI.uvprojx new file mode 100644 index 0000000..763cb4e --- /dev/null +++ b/examples/AD5940_SPI/NUCLEO-F411/AD5940_SPI.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_SPI.c + 1 + ..\AD5940_SPI.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_SPI/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_SPI/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_SPI/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_SPI/NUCLEO-F411/main.c b/examples/AD5940_SPI/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_SPI/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_Sequencer/AD5940_Sequencer.c b/examples/AD5940_Sequencer/AD5940_Sequencer.c new file mode 100644 index 0000000..539a6b3 --- /dev/null +++ b/examples/AD5940_Sequencer/AD5940_Sequencer.c @@ -0,0 +1,320 @@ +/*! + ***************************************************************************** + @file: AD5940_Sequencer.c + @author: Neo Xu + @brief: Basic usage of sequencer. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** + * Sequencer is used to control the AFE automatically. It can execute commands that + * is pre-loaded to SRAM. There are 6kB SRAM available while you can choose to use + * 2kB or 4kB of it and use reset of SRAM for data FIFO. + * There are 3 commands available. We mainly use only two commands: + * - Write register + * - Wait + * We control the AFE by registers, so with sequencer, we can do almost everything. + * + * Once sequencer is enabled, it starts to wait valid trigger signal. Sequencer can + * manage 4sequences at same time. You can choose which sequence you want to trigger. + * To make the AFE can manage measurement automatically, there are three method to + * trigger sequence. + * - MMR. You can trigger any sequence by register write. Or call function @ref AD5940_SEQMmrTrig + * - GPIO. You can trigger any sequence by GPIO. To use this, you must firstly set + * GPIO function to GPx_TRIG. Where x is the GPIO number. GPIO0 is used to trigger + * Sequence0 and GPIO3 is used to trigger Sequence3. Check the macro definition to + * Check the details (or below table). + * |GPIO|WhichSequence| + * |GP0|SEQUENCE0| + * |GP1|SEQUENCE1| + * |GP2|SEQUENCE2| + * |GP3|SEQUENCE3| + * |GP4|SEQUENCE0| + * |GP5|SEQUENCE1| + * |GP6|SEQUENCE2| + * |GP7|SEQUENCE3| + * - WakeupTimer. Wakeuptimer can automatically wakeup AFE from hibernate state and trigger selected + * sequence in register SEQORDER. This register defines the order of sequence that + * Wakeuptimer will trigger. There are 8 slots in this register. You can fill in any + * of the four sequences. Also, you can choose not to use all these 8 slots, just simply + * specify the end slot. We call the 8 slots are A/B/C/D/E/F/G/H. For example you can + * choose the end slot as C. So wakeup timer will trigger the sequence in below order: + * A->B->C->A->B->C->A->B->C->... until you stop Wakeuptimer. + * If you fill in slot A with sequence0, B with Sequence3, C with sequence1, the sequence + * will be executed in the order defined above(A-B-C-A-B-C...) + * SEQ0->SEQ3->SEQ1->SEQ0->SEQ3->SEQ1->... + * For each sequence, there is a sleep timer and a wakeup timer. The timer will automatically + * load corresponding value. + * The structure @ref WUPTCfg_Type can be used to initialize all above settings. + * + * In this example, we use both three kinds of trigger source. + * We firstly use Wakeup Timer to trigger sequence 0/1/2. The sequence is used to write registers and + * generate a custom-interrupt. We detect the interrupt to identify which sequence is running. + * Finally, we use GPIO to trigger sequence3. + * + * When there is conflict between trigger signals, for example, GPIO triggered one sequence that is running, + * current strategy is ignore this trigger. + * Use @reg SEQCfg_Type to configure sequencer. + * + * @note: connect GP2 and GP1 together. This demo show how to use GPIO to trigger sequencer. GP2 is the trigger input. + * We use GP1 to generate the trigger signal, while in real case, it should be the MCU's GPIO. +*/ +#include "ad5940.h" +#include +#include "string.h" + +int32_t SeqISR(void); +BoolFlag bSeqEnd = bFALSE; +static const uint32_t Seq0Commands[]= +{ + SEQ_WR(REG_AFE_SWCON, 0x0000), + SEQ_INT0(), /* generate custom-interrupt 0. We can generate any custom interrupt(SEQ_INT0/1/2/3()) by sequencer. */ +}; + +static const uint32_t Seq1Commands[]= +{ + SEQ_WR(REG_AFE_SWCON, 0x1111), + SEQ_INT1(), /* generate custom-interrupt 0 */ + SEQ_STOP(), /* Disable sequencer */ +}; + +static const uint32_t Seq2Commands[]= +{ + SEQ_WR(REG_AFE_SWCON, 0x2222), + SEQ_INT2(), /* generate custom-interrupt 1 */ +}; + +static const uint32_t Seq3Commands[]= +{ + SEQ_WR(REG_AFE_SWCON, 0x3333), + SEQ_INT3(), /* generate custom-interrupt 1 */ +}; + +static int32_t AD5940PlatformCfg(void) +{ + CLKCfg_Type clk_cfg; + FIFOCfg_Type fifo_cfg; + AGPIOCfg_Type gpio_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + AD5940_Initialize(); /* Call this right after AFE reset */ + /* Platform configuration */ + /* Step1. Configure clock */ + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + /* Step2. Configure FIFO and Sequencer*/ + fifo_cfg.FIFOEn = bFALSE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = 4;//AppIMPCfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); + fifo_cfg.FIFOEn = bTRUE; + AD5940_FIFOCfg(&fifo_cfg); + + /* Step3. Interrupt controller */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); /* Enable all interrupt in INTC1, so we can check INTC flags */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + AD5940_INTCCfg(AFEINTC_0, AFEINTSRC_ENDSEQ|AFEINTSRC_CUSTOMINT0|AFEINTSRC_CUSTOMINT1|AFEINTSRC_CUSTOMINT2|AFEINTSRC_CUSTOMINT3, bTRUE); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + /* Step4: Reconfigure GPIO */ + /* GP0: the interrupt output. + GP1: normal GPIO + GP2: used as trigger to sequence2. If valid trigger signal detected, sequencer will try to run sequence2. + GP3: not used. + GP4: controlled by sequencer. + Others: not used. The default function is mode0. + */ + gpio_cfg.FuncSet = GP0_INT|GP1_GPIO|GP2_TRIG|GP4_SYNC; + gpio_cfg.InputEnSet = AGPIO_Pin2; + gpio_cfg.OutputEnSet = AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin2|AGPIO_Pin4; + gpio_cfg.OutVal = 0; + gpio_cfg.PullEnSet = 0; + AD5940_AGPIOCfg(&gpio_cfg); + return 0; +} + +#define SEQ0ADDR 0 +#define SEQ1ADDR 16 +#define SEQ2ADDR 32 +#define SEQ3ADDR 48 + +void AD5940_Main(void) +{ + SEQCfg_Type seq_cfg; + FIFOCfg_Type fifo_cfg; + WUPTCfg_Type wupt_cfg; + SEQInfo_Type seqinfo0, seqinfo1, seqinfo2, seqinfo3; + SeqGpioTrig_Cfg seqgpiotrig_cfg; + AD5940PlatformCfg(); + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bTRUE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bTRUE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Reconfigure FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_DFT, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_SINC3; + fifo_cfg.FIFOThresh = 4; + AD5940_FIFOCfg(&fifo_cfg); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + seqinfo0.pSeqCmd = Seq0Commands; + seqinfo0.SeqId = SEQID_0; + seqinfo0.SeqLen = SEQ_LEN(Seq0Commands); + seqinfo0.SeqRamAddr = SEQ0ADDR; + seqinfo0.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo0); /* Configure sequence0 info and write commands to SRAM */ + + seqinfo1.pSeqCmd = Seq1Commands; + seqinfo1.SeqId = SEQID_1; + seqinfo1.SeqLen = SEQ_LEN(Seq1Commands); + seqinfo1.SeqRamAddr = SEQ1ADDR; + seqinfo1.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo1); + + seqinfo2.pSeqCmd = Seq2Commands; + seqinfo2.SeqId = SEQID_2; + seqinfo2.SeqLen = SEQ_LEN(Seq2Commands); + seqinfo2.SeqRamAddr = SEQ2ADDR; + seqinfo2.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo2); + + seqinfo3.pSeqCmd = Seq3Commands; + seqinfo3.SeqId = SEQID_3; + seqinfo3.SeqLen = SEQ_LEN(Seq3Commands); + seqinfo3.SeqRamAddr = SEQ3ADDR; + seqinfo3.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo3); + + /* Configure wakeup timer */ + wupt_cfg.WuptEn = bFALSE; /* Don't start it right now. */ + wupt_cfg.WuptEndSeq = WUPTENDSEQ_C; /* A->B->C->A->B-C */ + wupt_cfg.WuptOrder[0] = SEQID_0; /* Put SEQ0 to slotA */ + wupt_cfg.WuptOrder[1] = SEQID_3; /* Put SEQ3 to slotB */ + wupt_cfg.WuptOrder[2] = SEQID_1; /* Put SEQ1 to slotC */ + /* There is no need to init slot DEFGH, that's WuptOrder[3] to WuptOrder[7], becaue we don't use it. EndofSeq is C.*/ + wupt_cfg.SeqxSleepTime[SEQID_0] = 10; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(32000.0f*500/1000.0f) - 10 - 2; /* 500ms after, wakeup and trigger seq0 */ + wupt_cfg.SeqxSleepTime[SEQID_3] = 10; + wupt_cfg.SeqxWakeupTime[SEQID_3] = (uint32_t)(32000.0f*1000/1000.0f)- 10 -2; /* 1000ms after, trigger seq2 */ + wupt_cfg.SeqxSleepTime[SEQID_1] = 10; + wupt_cfg.SeqxWakeupTime[SEQID_1] = (uint32_t)(32000.0f*2000/1000.0f)- 10 -2; /* 2000ms after, trigger seq2 */ + AD5940_WUPTCfg(&wupt_cfg); + + printf("Test0: trigger sequencer by wakeup timer.\n"); + AD5940_WUPTCtrl(bTRUE); /* Enable wakeup timer. */ + while(1) + { + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + SeqISR(); + if(bSeqEnd) + break; + } + } + AD5940_WUPTCtrl(bFALSE); /* Wakeup timer is still running and triggering. Trigger is not accepted because sequencer + is disabled in last sequence(SEQ1) command. */ + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer again, because we disabled it in seq3 last command. */ + + /* Test MMR trigger */ + printf("\nTest1: trigger sequence2 manually by register write.\n"); + AD5940_SEQMmrTrig(SEQID_2); /* Trigger sequence2 manually. */ + /* Wait until CUSTMINT2 is set. We generate this interrupt in SEQ2 */ + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_CUSTOMINT2) == bFALSE); /* Test INTC1, we enabled all interrupts in INTC1. */ + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT2); + printf("sequence2 has been executed\n"); + printf("SWCON:0x%08x\n", AD5940_ReadReg(REG_AFE_SWCON)); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + /* Toggle GPIO to trigger sequencer2 */ + printf("\nTest2: trigger sequence2 manually by GPIO\n"); + printf("Please connect GP2 and GP1 together. We will set GP2 function to TRIG.\n" + "GP1 is set to GPIO function and is in output state. We use GP1 to toggle GP2.\n"); + AD5940_Delay10us(100*1000*2); + printf("Toggle GPIO now\n"); + + /* Allow GP2 falling edge to trigger sequence2 */ + seqgpiotrig_cfg.bEnable = bTRUE; + seqgpiotrig_cfg.PinSel = AGPIO_Pin2; + seqgpiotrig_cfg.SeqPinTrigMode = SEQPINTRIGMODE_FALLING; + AD5940_SEQGpioTrigCfg(&seqgpiotrig_cfg); + /* GP2 is connected to GP1 by user. + We generate falling edge on GP1(gpio, output) to control GP2(trigger, input). + */ + AD5940_AGPIOSet(AGPIO_Pin1); + AD5940_AGPIOClr(AGPIO_Pin1); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_CUSTOMINT2) == bFALSE); /* Test INTC1, we enabled all interrupts in INTC1. */ + + printf("Trigger received and sequence2 has been executed\n\n"); + printf("Sequencer test done!\n"); + while(1); +} + +int32_t SeqISR(void) +{ + uint32_t IntFlag, temp; + + IntFlag = AD5940_INTCGetFlag(AFEINTC_0); + + if(IntFlag & AFEINTSRC_CUSTOMINT0) + { + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT0); + printf("Custom INT0!\n"); + temp = AD5940_ReadReg(REG_AFE_SWCON); + printf("SWCON:0x%08x\n", temp); + } + if(IntFlag & AFEINTSRC_CUSTOMINT1) + { + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT1); + printf("Custom INT1!\n"); + temp = AD5940_ReadReg(REG_AFE_SWCON); + printf("SWCON:0x%08x\n", temp); + } + if(IntFlag & AFEINTSRC_CUSTOMINT2) + { + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT2); + printf("Custom INT2!\n"); + temp = AD5940_ReadReg(REG_AFE_SWCON); + printf("SWCON:0x%08x\n", temp); + } + if(IntFlag & AFEINTSRC_CUSTOMINT3) + { + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT3); + printf("Custom INT3!\n"); + temp = AD5940_ReadReg(REG_AFE_SWCON); + printf("SWCON:0x%08x\n", temp); + } + if(IntFlag & AFEINTSRC_ENDSEQ) /* This interrupt is generated when Sequencer is disabled. */ + { + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + printf("End of Sequence\n"); + bSeqEnd = bTRUE; + } + return AD5940ERR_OK; +} + diff --git a/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.ewd b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.ewd new 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$PROJ_DIR$\..\AD5940_Sequencer.c + + + $PROJ_DIR$\main.c + + + + CMSIS-Pack + CMSISPack.Component + + $PROJ_DIR$\RTE\RTE_Components.h + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.rteconfig b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.uvoptx b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.uvoptx new file mode 100644 index 0000000..d0a63e7 --- /dev/null +++ b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.uvoptx @@ -0,0 +1,282 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 2 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_Sequencer.c + AD5940_Sequencer.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.uvprojx b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.uvprojx new file mode 100644 index 0000000..c5bb832 --- /dev/null +++ b/examples/AD5940_Sequencer/ADICUP3029/AD5940_Sequencer.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060528::V5.06 update 5 (build 528)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_Sequencer.c + 1 + ..\AD5940_Sequencer.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_Sequencer/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Sequencer/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..8222ff9 --- /dev/null +++ b/examples/AD5940_Sequencer/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,145 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: $Author: ADI $ + @brief: The port for ADI's ADICUP3029 board. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + ///@todo optimize FIFO operation for ADUCM3029. + while(length--) + { + // Flush Tx FIFO + pADI_SPI0->CTL |= BITM_SPI_CTL_TFLUSH; + pADI_SPI0->CTL &=~BITM_SPI_CTL_TFLUSH; + //do spi read and write + pADI_SPI0->CNT = 1; + pADI_SPI0->TX = *pSendBuffer++; + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0); + while((pADI_SPI0->STAT&BITM_SPI_STAT_TXIRQ) == 0); + pADI_SPI0->STAT = BITM_SPI_STAT_TXIRQ|BITM_SPI_STAT_XFRDONE; + *pRecvBuff++ = pADI_SPI0->RX; + } +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Sequencer/ADICUP3029/main.c b/examples/AD5940_Sequencer/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Sequencer/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Sequencer/NUCLEO-F411/AD5940_Sequencer.uvoptx b/examples/AD5940_Sequencer/NUCLEO-F411/AD5940_Sequencer.uvoptx new file mode 100644 index 0000000..1b18dab --- /dev/null +++ b/examples/AD5940_Sequencer/NUCLEO-F411/AD5940_Sequencer.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_Sequencer.c + AD5940_Sequencer.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Sequencer/NUCLEO-F411/AD5940_Sequencer.uvprojx b/examples/AD5940_Sequencer/NUCLEO-F411/AD5940_Sequencer.uvprojx new file mode 100644 index 0000000..4e57968 --- /dev/null +++ b/examples/AD5940_Sequencer/NUCLEO-F411/AD5940_Sequencer.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_Sequencer.c + 1 + ..\AD5940_Sequencer.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Sequencer/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Sequencer/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Sequencer/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Sequencer/NUCLEO-F411/main.c b/examples/AD5940_Sequencer/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Sequencer/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_SqrWaveVoltammetry/AD5940Main.c b/examples/AD5940_SqrWaveVoltammetry/AD5940Main.c new file mode 100644 index 0000000..8f5e8eb --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/AD5940Main.c @@ -0,0 +1,171 @@ +/*! + ***************************************************************************** + @file: AD5940Main.c + @author: $Author: nxu2 $ + @brief: Used to control specific application and process data. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "SqrWaveVoltammetry.h" + +/** + User could configure following parameters +**/ + +#define APPBUFF_SIZE 1024 +uint32_t AppBuff[APPBUFF_SIZE]; +float LFOSCFreq; /* Measured LFOSC frequency */ + +/** + * @brief An example to deal with data read back from AD5940. Here we just print data to UART + * @note UART has limited speed, it has impact when sample rate is fast. Try to print some of the data not all of them. + * @param pData: the buffer stored data for this application. The data from FIFO has been pre-processed. + * @param DataCount: The available data count in buffer pData. + * @return return 0. +*/ +static int32_t RampShowResult(float *pData, uint32_t DataCount) +{ + static uint32_t index; + /* Print data*/ + for(int i=0;iSeqStartAddr = 0x10; /* leave 16 commands for LFOSC calibration. */ + pRampCfg->MaxSeqLen = 512-0x10; /* 4kB/4 = 1024 */ + pRampCfg->RcalVal = 10000.0; /* 10kOhm RCAL */ + pRampCfg->ADCRefVolt = 1.820f; /* The real ADC reference voltage. Measure it from capacitor C12 with DMM. */ + pRampCfg->FifoThresh = 1023; /* Maximum value is 2kB/4-1 = 512-1. Set it to higher value to save power. */ + pRampCfg->SysClkFreq = 16000000.0f; /* System clock is 16MHz by default */ + pRampCfg->LFOSCClkFreq = LFOSCFreq; /* LFOSC frequency */ + pRampCfg->AdcPgaGain = ADCPGA_1P5; + pRampCfg->ADCSinc3Osr = ADCSINC3OSR_4; + + /* Step 2:Configure square wave signal parameters */ + pRampCfg->RampStartVolt = -400.0f; /* Measurement starts at 0V*/ + pRampCfg->RampPeakVolt = 0.0f; /* Measurement finishes at -0.4V */ + pRampCfg->VzeroStart = 1300.0f; /* Vzero is voltage on SE0 pin: 1.3V */ + pRampCfg->VzeroPeak = 1300.0f; /* Vzero is voltage on SE0 pin: 1.3V */ + pRampCfg->Frequency = 750; /* Frequency of square wave in Hz */ + pRampCfg->SqrWvAmplitude = 150; /* Amplitude of square wave in mV */ + pRampCfg->SqrWvRampIncrement = 5; /* Increment in mV*/ + pRampCfg->SampleDelay = 0.2f; /* Time between update DAC and ADC sample. Unit is ms and must be < (1/Frequency)/2 - 0.2*/ + pRampCfg->LPTIARtiaSel = LPTIARTIA_1K; /* Maximum current decides RTIA value */ + pRampCfg->bRampOneDir = bFALSE;//bTRUE; /* Only measure ramp in one direction */ +} + +void AD5940_Main(void) +{ + uint32_t temp; + AD5940PlatformCfg(); + AD5940RampStructInit(); + + //AD5940_McuSetLow(); + AppSWVInit(AppBuff, APPBUFF_SIZE); /* Initialize RAMP application. Provide a buffer, which is used to store sequencer commands */ + + + AD5940_Delay10us(100000); /* Add a delay to allow sensor reach equilibrium befor starting the measurement */ + AppSWVCtrl(APPCTRL_START, 0); /* Control IMP measurement to start. Second parameter has no meaning with this command. */ + + while(1) + { + if(AD5940_GetMCUIntFlag()) + { + AD5940_ClrMCUIntFlag(); + temp = APPBUFF_SIZE; + AppSWVISR(AppBuff, &temp); + RampShowResult((float*)AppBuff, temp); + } + + } +} + diff --git a/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.ewd b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.ewd @@ -0,0 +1,3104 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + 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encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.rteconfig b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.uvoptx b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.uvoptx new file mode 100644 index 0000000..24361b2 --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.uvoptx @@ -0,0 +1,351 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.RampState + + + 1 + 1 + AppRAMPCfg.StepNumber,0x0A + + + 2 + 1 + AppRAMPCfg.CurrStepPos,0x0A + + + 3 + 1 + DACSeqLenMax,0x0A + + + 4 + 1 + StepsThisBlock,0x0A + + + 5 + 1 + SeqLen,0x0A + + + 6 + 1 + AppBuff + + + 7 + 1 + bIsFinalBlk + + + 8 + 1 + StepsThisBlock,0x0A + + + 9 + 1 + BlockStartSRAMAddr,0x0A + + + 10 + 1 + SRAMAddr,0x0A + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\SqrWaveVoltammetry.c + SqrWaveVoltammetry.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.uvprojx b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.uvprojx new file mode 100644 index 0000000..9df06ea --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/AD5940_SqrWaveVoltmmetry.uvprojx @@ -0,0 +1,503 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + SqrWaveVoltammetry.c + 1 + ..\SqrWaveVoltammetry.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/main.c b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/AD5940_SqrWaveVoltammetry.uvoptx b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/AD5940_SqrWaveVoltammetry.uvoptx new file mode 100644 index 0000000..ad92dae --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/AD5940_SqrWaveVoltammetry.uvoptx @@ -0,0 +1,333 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940Main.c + AD5940Main.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\SqrWaveVoltammetry.c + SqrWaveVoltammetry.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/AD5940_SqrWaveVoltammetry.uvprojx b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/AD5940_SqrWaveVoltammetry.uvprojx new file mode 100644 index 0000000..fcbf4a6 --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/AD5940_SqrWaveVoltammetry.uvprojx @@ -0,0 +1,589 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940Main.c + 1 + ..\AD5940Main.c + + + SqrWaveVoltammetry.c + 1 + ..\SqrWaveVoltammetry.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/main.c b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_SqrWaveVoltammetry/SqrWaveVoltammetry.c b/examples/AD5940_SqrWaveVoltammetry/SqrWaveVoltammetry.c new file mode 100644 index 0000000..4a59548 --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/SqrWaveVoltammetry.c @@ -0,0 +1,941 @@ +/*! +***************************************************************************** +@file: SWVTest.c +@author: $Author: mlambe $ +@brief: Square Wave Voltammetry measurement sequences. +@date: Updated 15th May 2021 +----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +/** @addtogroup AD5940_System_Examples +* @{ +* @defgroup Ramp_Test_Example +* @brief Using sequencer to generate ramp signal and control ADC to sample data. +* @details +* @note Need to update code when runs at S2 silicon. +* @todo update LPDAC switch settings for S2 and LPDAC 1LSB bug. +* @todo Calibrate ADC/PGA firstly to get accurate current. (Voltage/Rtia = Current) +* @note The method to calculate LPDAC ouput voltage +* - #define LSB_DAC12BIT (2.2V/4095) +* - #define LSB_DAC6BIT (2.2V/4095*64) +* - Volt_12bit = Code12Bit*LSB_DAC12BIT + 0.2V +* - Volt_6bit = Code6Bit*LSB_DAC6BIT + 0.2V +* +* # Ramp Signal Parameters definition +* +* @code +* (Vbias - Vzero): +* RampPeakVolt --> / +* / +* / +* / +* / +* / +* / +* / +* / +* RampStartVolt --> / +* +* Vzero: If there is no limitation on Vzero, Set VzeroStart to 2.2 and VzeroPeak to 0.4V +* Voltage VzeroStart --> ______ +* | +* Voltage VzeroPeak --> |_____ +* +* +* Vbias: Vbias is calculated from RampPeakVolt, RampStartVolt, VzeroStart and VzeroPeak. +* Voltage VbiasPeak --> /| / +* / | / +* / | / +* / | / +* Voltage VbiasStart --> / |/ +* +* RampState define: S0 | S1 | S2 | +* @endcode +* +* # The sequencer method to do Ramp test. +* The Ramp test need to update DAC data in real time to generate required waveform, and control ADC to start sample data. \n +* We used two kinds of sequence to realize it. One is to control DAC where SEQ0 and SEQ1 are used, another sequence SEQ2 controls ADC. +* ## Sequence Allocation +* SEQ3 is used to initialize AD5940.\n +* SEQ0/1 is used to generate voltage step.\n +* SEQ2 is used to startup ADC to sample one point. +* +* |SRAM allocation||| +* |------------|----------------|---------| +* |SequenceID | AddressRange | Usage | +* |SEQID_3 | 0x0000-0xzzzz | Initialization sequence| +* |SEQID_2 | 0xzzzz-0xyyyy | ADC control sequence, run this sequence will get one ADC result| +* |SEQID_0/1 | 0xyyyy-end | DAC update sequence. If size if not enough for all steps, use it like a FIFO.| +* Where 0xzzzz equals to SEQ3 length, 0xyyyy equals to sum of SEQ2 and SEQ3 length. +* In one word, put SEQ2 commands right after SEQ3. Don't waste any SRAM resource. +* ##Sequencer Running Order +* The sequencer running order is set to firstly update DAC then start ADC. Repeat this process until all waveform generated. +* Below is explanation of sequencer running order. +* @code +* DAC voltage changes with sequencer, assume each step is 0.05V start from 0.2V +* 400mV-> _______ +* 350mV-> _____ | +* 300mV-> _____ | |____| +* 250mV-> | |____| +* 200mV-> __| +* Update DAC: ? ? ? ? ? ? -No update +* SEQ0 SEQ1 SEQ0 SEQ1 SEQ0 SEQ1 SEQ0 +* | / | / | / | / | / | / | +* SEQ2 SEQ2 SEQ2 SEQ2 SEQ2 SEQ2 |The final sequence is set to disable sequencer +* WuptTrigger ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? +* Time Spend |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 |t1| t2 +* |The following triggers are ignored because sequencer is disabled +* Wupt: Wakeup Timer +* @endcode +* +* The final sequence will disable sequencer thus disable the whole measurement. It could be SEQ0 or SEQ1. \n +* SEQ2 will always follow SEQ0/SEQ1 to turn on ADC to sample data. \n +* SEQ0/1 and SEQ2 is managed by wakeup timer. The time delay between SEQ0/1 and SEQ +* is set by user. Reason is that after updating DAC, signal needs some time to settle before sample it. \n +* In above figure, the time t1 is the delay set by user which controls where ADC starts sampling. +* +* SEQ2 commands are fixed. Function is simply turn on ADC for a while and turn off it +* after required number of data ready. \n +* SEQ0/1 is always changing its start address to update DAC with different voltage. \n +* Check above figure we can see SEQ0/SEQ1 is repeatedly trigged by Wakeuptimer, if we don't change the start +* Address of SEQ0/SEQ1, they will always update DAC with same data, thus no waveform generated. +* +* Considering below SEQ0 command which is similar for SEQ1 on modifying SEQxINFO register.: +* +* **Sequencer Command Block 1** +* @code +* //Total sequence command length is **4** +* SEQ_WR(REG_AFE_LPDACDAT0, 0x1234); //update DAC with correct voltage +* SEQ_WAIT(10); //wait 10clocks to allow DAC update +* SEQ_WR(REG_AFE_SEQ1INFO, NextAddr|SeqLen); //The next sequence is SEQ1, set it to correct address where stores commands. +* SEQ_SLP(); //Put AFE to hibernate/sleep mode. +* @endcode +* +* It will update DAC with data 0x1234, then it wait 10 clocks to allow LPDAC update. +* The final command is to send AFE to sleep state. +* The third commands here is to allow modify sequence infomation by sequencer. Above piece of commands are running by SEQ0. +* It modify the start address of **SEQ1**. SEQ1 has same ability to update DAC data but with **different** data. +* By the time Wakeup Timer triggers SEQ1, it will update DAC with correct data. +* +* The last block of sequencer command is to disable sequencer. +* +* **Sequencer Command Block 2** +* @code +* SEQ_NOP(); +* SEQ_NOP(); +* SEQ_NOP(); +* SEQ_STOP(); //Put AFE to hibernate/sleep mode. +* @endcode +* +* Total SRAM is 6kB in AD594x. In normal other application, we use 2kB for sequencer and 4kB for FIFO. +* Assume the ramp test require 128 steps, then the sequence length is 4*128 = 512, each command need 4Byte. So it costs 2kB SRAM. +* When ramp test requires hundres of voltage steps(ADC samples), 2kB SRAM is far from enough. We recommend to use 4kB for sequencer +* and 2kB for data FIFO. +* If ramp test require more steps, then we need to update SRAM with commands dynamically, use it as a ping-pong buffer. +* +* **Sequencer Command Block 3** +* @code +* SEQ_WR(REG_AFE_LPDACDAT0, 0x1234); +* SEQ_WAIT(10); +* SEQ_WR(REG_AFE_SEQ1INFO, NextAddr|SeqLen); +* SEQ_INT0(); //Generate custom interrupt 0 to inform MCU to update ping-pong buffer. +* @endcode +* +* @{ +* **/ + +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" +#include "SqrWaveVoltammetry.h" + +/** +* @brief The ramp application paramters. +* @details Do not modify following default parameters. Use the function in AD5940Main.c to change it. +* +* */ +static AppSWVCfg_Type AppSWVCfg = +{ + .bParaChanged = bFALSE, + .SeqStartAddr = 0, + .MaxSeqLen = 0, + .SeqStartAddrCal = 0, + .MaxSeqLenCal = 0, + + .LFOSCClkFreq = 32000.0, + .SysClkFreq = 16000000.0, + .AdcClkFreq = 16000000.0, + .RcalVal = 10000.0, + .ADCRefVolt = 1820.0f, /* 1.8V or 1.82V? */ + /* Describe Ramp signal */ + .RampStartVolt = -1000.0f, /* -1V */ + .RampPeakVolt = +1000.0f, /* +1V */ + .VzeroStart = 2200.0f, /* 2.2V */ + .VzeroPeak = 400.0f, /* 0.4V */ + .StepNumber = 866, + /* Receive path configuration */ + .SampleDelay = 1.0f, /* 1ms */ + .LPTIARtiaSel = LPTIARTIA_20K, /* Maximum current decides RTIA value */ + .ExternalRtiaValue = 20000.0f, /* Optional external RTIA resistore value in Ohm. */ + .AdcPgaGain = ADCPGA_1, + .ADCSinc3Osr = ADCSINC3OSR_4, + .FifoThresh = 4, + /* Priviate parameters */ + .SWVInited = bFALSE, + .StopRequired = bFALSE, + .RampState = SWV_STATE0, + .bFirstDACSeq = bTRUE, + .bSqrWaveHiLevel = bFALSE, + /* Configure Square wave */ + .Frequency = 25, /* Frequency in Hz */ + .SqrWvAmplitude = 25, /* Square wave amplitude in mV */ + .SqrWvRampIncrement = 5, /* Ramp increment in mV*/ +}; + +/** +* @todo add paramater check. +* SampleDelay will limited by wakeup timer, check WUPT register value calculation equation below for reference. +* SampleDelay > 1.0ms is acceptable. +* ... +* */ + +/** +* @brief This function is provided for upper controllers that want to change +* application parameters specially for user defined parameters. +* @param pCfg: The pointer used to store application configuration structure pointer. +* @return none. +*/ +AD5940Err AppSWVGetCfg(void *pCfg) +{ + if(pCfg) + { + *(AppSWVCfg_Type**)pCfg = &AppSWVCfg; + return AD5940ERR_OK; + } + return AD5940ERR_PARA; +} + +/** +* @brief Control application like start, stop. +* @param Command: The command for this application, select from below paramters +* - APPCTRL_START: start the measurement. Note: the ramp test need firstly call function AppSWVInit() every time before start it. +* - APPCTRL_STOPNOW: Stop the measurement immediately. +* - APPCTRL_STOPSYNC: Stop the measuremnt when current measured data is read back. +* - APPCTRL_SHUTDOWN: Stop the measurement immediately and put AFE to shut down mode(turn off LP loop and enter hibernate). +* @return none. +*/ +AD5940Err AppSWVCtrl(uint32_t Command, void *pPara) +{ + switch (Command) + { + case APPCTRL_START: + { + WUPTCfg_Type wupt_cfg; + + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + if(AppSWVCfg.SWVInited == bFALSE) + return AD5940ERR_APPERROR; + /** + * SWV example is special, because the sequence is dynamically generated. + * Before 'START' ramp test, call AppSWVInit firstly. + */ + if(AppSWVCfg.RampState == SWV_STOP) + return AD5940ERR_APPERROR; + + /* Start it */ + wupt_cfg.WuptEn = bTRUE; + wupt_cfg.WuptEndSeq = WUPTENDSEQ_D; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.WuptOrder[1] = SEQID_2; + wupt_cfg.WuptOrder[2] = SEQID_1; + wupt_cfg.WuptOrder[3] = SEQID_2; + wupt_cfg.SeqxSleepTime[SEQID_2] = 1; + wupt_cfg.SeqxWakeupTime[SEQID_2] = (uint32_t)(AppSWVCfg.LFOSCClkFreq*AppSWVCfg.SampleDelay/1000.0f) - 1; + wupt_cfg.SeqxSleepTime[SEQID_0] = 1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(AppSWVCfg.LFOSCClkFreq*((1/AppSWVCfg.Frequency*500) - AppSWVCfg.SampleDelay)/1000.0f) - 4; + wupt_cfg.SeqxSleepTime[SEQID_1] = wupt_cfg.SeqxSleepTime[SEQID_0]; + wupt_cfg.SeqxWakeupTime[SEQID_1] = wupt_cfg.SeqxWakeupTime[SEQID_0]; + + AD5940_WUPTCfg(&wupt_cfg); + break; + } + case APPCTRL_STOPNOW: + { + if(AD5940_WakeUp(10) > 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + /* Start Wupt right now */ + AD5940_WUPTCtrl(bFALSE); + /* There is chance this operation will fail because sequencer could put AFE back + to hibernate mode just after waking up. Use STOPSYNC is better. */ + AD5940_WUPTCtrl(bFALSE); + break; + } + case APPCTRL_STOPSYNC: + { + AppSWVCfg.StopRequired = bTRUE; + break; + } + case APPCTRL_SHUTDOWN: + { + AppSWVCtrl(APPCTRL_STOPNOW, 0); /* Stop the measurement if it's running. */ + AD5940_ShutDownS(); + } + break; + default: + break; + } + return AD5940ERR_OK; +} + +/** +* @brief Generate initialization sequence and write the commands to SRAM. +* @return return error code. +*/ +static AD5940Err AppSWVSeqInitGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + AFERefCfg_Type aferef_cfg; + LPLoopCfg_Type lploop_cfg; + DSPCfg_Type dsp_cfg; + /* Start sequence generator here */ + AD5940_SEQGenCtrl(bTRUE); + + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + lploop_cfg.LpAmpCfg.LpAmpSel = LPAMP0; + lploop_cfg.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_BOOST3; + lploop_cfg.LpAmpCfg.LpPaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaPwrEn = bTRUE; + lploop_cfg.LpAmpCfg.LpTiaRf = LPTIARF_20K; + lploop_cfg.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lploop_cfg.LpAmpCfg.LpTiaRtia = AppSWVCfg.LPTIARtiaSel; + if(AppSWVCfg.LPTIARtiaSel == LPTIARTIA_OPEN) /* User want to use external RTIA */ + lploop_cfg.LpAmpCfg.LpTiaSW = LPTIASW(13)|LPTIASW(2)|LPTIASW(4)|LPTIASW(5)|LPTIASW(9)/*|LPTIASW(10)*/; /* SW5/9 is closed to support external RTIA resistor */ + else + lploop_cfg.LpAmpCfg.LpTiaSW = /*LPTIASW(13)|*/LPTIASW(2)|LPTIASW(4); + lploop_cfg.LpDacCfg.LpdacSel = LPDAC0; + lploop_cfg.LpDacCfg.DacData6Bit = (uint32_t)((AppSWVCfg.VzeroStart - 200.0f)/DAC6BITVOLT_1LSB); + lploop_cfg.LpDacCfg.DacData12Bit = (int32_t)((AppSWVCfg.RampStartVolt)/DAC12BITVOLT_1LSB) + lploop_cfg.LpDacCfg.DacData6Bit*64 ; + lploop_cfg.LpDacCfg.DataRst = bFALSE; + lploop_cfg.LpDacCfg.LpDacSW = LPDACSW_VBIAS2LPPA/*|LPDACSW_VBIAS2PIN*/|LPDACSW_VZERO2LPTIA/*|LPDACSW_VZERO2PIN*/; + lploop_cfg.LpDacCfg.LpDacRef = LPDACREF_2P5; + lploop_cfg.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lploop_cfg.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; /* Step Vbias. Use 12bit DAC ouput */ + lploop_cfg.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Base is Vzero. Use 6 bit DAC ouput */ + lploop_cfg.LpDacCfg.PowerEn = bTRUE; + AD5940_LPLoopCfgS(&lploop_cfg); + + AD5940_StructInit(&dsp_cfg, sizeof(dsp_cfg)); + dsp_cfg.ADCBaseCfg.ADCMuxN = ADCMUXN_LPTIA0_N; + dsp_cfg.ADCBaseCfg.ADCMuxP = ADCMUXP_LPTIA0_P; + dsp_cfg.ADCBaseCfg.ADCPga = AppSWVCfg.AdcPgaGain; + + dsp_cfg.ADCFilterCfg.ADCSinc3Osr = AppSWVCfg.ADCSinc3Osr; + dsp_cfg.ADCFilterCfg.ADCRate = ADCRATE_800KHZ; /* ADC runs at 16MHz clock in this example, sample rate is 800kHz */ + dsp_cfg.ADCFilterCfg.BpSinc3 = bFALSE; /* We use data from SINC3 filter */ + dsp_cfg.ADCFilterCfg.Sinc2NotchEnable = bTRUE; + dsp_cfg.ADCFilterCfg.BpNotch = bTRUE; + dsp_cfg.ADCFilterCfg.ADCSinc2Osr = ADCSINC2OSR_1067; /* Don't care */ + dsp_cfg.ADCFilterCfg.ADCAvgNum = ADCAVGNUM_2; /* Don't care because it's disabled */ + AD5940_DSPCfgS(&dsp_cfg); + + /* Sequence end. */ + AD5940_SEQGenInsert(SEQ_STOP()); /* Add one extra command to disable sequencer for initialization sequence because we only want it to run one time. */ + + /* Stop sequence generator here */ + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + if(error == AD5940ERR_OK) + { + AD5940_StructInit(&AppSWVCfg.InitSeqInfo, sizeof(AppSWVCfg.InitSeqInfo)); + if(SeqLen >= AppSWVCfg.MaxSeqLen) + return AD5940ERR_SEQLEN; + + AppSWVCfg.InitSeqInfo.SeqId = SEQID_3; + AppSWVCfg.InitSeqInfo.SeqRamAddr = AppSWVCfg.SeqStartAddr; + AppSWVCfg.InitSeqInfo.pSeqCmd = pSeqCmd; + AppSWVCfg.InitSeqInfo.SeqLen = SeqLen; + AppSWVCfg.InitSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppSWVCfg.InitSeqInfo); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/** +* @brief Generate ADC control sequence and write the commands to SRAM. +* @return return error code. +*/ +static AD5940Err AppSWVSeqADCCtrlGen(void) +{ + AD5940Err error = AD5940ERR_OK; + const uint32_t *pSeqCmd; + uint32_t SeqLen; + + uint32_t WaitClks; + ClksCalInfo_Type clks_cal; + + clks_cal.DataCount = 1; /* Sample one point everytime */ + clks_cal.DataType = DATATYPE_SINC3; + clks_cal.ADCSinc3Osr = AppSWVCfg.ADCSinc3Osr; + clks_cal.ADCSinc2Osr = ADCSINC2OSR_1067; /* Don't care */ + clks_cal.ADCAvgNum = ADCAVGNUM_2; /* Don't care */ + clks_cal.RatioSys2AdcClk = AppSWVCfg.SysClkFreq/AppSWVCfg.AdcClkFreq; + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + AD5940_SEQGenCtrl(bTRUE); + AD5940_SEQGpioCtrlS(AGPIO_Pin2); + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_SEQGenInsert(SEQ_WAIT(16*100)); /* wait 250us for reference power up */ + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); /* Start ADC convert and DFT */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); /* wait for first data ready */ + AD5940_AFECtrlS(AFECTRL_ADCPWR|AFECTRL_ADCCNV, bFALSE); /* Stop ADC */ + AD5940_SEQGpioCtrlS(0); + AD5940_EnterSleepS();/* Goto hibernate */ + /* Sequence end. */ + error = AD5940_SEQGenFetchSeq(&pSeqCmd, &SeqLen); + AD5940_SEQGenCtrl(bFALSE); /* Stop sequencer generator */ + + if(error == AD5940ERR_OK) + { + AD5940_StructInit(&AppSWVCfg.ADCSeqInfo, sizeof(AppSWVCfg.ADCSeqInfo)); + if((SeqLen + AppSWVCfg.InitSeqInfo.SeqLen) >= AppSWVCfg.MaxSeqLen) + return AD5940ERR_SEQLEN; + AppSWVCfg.ADCSeqInfo.SeqId = SEQID_2; + AppSWVCfg.ADCSeqInfo.SeqRamAddr = AppSWVCfg.InitSeqInfo.SeqRamAddr + AppSWVCfg.InitSeqInfo.SeqLen ; + AppSWVCfg.ADCSeqInfo.pSeqCmd = pSeqCmd; + AppSWVCfg.ADCSeqInfo.SeqLen = SeqLen; + AppSWVCfg.ADCSeqInfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&AppSWVCfg.ADCSeqInfo); + } + else + return error; /* Error */ + return AD5940ERR_OK; +} + +/** +* @brief Calculate DAC code step by step. +* @details The calculation is based on following variables. +* - RampStartVolt +* - RampPeakVolt +* - VzeroStart +* - VzeroPeak +* - StepNumber +* Below variables must be initialzed before call this function. It's done in function @ref AppSWVInit +* - RampState +* - CurrStepPos +* - bDACCodeInc +* - CurrRampCode +* @return return error code. +*/ +static AD5940Err RampDacRegUpdate(uint32_t *pDACData) +{ + uint32_t VbiasCode, VzeroCode; + + if (AppSWVCfg.bRampOneDir) + { + if(AppSWVCfg.RampStartVolt > AppSWVCfg.RampPeakVolt) + AppSWVCfg.bDACCodeInc = bFALSE; + switch(AppSWVCfg.RampState) + { + case SWV_STATE0: /* Begin of Ramp */ + AppSWVCfg.CurrVzeroCode = (uint32_t)((AppSWVCfg.VzeroStart - 200.0f)/DAC6BITVOLT_1LSB); + AppSWVCfg.RampState = SWV_STATE1; + break; + case SWV_STATE1: + if(AppSWVCfg.CurrStepPos >= AppSWVCfg.StepNumber/2) + { + AppSWVCfg.RampState = SWV_STATE2; /* Enter State2 */ + AppSWVCfg.CurrVzeroCode = (uint32_t)((AppSWVCfg.VzeroPeak - 200.0f)/DAC6BITVOLT_1LSB); + } + break; + case SWV_STATE2: + if(AppSWVCfg.CurrStepPos >= AppSWVCfg.StepNumber) + AppSWVCfg.RampState = SWV_STOP; /* Enter Stop */ + break; + case SWV_STOP: + break; + } + } + + else + { + switch(AppSWVCfg.RampState) + { + case SWV_STATE0: /* Begin of Ramp */ + AppSWVCfg.CurrVzeroCode = (uint32_t)((AppSWVCfg.VzeroStart - 200.0f)/DAC6BITVOLT_1LSB); + AppSWVCfg.RampState = SWV_STATE1; + break; + + case SWV_STATE1: + if(AppSWVCfg.CurrStepPos >= AppSWVCfg.StepNumber/4) + { + AppSWVCfg.RampState = SWV_STATE2; /* Enter State2 */ + AppSWVCfg.CurrVzeroCode = (uint32_t)((AppSWVCfg.VzeroPeak - 200.0f)/DAC6BITVOLT_1LSB); + } + break; + + case SWV_STATE2: + if(AppSWVCfg.CurrStepPos >= (AppSWVCfg.StepNumber*2)/4) + { + AppSWVCfg.RampState = SWV_STATE3; /* Enter State2 */ + AppSWVCfg.bDACCodeInc = AppSWVCfg.bDACCodeInc ? bFALSE : bTRUE; + } + break; + case SWV_STATE3: + if(AppSWVCfg.CurrStepPos >= (AppSWVCfg.StepNumber*3)/4) + { + AppSWVCfg.RampState = SWV_STATE4; /* Enter State2 */ + AppSWVCfg.CurrVzeroCode = (uint32_t)((AppSWVCfg.VzeroPeak - 200.0f)/DAC6BITVOLT_1LSB); + } + break; + case SWV_STATE4: + if(AppSWVCfg.CurrStepPos >= (AppSWVCfg.StepNumber)) + AppSWVCfg.RampState = SWV_STOP; /* Enter Stop */ + break; + case SWV_STOP: + break; + } + + } + AppSWVCfg.CurrStepPos++; + if(AppSWVCfg.bSqrWaveHiLevel) + { + if(AppSWVCfg.bDACCodeInc) + AppSWVCfg.CurrRampCode -= (AppSWVCfg.DACCodePerStep - AppSWVCfg.DACCodePerRamp); + else + AppSWVCfg.CurrRampCode -= AppSWVCfg.DACCodePerStep; + AppSWVCfg.bSqrWaveHiLevel = bFALSE; + }else + { + + if(AppSWVCfg.bDACCodeInc) + AppSWVCfg.CurrRampCode += AppSWVCfg.DACCodePerStep; + else + AppSWVCfg.CurrRampCode += (AppSWVCfg.DACCodePerStep - AppSWVCfg.DACCodePerRamp); + AppSWVCfg.bSqrWaveHiLevel = bTRUE; + } + VzeroCode = AppSWVCfg.CurrVzeroCode; + VbiasCode = (uint32_t)(VzeroCode*64 + AppSWVCfg.CurrRampCode); + + if(VbiasCode < (VzeroCode*64)) + VbiasCode --; + /* Truncate */ + if(VbiasCode > 4095) VbiasCode = 4095; + if(VzeroCode > 63) VzeroCode = 63; + *pDACData = (VzeroCode<<12)|VbiasCode; + return AD5940ERR_OK; +} + +/* Geneate sequence(s) to update DAC step by step */ +/* Note: this function doesn't need sequencer generator */ + +/** +* @brief Update DAC sequence in SRAM in real time. +* @details This function generates sequences to update DAC code step by step. It's also called in interrupt +* function when half commands in SRAM has been completed. We don't use sequence generator to save memory. +* Check more details from documentation of this example. @ref Ramp_Test_Example +* @return return error code +* +* */ +static AD5940Err AppSWVSeqDACCtrlGen(void) +{ +#define SEQLEN_ONESTEP 4L /* How many sequence commands are needed to update LPDAC. */ +#define CURRBLK_BLK0 0 /* Current block is BLOCK0 */ +#define CURRBLK_BLK1 1 /* Current block is BLOCK1 */ + AD5940Err error = AD5940ERR_OK; + uint32_t BlockStartSRAMAddr; + uint32_t DACData, SRAMAddr; + uint32_t i; + uint32_t StepsThisBlock; + BoolFlag bIsFinalBlk; + uint32_t SeqCmdBuff[SEQLEN_ONESTEP]; + + /* All below static variables are inited in below 'if' block. They are only used in this function */ + static BoolFlag bCmdForSeq0 = bTRUE; + static uint32_t DACSeqBlk0Addr, DACSeqBlk1Addr; + static uint32_t StepsRemainning, StepsPerBlock, DACSeqCurrBlk; + + AppSWVCfg.StepNumber = (uint32_t)(2*(AppSWVCfg.RampPeakVolt - AppSWVCfg.RampStartVolt)/AppSWVCfg.SqrWvRampIncrement); + if(AppSWVCfg.bRampOneDir == bFALSE) + { + AppSWVCfg.StepNumber*=2; + AppSWVCfg.StepNumber-=2; + } + //AppSWVCfg.FifoThresh = AppSWVCfg.StepNumber; + + if(AppSWVCfg.StepNumber >1020) + { + printf("Error: Selected Increment, StartVolt and PeakVolt exceed accepted limits \n"); + while(1){} + } + /* Do some math calculations */ + if(AppSWVCfg.bFirstDACSeq == bTRUE) + { + /* Reset bIsFirstRun at end of function. */ + int32_t DACSeqLenMax; + StepsRemainning = AppSWVCfg.StepNumber; + DACSeqLenMax = (int32_t)AppSWVCfg.MaxSeqLen - (int32_t)AppSWVCfg.InitSeqInfo.SeqLen - (int32_t)AppSWVCfg.ADCSeqInfo.SeqLen; + if(DACSeqLenMax < SEQLEN_ONESTEP*4) + return AD5940ERR_SEQLEN; /* No enough sequencer SRAM available */ + DACSeqLenMax -= SEQLEN_ONESTEP*2; /* Reserve commands each block */ + StepsPerBlock = DACSeqLenMax/SEQLEN_ONESTEP/2; + DACSeqBlk0Addr = AppSWVCfg.ADCSeqInfo.SeqRamAddr + AppSWVCfg.ADCSeqInfo.SeqLen; + DACSeqBlk1Addr = DACSeqBlk0Addr + StepsPerBlock*SEQLEN_ONESTEP; + DACSeqCurrBlk = CURRBLK_BLK0; + + /* Analog part */ + AppSWVCfg.DACCodePerStep = AppSWVCfg.SqrWvAmplitude/DAC12BITVOLT_1LSB; + AppSWVCfg.DACCodePerRamp = AppSWVCfg.SqrWvRampIncrement/DAC12BITVOLT_1LSB; + +#if ALIGIN_VOLT2LSB + AppSWVCfg.DACCodePerStep = (int32_t)AppSWVCfg.DACCodePerStep; + AppSWVCfg.DACCodePerRamp = (int32_t)AppSWVCfg.DACCodePerRamp; +#endif + if(AppSWVCfg.DACCodePerStep > 0) + AppSWVCfg.bDACCodeInc = bTRUE; + else + AppSWVCfg.bDACCodeInc = bFALSE; + AppSWVCfg.CurrRampCode = AppSWVCfg.RampStartVolt/DAC12BITVOLT_1LSB; + AppSWVCfg.RampState = SWV_STATE0; /* Init state to STATE0 */ + AppSWVCfg.CurrStepPos = 0; + + bCmdForSeq0 = bTRUE; /* Start with SEQ0 */ + } + + if(StepsRemainning == 0) return AD5940ERR_OK; /* Done. */ + bIsFinalBlk = StepsRemainning <= StepsPerBlock?bTRUE:bFALSE; + if(bIsFinalBlk) + StepsThisBlock = StepsRemainning; + else + StepsThisBlock = StepsPerBlock; + StepsRemainning -= StepsThisBlock; + + BlockStartSRAMAddr = (DACSeqCurrBlk == CURRBLK_BLK0)?\ +DACSeqBlk0Addr:DACSeqBlk1Addr; +SRAMAddr = BlockStartSRAMAddr; + +for(i=0; i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Start sequence generator */ + /* Initialize sequencer generator */ + if((AppSWVCfg.SWVInited == bFALSE)||\ + (AppSWVCfg.bParaChanged == bTRUE)) + { + if(pBuffer == 0) return AD5940ERR_PARA; + if(BufferSize == 0) return AD5940ERR_PARA; + + if(AppSWVCfg.LPTIARtiaSel == LPTIARTIA_OPEN) /* Internal RTIA is opened. User wants to use external RTIA resistor */ + { + AppSWVCfg.RtiaValue.Magnitude = AppSWVCfg.ExternalRtiaValue; + AppSWVCfg.RtiaValue.Phase = 0; + } + else + AppSWVRtiaCal(); + + AppSWVCfg.SWVInited = bFALSE; + AD5940_SEQGenInit(pBuffer, BufferSize); + /* Generate sequence and write them to SRAM start from address AppSWVCfg.SeqStartAddr */ + error = AppSWVSeqInitGen(); /* Application initialization sequence */ + if(error != AD5940ERR_OK) return error; + error = AppSWVSeqADCCtrlGen(); /* ADC control sequence */ + if(error != AD5940ERR_OK) return error; + AppSWVCfg.bParaChanged = bFALSE; /* Clear this flag as we already implemented the new configuration */ + } + + /* Reconfigure FIFO, The Rtia calibration function may generate data that stored to FIFO */ + AD5940_FIFOCtrlS(FIFOSRC_SINC3, bFALSE); /* Disable FIFO firstly */ + fifo_cfg.FIFOEn = bTRUE; + fifo_cfg.FIFOSrc = FIFOSRC_SINC3; + fifo_cfg.FIFOThresh = AppSWVCfg.FifoThresh; /* Change FIFO paramters */ + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; + AD5940_FIFOCfg(&fifo_cfg); + + /* Clear all interrupts */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + /* Generate DAC sequence */ + AppSWVCfg.bFirstDACSeq = bTRUE; + error = AppSWVSeqDACCtrlGen(); + if(error != AD5940ERR_OK) return error; + + /* Configure sequence info. */ + AppSWVCfg.InitSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppSWVCfg.InitSeqInfo); + + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer */ + AD5940_SEQMmrTrig(AppSWVCfg.InitSeqInfo.SeqId); + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + + AppSWVCfg.ADCSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppSWVCfg.ADCSeqInfo); + + AppSWVCfg.DACSeqInfo.WriteSRAM = bFALSE; + AD5940_SEQInfoCfg(&AppSWVCfg.DACSeqInfo); + + AD5940_SEQCtrlS(bFALSE); + AD5940_WriteReg(REG_AFE_SEQCNT, 0); + AD5940_SEQCtrlS(bTRUE); /* Enable sequencer, and wait for trigger */ + AD5940_ClrMCUIntFlag(); /* Clear interrupt flag generated before */ + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); /* Set to low power mode */ + + AppSWVCfg.SWVInited = bTRUE; /* SWV application has been initialized. */ + return AD5940ERR_OK; +} + +/** +* @brief This function is called in ISR when AFE has been wakeup and we can access registers. +* @param pData: the buffer points to data read back from FIFO. Not needed for this application-SWV +* @param pDataCount: The data count in pData buffer. +* @return return error code. +*/ +static int32_t AppSWVRegModify(int32_t * const pData, uint32_t *pDataCount) +{ + if(AppSWVCfg.StopRequired == bTRUE) + { + AD5940_WUPTCtrl(bFALSE); + return AD5940ERR_OK; + } + return AD5940ERR_OK; +} + +/** +* @brief Depending on the data type, do appropriate data pre-process before return back to controller +* @param pData: the buffer points to data read back from FIFO. Not needed for this application-SWV +* @param pDataCount: The data count in pData buffer. +* @return return error code. +*/ +static int32_t AppSWVDataProcess(int32_t * const pData, uint32_t *pDataCount) +{ + uint32_t i, datacount; + datacount = *pDataCount; + float *pOut = (float *)pData; + + for(i=0;i 10) /* Wakeup AFE by read register, read 10 times at most */ + return AD5940ERR_WAKEUP; /* Wakeup Failed */ + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); + *pCount = 0; + IntFlag = AD5940_INTCGetFlag(AFEINTC_0); + if(IntFlag & AFEINTSRC_CUSTOMINT0) /* High priority. */ + { + AD5940Err error; + AD5940_INTCClrFlag(AFEINTSRC_CUSTOMINT0); + //AD5940_McuSetHigh(); + error = AppSWVSeqDACCtrlGen(); + //AD5940_McuSetLow(); + if(error != AD5940ERR_OK) return error; + // AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); + //AD5940_EnterSleepS(); /* If there is need to do AFE re-configure, do it here when AFE is in active state */ + } + if(IntFlag&AFEINTSRC_DATAFIFOTHRESH) + { + FifoCnt = AD5940_FIFOGetCnt(); + + if(FifoCnt > BuffCount) + { + ///@todo buffer is limited. + } + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AppSWVRegModify(pBuff, &FifoCnt); + // AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); + //AD5940_EnterSleepS(); + /* Process data */ + AppSWVDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + return 0; + } + if(IntFlag & AFEINTSRC_ENDSEQ) + { + FifoCnt = AD5940_FIFOGetCnt(); + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + AD5940_FIFORd((uint32_t *)pBuff, FifoCnt); + /* Process data */ + AppSWVDataProcess((int32_t*)pBuff,&FifoCnt); + *pCount = FifoCnt; + AppSWVCtrl(APPCTRL_STOPNOW, 0); /* Stop the Wakeup Timer. */ + + } + return 0; +} + +/** +* @} +* @} +*/ diff --git a/examples/AD5940_SqrWaveVoltammetry/SqrWaveVoltammetry.h b/examples/AD5940_SqrWaveVoltammetry/SqrWaveVoltammetry.h new file mode 100644 index 0000000..a2e212c --- /dev/null +++ b/examples/AD5940_SqrWaveVoltammetry/SqrWaveVoltammetry.h @@ -0,0 +1,94 @@ +/*! + ***************************************************************************** + @file: RampTest.H + @author: $Author: nxu2 $ + @brief: Ramp Test header file. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#ifndef _SWVTEST_H_ +#define _SWVTEST_H_ +#include "ad5940.h" +#include +#include "string.h" +#include "math.h" + +/* Do not modify following parameters */ +#define ALIGIN_VOLT2LSB 0 /* Set it to 1 to align each voltage step to 1LSB of DAC. 0: step code is fractional. */ +#define DAC12BITVOLT_1LSB (2200.0f/4095) //mV +#define DAC6BITVOLT_1LSB (DAC12BITVOLT_1LSB*64) //mV + +/** + * The Ramp application related paramter structure +*/ +typedef struct +{ +/* Common configurations for all kinds of Application. */ + BoolFlag bParaChanged; /**< Indicate to generate sequence again. It's auto cleared by AppBIAInit */ + uint32_t SeqStartAddr; /**< Initialaztion sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLen; /**< Limit the maximum sequence. */ + uint32_t SeqStartAddrCal; /**< Not used for Ramp.Calibration sequence start address in SRAM of AD5940 */ + uint32_t MaxSeqLenCal; /**< Not used for Ramp. */ +/* Application related parameters */ + float LFOSCClkFreq; /**< The clock frequency of Wakeup Timer in Hz. Typically it's 32kHz. Leave it here in case we calibrate clock in software method */ + float SysClkFreq; /**< The real frequency of system clock */ + float AdcClkFreq; /**< The real frequency of ADC clock */ + float RcalVal; /**< Rcal value in Ohm */ + float ADCRefVolt; /**< The real ADC voltage in mV. */ + /* Describe Ramp signal */ + float RampStartVolt; /**< The start voltage of ramp signal in mV */ + float RampPeakVolt; /**< The maximum or minimum voltage of ramp in mV */ + float VzeroStart; /**< The start voltage of Vzero in mV. Set it to 2400mV by default */ + float VzeroPeak; /**< The peak voltage of Vzero in mV. Set it to 200mV by default */ + uint32_t StepNumber; /**< Total number of steps. Limited to 4095. */ + /* Receive path configuration */ + float SampleDelay; /**< The time delay between update DAC and start ADC */ + uint32_t LPTIARtiaSel; /**< Select RTIA */ + float ExternalRtiaValue; /**< The optional external RTIA value in Ohm. Disconnect internal RTIA to use external RTIA. When using internal RTIA, this value is ignored. */ + uint32_t AdcPgaGain; /**< PGA Gain select from GNPGA_1, GNPGA_1_5, GNPGA_2, GNPGA_4, GNPGA_9 !!! We must ensure signal is in range of +-1.5V which is limited by ADC input stage */ + uint8_t ADCSinc3Osr; /**< We use data from SINC3 filter. */ + /* Digital related */ + uint32_t FifoThresh; /**< FIFO Threshold value */ +/* Private variables for internal usage */ + BoolFlag SWVInited; /**< If the program run firstly, generated initialization sequence commands */ + fImpPol_Type RtiaValue; /**< Calibrated Rtia value */ + SEQInfo_Type InitSeqInfo; + SEQInfo_Type ADCSeqInfo; + BoolFlag bFirstDACSeq; /**< Init DAC sequence */ + SEQInfo_Type DACSeqInfo; /**< The first DAC update sequence info */ + uint32_t CurrStepPos; /**< Current position */ + float DACCodePerStep; /**< DAC codes in square waveform */ + float DACCodePerRamp; /**< DAC codes needed to ramp increment */ + float CurrRampCode; /**< */ + float Frequency; /**< Frequency of square wave */ + float SqrWvAmplitude; /**< Set amplitude of square wave */ + float SqrWvRampIncrement; /**< Ramp increase in mV */ + uint32_t CurrVzeroCode; + BoolFlag bDACCodeInc; /**< Increase DAC code. */ + BoolFlag bSqrWaveHiLevel; /**< Flag to indicate square wave high level */ + BoolFlag bRampOneDir; /**< Ramp in one direction only */ + BoolFlag StopRequired; /**< After FIFO is ready, stop the measurement sequence */ + enum _RampState{SWV_STATE0 = 0, SWV_STATE1, SWV_STATE2, SWV_STATE3, SWV_STATE4, SWV_STOP} RampState; +}AppSWVCfg_Type; + +#define APPCTRL_START 0 +#define APPCTRL_STOPNOW 1 +#define APPCTRL_STOPSYNC 2 +#define APPCTRL_SHUTDOWN 3 /**< Note: shutdown here means turn off everything and put AFE to hibernate mode. The word 'SHUT DOWN' is only used here. */ + +AD5940Err AppSWVInit(uint32_t *pBuffer, uint32_t BufferSize); +AD5940Err AppSWVGetCfg(void *pCfg); +AD5940Err AppSWVISR(void *pBuff, uint32_t *pCount); +AD5940Err AppSWVCtrl(uint32_t Command, void *pPara); +void AD5940_McuSetLow(void); +void AD5940_McuSetHigh(void); + +#endif diff --git a/examples/AD5940_Temperature/AD5940_Temperature.c b/examples/AD5940_Temperature/AD5940_Temperature.c new file mode 100644 index 0000000..59eef0e --- /dev/null +++ b/examples/AD5940_Temperature/AD5940_Temperature.c @@ -0,0 +1,225 @@ +/*! +***************************************************************************** +@file: AD5940_Temperature.c +@author: Neo Xu +@brief: AD5940 internal temperature sensor example with sequencer support. +----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include +#include "string.h" + +/** + * This example shows how to configure temperature sensor and using sequencer to take + * measurements. There is 'chop' function to remove offset errors from circuit, this + * feature is in register REG_AFE_TEMPSENS and is not included in this example. Enable + * this function will have better accuracy. +*/ + +#define SINC3OSR_SEL ADCSINC3OSR_4 +#define SINC2OSR_SEL ADCSINC2OSR_22 +#define MEASURE_FREQ 4.0f //4Hz(4SPS) +#define FIFO_THRESHOLD 4 //generate FIFO threshold interrupt every 4 data. + +#define BUFF_SIZE 128 +//this buffer will be used by sequence generator and used to store result from AD5940 +uint32_t buff[BUFF_SIZE]; +uint32_t data_count = 0; //the temperature data count in buffer. + +/* Initialize AD5940 basic blocks like clock */ +static int32_t AD5940PlatformCfg(void){ + CLKCfg_Type clk_cfg; + FIFOCfg_Type fifo_cfg; + SEQCfg_Type seq_cfg; + AGPIOCfg_Type gpio_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + /* Platform configuration */ + AD5940_Initialize(); + /* Step1. Configure clock */ + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + /* Step2. Configure FIFO and Sequencer*/ + fifo_cfg.FIFOEn = bFALSE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_SINC2NOTCH; + fifo_cfg.FIFOThresh = FIFO_THRESHOLD; + AD5940_FIFOCfg(&fifo_cfg); /* Disable to reset FIFO. */ + fifo_cfg.FIFOEn = bTRUE; + AD5940_FIFOCfg(&fifo_cfg); /* Enable FIFO here */ + /* Configure sequencer and stop it */ + seq_cfg.SeqMemSize = SEQMEMSIZE_2KB; + seq_cfg.SeqBreakEn = bFALSE; + seq_cfg.SeqIgnoreEn = bFALSE; + seq_cfg.SeqCntCRCClr = bTRUE; + seq_cfg.SeqEnable = bFALSE; + seq_cfg.SeqWrTimer = 0; + AD5940_SEQCfg(&seq_cfg); + + /* Step3. Interrupt controller */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); /* Enable all interrupt in Interrupt Controller 1, so we can check INTC flags */ + AD5940_INTCCfg(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH, bTRUE); /* Interrupt Controller 0 will control GP0 to generate interrupt to MCU */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + /* Step4: Reconfigure GPIO */ + gpio_cfg.FuncSet = GP6_SYNC|GP5_SYNC|GP2_TRIG|GP1_SYNC|GP0_INT; + gpio_cfg.InputEnSet = AGPIO_Pin2; + gpio_cfg.OutputEnSet = AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin5|AGPIO_Pin6; + gpio_cfg.OutVal = 0; + gpio_cfg.PullEnSet = AGPIO_Pin2; + AD5940_AGPIOCfg(&gpio_cfg); + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Enable AFE to enter sleep mode. */ + return 0; +} + +void _ad5940_analog_init(void){ + AFERefCfg_Type aferef_cfg; + ADCBaseCfg_Type adc_base; + ADCFilterCfg_Type adc_filter; + //init ad5940 for temperature measurement. + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); /* Init all to disable state */ + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; /* The High speed buffers are automatically turned off during hibernate */ + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control - turn off them to save power*/ + aferef_cfg.LpBandgapEn = bFALSE; + aferef_cfg.LpRefBufEn = bFALSE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + /* Initialize ADC basic function */ + adc_base.ADCMuxP = ADCMUXP_TEMPP; + adc_base.ADCMuxN = ADCMUXN_TEMPN; + adc_base.ADCPga = ADCPGA_1P5; + AD5940_ADCBaseCfgS(&adc_base); + /* Initialize ADC filters ADCRawData-->SINC3-->SINC2+NOTCH */ + adc_filter.ADCSinc3Osr = SINC3OSR_SEL; + adc_filter.ADCSinc2Osr = SINC2OSR_SEL; + adc_filter.ADCAvgNum = ADCAVGNUM_2; /* Don't care about it. Average function is only used for DFT */ + adc_filter.ADCRate = ADCRATE_800KHZ; /* If ADC clock is 32MHz, then set it to ADCRATE_1P6MHZ. Default is 16MHz, use ADCRATE_800KHZ. */ + adc_filter.BpNotch = bTRUE; /* SINC2+Notch is one block, when bypass notch filter, we can get fresh data from SINC2 filter. */ + adc_filter.BpSinc3 = bFALSE; /* We use SINC3 filter. */ + adc_filter.Sinc2NotchEnable = bTRUE; /* Enable the SINC2+Notch block. You can also use function AD5940_AFECtrlS */ + AD5940_ADCFilterCfgS(&adc_filter); + AD5940_AFECtrlS(AFECTRL_TEMPSPWR, bTRUE); /* Turn on temperature sensor power */ +} + +/** + * @brief Init everything we need to measure temperature. + */ +void AD5940_TemperatureInit(void){ + uint32_t const *pSeqCmd; + uint32_t seq_len; + SEQInfo_Type seq_info; + WUPTCfg_Type wupt_cfg; + ClksCalInfo_Type clks_cal; + uint32_t WaitClks; + clks_cal.DataType = DATATYPE_SINC2; + clks_cal.DataCount = 1; /* Sample one data when wakeup */ + clks_cal.ADCSinc2Osr = SINC2OSR_SEL; + clks_cal.ADCSinc3Osr = SINC3OSR_SEL; + clks_cal.ADCAvgNum = 0; + clks_cal.RatioSys2AdcClk = 1; /* Assume ADC clock is same as system clock */ + AD5940_ClksCalculate(&clks_cal, &WaitClks); + + _ad5940_analog_init(); + //generate sequence to measure temperature sensor output + AD5940_SEQGenInit(buff, BUFF_SIZE); //init sequence generator + AD5940_SEQGenCtrl(bTRUE); //from now on, record all register operations rather than write them to AD5940 through SPI. + + AD5940_SEQGpioCtrlS(AGPIO_Pin1); //pull high AGPIO1 so we know the sequencer is running by observing pin status with oscilloscope etc. + AD5940_SEQGenInsert(SEQ_WAIT(16*200)); /* Time for reference settling(if ad5940 is just wake up from hibernate mode) */ + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); /* Turn ON ADC power */ + AD5940_SEQGenInsert(SEQ_WAIT(16*50)); /* wait another 50us for ADC to settle. */ + AD5940_AFECtrlS(AFECTRL_TEMPCNV|AFECTRL_ADCCNV, bTRUE); /* Start ADC convert */ + AD5940_SEQGenInsert(SEQ_WAIT(WaitClks)); + AD5940_AFECtrlS(AFECTRL_TEMPCNV|AFECTRL_ADCPWR, bFALSE); /* Stop ADC */ + AD5940_SEQGenInsert(SEQ_WAIT(20)); /* Add some delay before put AD5940 to hibernate, needs some clock to move data to FIFO. */ + AD5940_SEQGpioCtrlS(0); /* pull low AGPIO so we know end of sequence.*/ + AD5940_EnterSleepS();/* Goto hibernate */ + AD5940_SEQGenCtrl(bFALSE); /* stop sequence generator */ + if(AD5940_SEQGenFetchSeq(&pSeqCmd, &seq_len) != AD5940ERR_OK){ + puts("Sequence generator error!"); + } + seq_info.pSeqCmd = pSeqCmd; + seq_info.SeqId = SEQID_0; //use SEQ0 to run this sequence + seq_info.SeqLen = seq_len; + seq_info.SeqRamAddr = 0; //place this sequence from start of SRAM. + seq_info.WriteSRAM = bTRUE;// we need to write this sequence to AD5940 SRAM. + AD5940_SEQInfoCfg(&seq_info); + + //now configure wakeup timer to trigger above sequence periodically to measure temperature data. + wupt_cfg.WuptEn = bFALSE; // do not start it right now. + wupt_cfg.WuptEndSeq = WUPTENDSEQ_A; + wupt_cfg.WuptOrder[0] = SEQID_0; + wupt_cfg.SeqxSleepTime[SEQID_0] = 4-1; + wupt_cfg.SeqxWakeupTime[SEQID_0] = (uint32_t)(32e3f/MEASURE_FREQ)-4-1; + AD5940_WUPTCfg(&wupt_cfg); + //enable sequencer + AD5940_SEQCtrlS(bTRUE); //now sequencer is ready to be triggered. +} + +void AD5940_TemperatureISR(void){ + //process data from AD5940 FIFO. + uint32_t FifoCnt, IntcFlag; + if(AD5940_WakeUp(10) > 10){ /* Wakeup AFE by read register, read 10 times at most */ + printf("Failed to wakeup AD5940!\n"); + return; + } + AD5940_SleepKeyCtrlS(SLPKEY_LOCK); /* We need time to read data from FIFO, so, do not let AD5940 goes to hibernate automatically */ + IntcFlag = AD5940_INTCGetFlag(AFEINTC_0); + if(IntcFlag&AFEINTSRC_DATAFIFOTHRESH){ + FifoCnt = AD5940_FIFOGetCnt(); + FifoCnt = FifoCnt>BUFF_SIZE?BUFF_SIZE:FifoCnt; + data_count = FifoCnt; + AD5940_FIFORd(buff, FifoCnt); + AD5940_INTCClrFlag(AFEINTSRC_DATAFIFOTHRESH); + AD5940_SleepKeyCtrlS(SLPKEY_UNLOCK); /* Allow AFE to enter sleep mode. AFE will stay at active mode until sequencer trigger sleep */ + AD5940_EnterSleepS(); //If MCU is too slow, comment this line, otherwise there is chance the sequencer is running at this point. + } +} + +void AD5940_PrintResult(void){ + for(int i=0; i + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + 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$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.ewp b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.ewp new file mode 100644 index 0000000..08d1838 --- /dev/null +++ b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.ewp @@ -0,0 +1,2232 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 37 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + inputOutputBased + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + 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IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + + AD5940Lib + + $PROJ_DIR$\..\..\ad5940lib\ad5940.c + + + $PROJ_DIR$\ADICUP3029Port.c + + + + application + + $PROJ_DIR$\..\AD5940_Temperature.c + + + $PROJ_DIR$\main.c + + + + CMSIS-Pack + CMSISPack.Component + + $PROJ_DIR$\RTE\RTE_Components.h + + + Device Startup + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.rteconfig b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.uvoptx b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.uvoptx new file mode 100644 index 0000000..8a846a3 --- /dev/null +++ b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.uvoptx @@ -0,0 +1,289 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ADICUP3029 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"DAPLink CMSIS-DAP" -U0600000032624e45004a2015b1750046 -O198 -S8 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + JL2CM3 + -U228200467 -O79 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x.FLM -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + + + + + + 0 + 1 + ADCCode + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ADICUP3029Port.c + ADICUP3029Port.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_Temperature.c + AD5940_Temperature.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.uvprojx b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.uvprojx new file mode 100644 index 0000000..bc7cc5d --- /dev/null +++ b/examples/AD5940_Temperature/ADICUP3029/AD5940_Temperature.uvprojx @@ -0,0 +1,498 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ADICUP3029 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ADuCM3029 + Analog Devices + AnalogDevices.ADuCM302x_DFP.3.2.0 + http://download.analog.com/tools/EZBoards/CM302x/Releases/ + IRAM(0x20000000,0x04000) IRAM2(0x20040000,0x04000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0ADuCM302x -FS00 -FL040000 -FP0($$Device:ADuCM3029$Flash\ADuCM302x.FLM)) + 0 + $$Device:ADuCM3029$Include\ADuCM3029.h + + + + + + + + + + $$Device:ADuCM3029$SVD\ADuCM302x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + ADICUP3029 + 1 + 0 + 0 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x4000 + + + 0 + 0x20040000 + 0x4000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + CHIPSEL_594X,ADI_DEBUG + + ..\..\;..\..\AD5940Lib + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + CHIPSEL_594X + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ADICUP3029Port.c + 1 + .\ADICUP3029Port.c + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_Temperature.c + 1 + ..\AD5940_Temperature.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_global_config.h + + + + + + + + RTE\Device\ADuCM3029\adi_i2c_config.h + + + + + + RTE\Device\ADuCM3029\adi_pwr_config.h + + + + + + RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + + + + + + RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + + + + + + + diff --git a/examples/AD5940_Temperature/ADICUP3029/ADICUP3029Port.c b/examples/AD5940_Temperature/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_Temperature/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_Temperature/ADICUP3029/main.c b/examples/AD5940_Temperature/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_Temperature/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_Temperature/NUCLEO-F411/AD5940_Temperature.uvoptx b/examples/AD5940_Temperature/NUCLEO-F411/AD5940_Temperature.uvoptx new file mode 100644 index 0000000..a8a0380 --- /dev/null +++ b/examples/AD5940_Temperature/NUCLEO-F411/AD5940_Temperature.uvoptx @@ -0,0 +1,321 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + AD5940Prj + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + AD5940Lib + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\AD5940Lib\ad5940.c + ad5940.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + .\NUCLEOF411Port.c + NUCLEOF411Port.c + 0 + 0 + + + + + Application + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + .\main.c + main.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\AD5940_Temperature.c + AD5940_Temperature.c + 0 + 0 + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Device + 1 + 0 + 0 + 1 + + + diff --git a/examples/AD5940_Temperature/NUCLEO-F411/AD5940_Temperature.uvprojx b/examples/AD5940_Temperature/NUCLEO-F411/AD5940_Temperature.uvprojx new file mode 100644 index 0000000..94c71a6 --- /dev/null +++ b/examples/AD5940_Temperature/NUCLEO-F411/AD5940_Temperature.uvprojx @@ -0,0 +1,584 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + AD5940Prj + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F411RETx + STMicroelectronics + Keil.STM32F4xx_DFP.2.13.0 + http://www.keil.com/pack + IRAM(0x20000000,0x20000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + 0 + $$Device:STM32F411RETx$Drivers\CMSIS\Device\ST\STM32F4xx\Include\stm32f4xx.h + + + + + + + + + + $$Device:STM32F411RETx$CMSIS\SVD\STM32F411xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\OUT\ + NUCLEOF411 + 1 + 0 + 1 + 1 + 1 + .\OUT\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 1 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + USE_STDPERIPH_DRIVER,STM32F411xE,CHIPSEL_594X,ADI_DEBUG + + ..\..\AD5940Lib;..\..\STM32F4StdLib\CMSIS\Device\ST\STM32F4xx\Include;..\..\STM32F4StdLib\STM32F4xx_StdPeriph_Driver\inc;..\..\STM32F4StdLib\CMSIS\Include;..\;.\ + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + AD5940Lib + + + ad5940.c + 1 + ..\..\AD5940Lib\ad5940.c + + + NUCLEOF411Port.c + 1 + .\NUCLEOF411Port.c + + + + + Application + + + main.c + 1 + .\main.c + + + AD5940_Temperature.c + 1 + ..\AD5940_Temperature.c + + + + + ::CMSIS + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Device\STM32F103C8\RTE_Device.h + + + + + + RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + diff --git a/examples/AD5940_Temperature/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_Temperature/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_Temperature/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_Temperature/NUCLEO-F411/main.c b/examples/AD5940_Temperature/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_Temperature/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/examples/AD5940_WG/AD5940_WGArbitrary.c b/examples/AD5940_WG/AD5940_WGArbitrary.c new file mode 100644 index 0000000..e7a61cd --- /dev/null +++ b/examples/AD5940_WG/AD5940_WGArbitrary.c @@ -0,0 +1,204 @@ +/*! + ***************************************************************************** + @file: AD5940_WGArbitrary.c + @author: $Author: nxu2 $ + @brief: Arbitrary Waveform Genertor using sequencer. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + + +#include "ad5940.h" +#include "stdio.h" +#include "string.h" + +#define SIN_FREQ 200000.0f /* 20kHz */ +#define SIN_AMPLITUDE 4095 /* unit is DAC peak to peak code. Maximum is 4095 */ +#define SAMPLE_RATE 2000000.0f /* 200kHz */ +#define SAMPLE_POINTS 200 /* 100 Points */ +#define SYSCLK_FREQ 16000000.0f /* System clock frequency is 16MHz for this example. */ + +#define APPBUFF_SIZE 1024 +static uint32_t AppBuff[APPBUFF_SIZE]; /* We use 2kB SRAM for sequencer in this example, maximum sequence length is 512 */ + +/** + * Write the method to generate Arbitrary Waveform. You can use expression or looup table. + * In this example, we use sin wave expression. +**/ +static uint32_t GetNextDacPoint(float Freq, float SampleRate, uint32_t Index) +{ + static uint32_t index; + float fRes; + int32_t iRes; + uint32_t Amplitude = SIN_AMPLITUDE; + if(Amplitude > 4095) Amplitude = 4095; + fRes = Amplitude/2.0f*sin(2*MATH_PI*Freq*Index/SampleRate); + iRes = (int32_t)(fRes) + 0x800; + printf("index:%d, fRes:%f, iRes:%d\n", index++, fRes, iRes); + if(iRes < 0) iRes = 0; + if(iRes > 0xfff) iRes = 0xfff; + return iRes; +} + +static AD5940Err BuildSequence(void) +{ + AD5940Err error = AD5940ERR_OK; + SEQCfg_Type seqcfg; + SEQInfo_Type seqinfo; + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type HpLoopCfg; + AD5940_SEQGenInit(AppBuff, APPBUFF_SIZE); + AD5940_SEQGenCtrl(bTRUE); /* Start sequencer generator here */ + + /* sequence starts here */ + AD5940_SEQGpioCtrlS(AGPIO_Pin1); /* Pull high GPIO to indicate sequencer is running */ + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); + /* Step1. Init reference system */ + AD5940_StructInit(&aferef_cfg, sizeof(aferef_cfg)); /* Disable everything and only enable below functions */ + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + /* LP reference control */ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + AD5940_REFCfgS(&aferef_cfg); + + /* Step2: Configure HSLoop: HSDAC, HSTIA, SWMatrix and WG(MMR type) */ + AD5940_StructInit(&HpLoopCfg, sizeof(HpLoopCfg)); + HpLoopCfg.HsDacCfg.ExcitBufGain = EXCITBUFGAIN_2; + HpLoopCfg.HsDacCfg.HsDacGain = HSDACGAIN_1; + HpLoopCfg.HsDacCfg.HsDacUpdateRate = 7; + + HpLoopCfg.HsTiaCfg.DiodeClose = bFALSE; + HpLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + HpLoopCfg.HsTiaCfg.HstiaCtia = 16; /* 16pF */ + HpLoopCfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + HpLoopCfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_TODE; /* Connect HSTIA output to DE0 pin */ + HpLoopCfg.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_200; + + HpLoopCfg.SWMatCfg.Dswitch = SWD_CE0; + HpLoopCfg.SWMatCfg.Pswitch = SWP_CE0; + HpLoopCfg.SWMatCfg.Nswitch = SWN_SE0LOAD; + HpLoopCfg.SWMatCfg.Tswitch = SWT_TRTIA|SWT_SE0LOAD; + + HpLoopCfg.WgCfg.WgType = WGTYPE_MMR; /* We use sequencer to update DAC data point by point. */ + HpLoopCfg.WgCfg.GainCalEn = bFALSE; + HpLoopCfg.WgCfg.OffsetCalEn = bFALSE; + HpLoopCfg.WgCfg.WgCode = 0x800; /* Init to mid-scale */ + AD5940_HSLoopCfgS(&HpLoopCfg); + + AD5940_AFECtrlS(AFECTRL_DACREFPWR, bTRUE); + AD5940_AFECtrlS(AFECTRL_EXTBUFPWR|AFECTRL_INAMPPWR|AFECTRL_HSTIAPWR|AFECTRL_HSDACPWR, bTRUE); + AD5940_AFECtrlS(AFECTRL_WG, bTRUE); + + AD5940_StructInit(&seqcfg, sizeof(seqcfg)); /* Disable everything */ + seqcfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + seqcfg.SeqEnable = bTRUE; /* Keep sequencer enabled */ + seqcfg.SeqWrTimer = ((uint32_t)(SYSCLK_FREQ/SAMPLE_RATE + 0.5f)-1); /* Run next command after write timer and timer is set to update rate */ + if(seqcfg.SeqWrTimer > 255) + return AD5940ERR_PARA; + AD5940_SEQCfg(&seqcfg); + for(uint32_t i=0; i 512) + return AD5940ERR_SEQLEN; + seqinfo.SeqId = SEQID_0; + seqinfo.SeqRamAddr = 0; + seqinfo.WriteSRAM = bTRUE; + AD5940_SEQInfoCfg(&seqinfo); + + return AD5940ERR_OK; +} + +/* Initialize AD5940 basic blocks like clock */ +static int32_t AD5940PlatformCfg(void) +{ + CLKCfg_Type clk_cfg; + FIFOCfg_Type fifo_cfg; + AGPIOCfg_Type gpio_cfg; + + /* Use hardware reset */ + AD5940_HWReset(); + /* Platform configuration */ + AD5940_Initialize(); + /* Step1. Configure clock */ + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + /* Step2. Configure FIFO and Sequencer*/ + fifo_cfg.FIFOEn = bFALSE; + fifo_cfg.FIFOMode = FIFOMODE_FIFO; + fifo_cfg.FIFOSize = FIFOSIZE_4KB; /* 4kB for FIFO, The reset 2kB for sequencer */ + fifo_cfg.FIFOSrc = FIFOSRC_DFT; + fifo_cfg.FIFOThresh = 4;//AppBIACfg.FifoThresh; /* DFT result. One pair for RCAL, another for Rz. One DFT result have real part and imaginary part */ + AD5940_FIFOCfg(&fifo_cfg); /* Disable to reset FIFO. */ + fifo_cfg.FIFOEn = bTRUE; + AD5940_FIFOCfg(&fifo_cfg); /* Enable FIFO here */ + + /* Step3. Interrupt controller */ + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_ALLINT, bTRUE); /* Enable all interrupt in Interrupt Controller 1, so we can check INTC flags */ + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + /* Step4: Reconfigure GPIO */ + gpio_cfg.FuncSet = GP2_TRIG|GP1_SYNC|GP0_INT; + gpio_cfg.InputEnSet = AGPIO_Pin2; + gpio_cfg.OutputEnSet = AGPIO_Pin0|AGPIO_Pin1|AGPIO_Pin4|AGPIO_Pin5|AGPIO_Pin6; + gpio_cfg.OutVal = 0; + gpio_cfg.PullEnSet = 0; + AD5940_AGPIOCfg(&gpio_cfg); + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + return 0; +} + +void AD5940_Main(void) +{ + AD5940Err error; + SEQCfg_Type seqcfg; + AD5940PlatformCfg(); + AD5940_StructInit(&seqcfg, sizeof(seqcfg)); + seqcfg.SeqEnable = bTRUE; + seqcfg.SeqMemSize = SEQMEMSIZE_2KB; /* 2kB SRAM is used for sequencer, others for data FIFO */ + AD5940_SEQCfg(&seqcfg); /* Enable Sequencer here. */ + error = BuildSequence(); /* Generate sequencer commands and load it to SRAM */ + if(error != AD5940ERR_OK) + { + printf("Build Sequence error, errorno:%d. \n", error); + while(1); + } + AD5940_SEQMmrTrig(SEQID_0); /* Trigger sequence0 */ + while(1) + { + while(AD5940_INTCTestFlag(AFEINTC_1, AFEINTSRC_ENDSEQ) == bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_ENDSEQ); + AD5940_SEQCtrlS(bTRUE); + AD5940_SEQMmrTrig(SEQID_0); + } +} + diff --git a/examples/AD5940_WG/AD5940_WGSin.c b/examples/AD5940_WG/AD5940_WGSin.c new file mode 100644 index 0000000..ff957c7 --- /dev/null +++ b/examples/AD5940_WG/AD5940_WGSin.c @@ -0,0 +1,93 @@ +/*! + ***************************************************************************** + @file: AD5940_WGSin.c + @author: Neo Xu + @brief: Waveform generator(sin wave) example include switch matrix. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + + +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" + + +#define SIN_FREQ 25000 /* 25kHz */ + +#define SYS_CLOCK_HZ 16000000.0 /* System clock frequency */ + + +void AD5940_Main(void) +{ + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type HpLoopCfg; + CLKCfg_Type clk_cfg; + /* Use hardware reset */ + AD5940_HWReset(); + AD5940_Initialize(); + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control */ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + HpLoopCfg.HsDacCfg.ExcitBufGain = EXCITBUFGAIN_2; + HpLoopCfg.HsDacCfg.HsDacGain = HSDACGAIN_1; + HpLoopCfg.HsDacCfg.HsDacUpdateRate = 7; + + HpLoopCfg.HsTiaCfg.DiodeClose = bFALSE; + HpLoopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + HpLoopCfg.HsTiaCfg.HstiaCtia = 16; /* 16pF */ + HpLoopCfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + HpLoopCfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_TODE; + HpLoopCfg.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_160K; + + HpLoopCfg.SWMatCfg.Dswitch = SWD_CE0; + HpLoopCfg.SWMatCfg.Pswitch = SWP_CE0; + HpLoopCfg.SWMatCfg.Nswitch = SWN_SE0LOAD; + HpLoopCfg.SWMatCfg.Tswitch = SWT_TRTIA|SWT_SE0LOAD; + + HpLoopCfg.WgCfg.WgType = WGTYPE_SIN; + HpLoopCfg.WgCfg.GainCalEn = bFALSE; + HpLoopCfg.WgCfg.OffsetCalEn = bFALSE; + HpLoopCfg.WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(SIN_FREQ,SYS_CLOCK_HZ); + HpLoopCfg.WgCfg.SinCfg.SinAmplitudeWord = 2047; + HpLoopCfg.WgCfg.SinCfg.SinOffsetWord = 0; + HpLoopCfg.WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_HSLoopCfgS(&HpLoopCfg); + + AD5940_AFECtrlS(AFECTRL_DACREFPWR, bTRUE); + AD5940_AFECtrlS(AFECTRL_EXTBUFPWR|AFECTRL_INAMPPWR|AFECTRL_HSTIAPWR|AFECTRL_HSDACPWR, bTRUE); + AD5940_AFECtrlS(AFECTRL_WG, bTRUE); + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + while(1); +} + diff --git a/examples/AD5940_WG/AD5940_WGSin_LPDAC.c b/examples/AD5940_WG/AD5940_WGSin_LPDAC.c new file mode 100644 index 0000000..2510b91 --- /dev/null +++ b/examples/AD5940_WG/AD5940_WGSin_LPDAC.c @@ -0,0 +1,120 @@ +/*! + ***************************************************************************** + @file: AD5940_WGSin_LPDAC.c + @author: $Author: nxu2 $ + @brief: Waveform generator(sin wave) example using LPDAC. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ +#include "ad5940.h" +#include +#include "string.h" +/** + * This example is to generate sin wave on pin CE0 using waveform generator and LPDAC. + * Signal generator simpley generates digital codes. The code can route to both + * HSDAC and LPDAC. So, we can generate sin wave using both DAC. + * + * @note: LPDAC has limited bandwidth, do not use it to generate signal above 300Hz, + * otherwise, you will see significant performance drop. + * The DAC update rate parameter is decided by register HSDACCON.Rate. This also true + * when using LPDAC as data sink. +*/ +#define SIN_AMPLITUDE 1100.0 /**< Signal amplitude in mV.*/ +#define SIN_FREQ 100.0 /**< 100Hz. Max is 300Hz */ +#define WG_CLOCK_HZ 32e3f /**< Waveform generator clock frequency. Equal to system clock. */ + +void AD5940_Main(void) +{ + AFERefCfg_Type aferef_cfg; + CLKCfg_Type clk_cfg; + LPDACCfg_Type lpdac_cfg; + WGCfg_Type WgCfg; + LPAmpCfg_Type lpamp_cfg; + HSDACCfg_Type HsDacCfg; + + /* Use hardware reset */ + AD5940_HWReset(); + AD5940_Initialize(); + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + + /* LP reference control */ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + /* Configure LPDAC*/ + lpdac_cfg.LpdacSel = LPDAC0; + lpdac_cfg.DataRst = bFALSE; + lpdac_cfg.LpDacSW = LPDACSW_VBIAS2LPPA/*|LPDACSW_VBIAS2PIN*/|LPDACSW_VZERO2LPTIA/*|LPDACSW_VZERO2PIN*/; + lpdac_cfg.LpDacRef = LPDACREF_2P5; /* Use internal 2.5V reference */ + lpdac_cfg.LpDacSrc = LPDACSRC_WG; /* Use data from waveform generator */ + lpdac_cfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lpdac_cfg.LpDacVzeroMux = LPDACVZERO_6BIT; /* Use 6bit LPDAC for Vzero */ + lpdac_cfg.PowerEn = bTRUE; /* Enable LPDAC */ + lpdac_cfg.DacData12Bit = 0; /* Don't care, 12bit DAC data is from WG */ + lpdac_cfg.DacData6Bit = 32; + AD5940_LPDACCfgS(&lpdac_cfg); + + /* Configure low power amplifiers */ + lpamp_cfg.LpAmpSel = LPAMP0; + lpamp_cfg.LpAmpPwrMod = LPAMPPWR_NORM; /* Use normal power mode is enough */ + lpamp_cfg.LpPaPwrEn = bTRUE; /* Enable Potential amplifier */ + lpamp_cfg.LpTiaPwrEn = bFALSE; /* TIA is not used in this example */ + lpamp_cfg.LpTiaRf = LPTIARF_1M; + lpamp_cfg.LpTiaRload = LPTIARLOAD_100R; /* don't care */ + lpamp_cfg.LpTiaRtia = LPTIARTIA_1K; /* don't care */ + lpamp_cfg.LpTiaSW = 0; /* don't care */ + AD5940_LPAMPCfgS(&lpamp_cfg); + + HsDacCfg.ExcitBufGain = EXCITBUFGAIN_2; + HsDacCfg.HsDacGain = HSDACGAIN_1; + HsDacCfg.HsDacUpdateRate = 7; /* DAC update rate equals to WG_CLK/HsDacUpdateRate */ + AD5940_HSDacCfgS(&HsDacCfg); + /* Configure Waveform Generator */ + WgCfg.WgType = WGTYPE_SIN; + WgCfg.GainCalEn = bFALSE; + WgCfg.OffsetCalEn = bFALSE; + WgCfg.SinCfg.SinFreqWord = AD5940_WGFreqWordCal(SIN_FREQ, WG_CLOCK_HZ); + WgCfg.SinCfg.SinAmplitudeWord = (uint32_t)(SIN_AMPLITUDE/1100.0f*2047); + WgCfg.SinCfg.SinOffsetWord = 0; + WgCfg.SinCfg.SinPhaseWord = 0; + AD5940_WGCfgS(&WgCfg); + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_AUTOSET); + AD5940_AFECtrlS(AFECTRL_WG, bTRUE); + + /* Change to 32kHz clock. LPDAC needs 32kHz clock for waveform generator */ + AD5940_LPModeEnS(bTRUE); /* Enter LP control mode. The registers are summarized to LPMODECON, so we can control some blocks conveniently */ + AD5940_LPModeClkS(LPMODECLK_LFOSC); /* Trigger switching system clock to 32kHz */ + AD5940_LPModeCtrlS(LPMODECTRL_NONE); /* Disable all */ + AD5940_LPModeCtrlS(LPMODECTRL_GLBBIASZ|LPMODECTRL_GLBBIASP|LPMODECTRL_HPREFPWR|LPMODECTRL_BUFHP1P8V|LPMODECTRL_BUFHP1P1V|LPMODECTRL_HFOSCEN); + while(1); +} + diff --git a/examples/AD5940_WG/AD5940_WGTrapezoid.c b/examples/AD5940_WG/AD5940_WGTrapezoid.c new file mode 100644 index 0000000..c0dae4a --- /dev/null +++ b/examples/AD5940_WG/AD5940_WGTrapezoid.c @@ -0,0 +1,98 @@ +/*! + ***************************************************************************** + @file: AD5940_WGTrapezoid.c + @author: $Author: nxu2 $ + @brief: Waveform generator example include switch matrix. + @version: $Revision: 766 $ + @date: $Date: 2017-08-21 14:09:35 +0100 (Mon, 21 Aug 2017) $ + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + + +#include "ad5940.h" +#include "AD5940.h" +#include +#include "string.h" + + +#define SIN_FREQ 200000.0 /* 25kHz */ + +#define SYS_CLOCK_HZ 16000000.0 /* System clock frequency */ + + +void AD5940_Main(void) +{ + AFERefCfg_Type aferef_cfg; + HSLoopCfg_Type HsloopCfg; + CLKCfg_Type clk_cfg; + /* Use hardware reset */ + AD5940_HWReset(); + + AD5940_Initialize(); + clk_cfg.ADCClkDiv = ADCCLKDIV_1; + clk_cfg.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk_cfg.SysClkDiv = SYSCLKDIV_1; + clk_cfg.SysClkSrc = SYSCLKSRC_HFOSC; + clk_cfg.HfOSC32MHzMode = bFALSE; + clk_cfg.HFOSCEn = bTRUE; + clk_cfg.HFXTALEn = bFALSE; + clk_cfg.LFOSCEn = bTRUE; + AD5940_CLKCfg(&clk_cfg); + + aferef_cfg.HpBandgapEn = bTRUE; + aferef_cfg.Hp1V1BuffEn = bTRUE; + aferef_cfg.Hp1V8BuffEn = bTRUE; + aferef_cfg.Disc1V1Cap = bFALSE; + aferef_cfg.Disc1V8Cap = bFALSE; + aferef_cfg.Hp1V8ThemBuff = bFALSE; + aferef_cfg.Hp1V8Ilimit = bFALSE; + aferef_cfg.Lp1V1BuffEn = bFALSE; + aferef_cfg.Lp1V8BuffEn = bFALSE; + /* LP reference control */ + aferef_cfg.LpBandgapEn = bTRUE; + aferef_cfg.LpRefBufEn = bTRUE; + aferef_cfg.LpRefBoostEn = bFALSE; + AD5940_REFCfgS(&aferef_cfg); + + HsloopCfg.HsDacCfg.ExcitBufGain = EXCITBUFGAIN_2; + HsloopCfg.HsDacCfg.HsDacGain = HSDACGAIN_1; + HsloopCfg.HsDacCfg.HsDacUpdateRate = 7; + + HsloopCfg.HsTiaCfg.DiodeClose = bFALSE; + HsloopCfg.HsTiaCfg.HstiaBias = HSTIABIAS_1P1; + HsloopCfg.HsTiaCfg.HstiaCtia = 16; /* 16pF */ + HsloopCfg.HsTiaCfg.HstiaDeRload = HSTIADERLOAD_OPEN; + HsloopCfg.HsTiaCfg.HstiaDeRtia = HSTIADERTIA_TODE; + HsloopCfg.HsTiaCfg.HstiaRtiaSel = HSTIARTIA_160K; + + HsloopCfg.SWMatCfg.Dswitch = SWD_CE0; + HsloopCfg.SWMatCfg.Pswitch = SWP_CE0; + HsloopCfg.SWMatCfg.Nswitch = SWN_SE0LOAD; + HsloopCfg.SWMatCfg.Tswitch = SWT_TRTIA|SWT_SE0LOAD; + + HsloopCfg.WgCfg.WgType = WGTYPE_TRAPZ; + HsloopCfg.WgCfg.GainCalEn = bFALSE; + HsloopCfg.WgCfg.OffsetCalEn = bFALSE; + HsloopCfg.WgCfg.TrapzCfg.WGTrapzDCLevel1 = 0x200; + HsloopCfg.WgCfg.TrapzCfg.WGTrapzDCLevel2 = 0xa00; + HsloopCfg.WgCfg.TrapzCfg.WGTrapzDelay1 = 50; + HsloopCfg.WgCfg.TrapzCfg.WGTrapzDelay2 = 100; + HsloopCfg.WgCfg.TrapzCfg.WGTrapzSlope1 = 200; + HsloopCfg.WgCfg.TrapzCfg.WGTrapzSlope2 = 300; + AD5940_HSLoopCfgS(&HsloopCfg); + + AD5940_AFECtrlS(AFECTRL_DACREFPWR, bTRUE); + AD5940_AFECtrlS(AFECTRL_EXTBUFPWR|AFECTRL_INAMPPWR|AFECTRL_HSTIAPWR|AFECTRL_HSDACPWR, bTRUE); + AD5940_AFECtrlS(AFECTRL_WG, bTRUE); + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + while(1); +} + diff --git a/examples/AD5940_WG/ADICUP3029/AD5940_WG.ewd b/examples/AD5940_WG/ADICUP3029/AD5940_WG.ewd new file mode 100644 index 0000000..f874c8c --- /dev/null +++ b/examples/AD5940_WG/ADICUP3029/AD5940_WG.ewd @@ -0,0 +1,3104 @@ + + + 3 + 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$PROJ_DIR$\RTE\Device\ADuCM3029\startup_ADuCM3029.s + + + $PROJ_DIR$\RTE\Device\ADuCM3029\system_ADuCM3029.c + + + + Device Global Configuration + CMSISPack.Component + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_cycle_counting_config.h + + + $PROJ_DIR$\RTE\Device\ADuCM3029\adi_global_config.h + + + + + <?xml version="1.0" encoding="UTF-8" standalone="no"?> +<configuration xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"> + <packages/> + <device Dclock="26000000" Dcore="Cortex-M3" DcoreVersion="r2p1" Dendian="Little-endian" Dfamily="ADuCM302x Series" Dfpu="NO_FPU" Dmpu="NO_MPU" Dname="ADuCM3029" Dvendor="Analog Devices:1" Pname=""> + <url>http://www.keil.com/dd2/analogdevices/aducm3029</url> + <package info="Analog Devices ADuCM302x Device Support. (Subject to the Software License Agreement referred to in the Release Notes.)" name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + </device> + <toolchain Tcompiler="IAR" Toutput="exe"/> + <components> + <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.1.2"> + <package name="CMSIS" url="http://www.keil.com/pack/" vendor="ARM" version="5.4.0"/> + <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/> + <file category="include" name="CMSIS/Core/Include/"/> + </component> + <component Cclass="Device" Cgroup="Global Configuration" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_cycle_counting_config.h" version="3.2.0"/> + <file attr="config" category="header" deviceDependent="1" name="Include/config/adi_global_config.h" version="3.2.0"/> + </component> + <component Cclass="Device" Cgroup="Startup" Cvendor="AnalogDevices" Cversion="3.2.0" deviceDependent="1"> + <package name="ADuCM302x_DFP" url="http://download.analog.com/tools/EZBoards/CM302x/Releases/" vendor="AnalogDevices" version="3.2.0"/> + <file category="include" deviceDependent="1" name="Include/"/> + <file attr="config" category="source" condition="ADuCM3029_IAR" deviceDependent="1" name="Source/IAR/startup_ADuCM3029.s" version="3.2.0"/> + <file attr="config" category="source" condition="ADuCM3029" deviceDependent="1" name="Source/system_ADuCM3029.c" version="3.2.0"/> + </component> + </components> + <apis/> +</configuration> + + + diff --git a/examples/AD5940_WG/ADICUP3029/AD5940_WG.rteconfig b/examples/AD5940_WG/ADICUP3029/AD5940_WG.rteconfig new file mode 100644 index 0000000..9decf27 --- /dev/null +++ b/examples/AD5940_WG/ADICUP3029/AD5940_WG.rteconfig @@ -0,0 +1,28 @@ + + + + + http://www.keil.com/dd2/analogdevices/aducm3029 + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/AD5940_WG/ADICUP3029/AD5940_WG.uvoptx b/examples/AD5940_WG/ADICUP3029/AD5940_WG.uvoptx new file mode 100644 index 0000000..bc6ec51 --- /dev/null +++ b/examples/AD5940_WG/ADICUP3029/AD5940_WG.uvoptx @@ -0,0 +1,852 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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b/examples/AD5940_WG/ADICUP3029/ADICUP3029Port.c new file mode 100644 index 0000000..00fe0ac --- /dev/null +++ b/examples/AD5940_WG/ADICUP3029/ADICUP3029Port.c @@ -0,0 +1,150 @@ +/*! + ***************************************************************************** + @file: ADICUP3029Port.c + @author: Neo Xu + @brief: The port for ADI's ADICUP3029 board. + ----------------------------------------------------------------------------- + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*****************************************************************************/ + +#include +#include "ADuCM3029.h" + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to ADICUP3029 board. */ +#define SYSTICK_CLKFREQ 26000000L /* Systick clock frequency in Hz. This only appies to ADICUP3029 board */ +volatile static uint32_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficient way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + uint32_t tx_count=0, rx_count=0; + pADI_SPI0->CNT = length; + while(1){ + uint32_t fifo_sta = pADI_SPI0->FIFO_STAT; + if(rx_count < length){ + if(fifo_sta&0xf00){//there is data in RX FIFO. + *pRecvBuff++ = pADI_SPI0->RX; + rx_count ++; + } + } + if(tx_count < length){ + if((fifo_sta&0xf) < 8){// there is space in TX FIFO. + pADI_SPI0->TX = *pSendBuffer++; + tx_count ++; + } + } + if(rx_count == length && tx_count==length) + break; //done + } + while((pADI_SPI0->STAT&BITM_SPI_STAT_XFRDONE) == 0);//wait for transfer done. +} + +void AD5940_CsClr(void) +{ + pADI_GPIO1->CLR = (1<<10); +} + +void AD5940_CsSet(void) +{ + pADI_GPIO1->SET = (1<<10); +} + +void AD5940_RstSet(void) +{ + pADI_GPIO2->SET = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_RstClr(void) +{ + pADI_GPIO2->CLR = 1<<6; //p2.6-ADC3-A3 +} + +void AD5940_Delay10us(uint32_t time) +{ + if(time==0)return; + if(time*10LOAD = time*10*(SYSTICK_CLKFREQ/1000000); + SysTick->CTRL = (1 << 2) | (1<<0); /* Enable SysTick Timer, using core clock */ + while(!((SysTick->CTRL)&(1<<16))); /* Wait until count to zero */ + SysTick->CTRL = 0; /* Disable SysTick Timer */ + } + else { + AD5940_Delay10us(time/2); + AD5940_Delay10us(time/2 + (time&1)); + } +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 0; + return 1; +} + +/* Functions that used to initialize MCU platform */ + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + pADI_GPIO0->PE = 0xFFFF; + pADI_GPIO1->PE = 0xFFFF; + pADI_GPIO2->PE = 0xFFFF; + pADI_GPIO2->OEN |= (1<<6); //P2.6-ADC3-A3-AD5940_Reset + pADI_GPIO2->SET = 1<<6; //Pull high this pin. + + /*Setup Pins P0.0-->SCLK P0.1-->MOSI P0.2-->MISO P1.10-->CS*/ + pADI_GPIO0->CFG = (1<<0)|(1<<2)|(1<<4)|(pADI_GPIO0->CFG&(~((3<<0)|(3<<2)|(3<<4)))); + pADI_GPIO1->CFG &=~(3<<14); /* Configure P1.10 to GPIO function */ + pADI_GPIO1->OEN |= (1<<10); /* P1.10 Output Enable */ + /*Set SPI Baudrate = PCLK/2x(iCLKDiv+1).*/ + pADI_SPI0->DIV = 0;/*Baudrae is 13MHz*/ + pADI_SPI0->CTL = BITM_SPI_CTL_CSRST| // Configure SPI to reset after a bit shift error is detected + BITM_SPI_CTL_MASEN| // Enable master mode + /*BITM_SPI_CTL_CON|*/ // Enable continous transfer mode + BITM_SPI_CTL_OEN| // Select MISO pin to operate as normal - + BITM_SPI_CTL_RXOF| // overwrite data in Rx FIFO during overflow states + /*BITM_SPI_CTL_ZEN|*/ // transmit 00 when no valid data in Tx FIFO + BITM_SPI_CTL_TIM| // initiate trasnfer with a write to SPITX + BITM_SPI_CTL_SPIEN; // Enable SPI. SCLK idles low/ data clocked on SCLK falling edge + pADI_SPI0->CNT = 1;// Setup to transfer 1 bytes to slave + /* Step2: initialize GPIO interrupt that connects to AD5940's interrupt output pin(Gp0, Gp3, Gp4, Gp6 or Gp7 ) */ + pADI_GPIO0->IEN |= 1<<15;// Configure P0.15 as an input + + pADI_XINT0->CFG0 = (0x1<<0)|(1<<3);//External IRQ0 enabled. Falling edge + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + NVIC_EnableIRQ(XINT_EVT0_IRQn); //Enable External Interrupt 0 source. + + AD5940_CsSet(); + AD5940_RstSet(); + return 0; +} + +/* MCU related external line interrupt service routine */ +void Ext_Int0_Handler() +{ + pADI_XINT0->CLR = BITM_XINT_CLR_IRQ0; + ucInterrupted = 1; + /* This example just set the flag and deal with interrupt in AD5940Main function. It's your choice to choose how to process interrupt. */ +} + diff --git a/examples/AD5940_WG/ADICUP3029/main.c b/examples/AD5940_WG/ADICUP3029/main.c new file mode 100644 index 0000000..049abeb --- /dev/null +++ b/examples/AD5940_WG/ADICUP3029/main.c @@ -0,0 +1,143 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ + +#include "stdio.h" +#include "ADuCM3029.h" +#include "AD5940.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +/* Below functions are used to initialize MCU Platform */ +uint32_t MCUPlatformInit(void *pCfg) +{ + int UrtCfg(int iBaud); + + /*Stop watch dog timer(ADuCM3029)*/ + pADI_WDT0->CTL = 0xC9; + /* Clock Configure */ + pADI_CLKG0_OSC->KEY = 0xCB14; // Select HFOSC as system clock. + pADI_CLKG0_OSC->CTL = // Int 32khz LFOSC selected in LFMUX + BITM_CLKG_OSC_CTL_HFOSCEN|BITM_CLKG_OSC_CTL_HFXTALEN; + + while((pADI_CLKG0_OSC->CTL&BITM_CLKG_OSC_CTL_HFXTALOK) == 0); + + pADI_CLKG0_OSC->KEY = 0xCB14; + pADI_CLKG0_CLK->CTL0 = 0x201; /* Select XTAL as system clock */ + pADI_CLKG0_CLK->CTL1 = 0; // ACLK,PCLK,HCLK divided by 1 + pADI_CLKG0_CLK->CTL5 = 0x00; // Enable clock to all peripherals - no clock gating + + UrtCfg(230400);/*Baud rate: 230400*/ + return 1; +} + +/** + @brief int UrtCfg(int iBaud, int iBits, int iFormat) + ==========Configure the UART. + @param iBaud :{B1200,B2200,B2400,B4800,B9600,B19200,B38400,B57600,B115200,B230400,B430800} \n + Set iBaud to the baudrate required: + Values usually: 1200, 2200 (for HART), 2400, 4800, 9600, + 19200, 38400, 57600, 115200, 230400, 430800, or type in baud-rate directly + @note + - Powers up UART if not powered up. + - Standard baudrates are accurate to better than 0.1% plus clock error.\n + - Non standard baudrates are accurate to better than 1% plus clock error. + @warning - If an external clock is used for the system the ullRtClk must be modified with \n + the speed of the clock used. +**/ + +int UrtCfg(int iBaud) +{ + int iBits = 3;//8bits, + int iFormat = 0;//, int iBits, int iFormat + int i1; + int iDiv; + int iRtC; + int iOSR; + int iPllMulValue; + unsigned long long ullRtClk = 16000000; // The root clock speed + + + /*Setup P0[11:10] as UART pins*/ + pADI_GPIO0->CFG = (1<<22)|(1<<20)|(pADI_GPIO0->CFG&(~((3<<22)|(3<<20)))); + + iDiv = (pADI_CLKG0_CLK->CTL1& BITM_CLKG_CLK_CTL1_PCLKDIVCNT); // Read UART clock as set by CLKCON1[10:8] + iDiv = iDiv>>8; + if (iDiv == 0) + iDiv = 1; + iRtC = (pADI_CLKG0_CLK->CTL0& BITM_CLKG_CLK_CTL0_CLKMUX); // Check what is the root clock + + switch (iRtC) + { + case 0: // HFOSC selected + ullRtClk = 26000000; + break; + + case 1: // HFXTAL selected + if ((pADI_CLKG0_CLK->CTL0 & 0x200)==0x200) // 26Mhz XTAL used + ullRtClk = 26000000; + else + ullRtClk = 16000000; // Assume 16MHz XTAL + break; + + case 2: // SPLL output + iPllMulValue = (pADI_CLKG0_CLK->CTL3 & // Check muliplication factor in PLL settings + BITM_CLKG_CLK_CTL3_SPLLNSEL); // bits[4:0]. Assume div value of 0xD in bits [14:11] + ullRtClk = (iPllMulValue *1000000); // Assume straight multiplication by pADI_CLKG0_CLK->CTL3[4:0] + break; + + case 3: + ullRtClk = 26000000; //External clock is assumed to be 26MhZ, if different + break; //clock speed is used, this should be changed + + default: + break; + } + // iOSR = (pADI_UART0->COMLCR2 & 0x3); + // iOSR = 2^(2+iOSR); + pADI_UART0->COMLCR2 = 0x3; + iOSR = 32; + //i1 = (ullRtClk/(iOSR*iDiv))/iBaud; // UART baud rate clock source is PCLK divided by OSR + i1 = (ullRtClk/(iOSR*iDiv))/iBaud-1; //for bigger M and N value + pADI_UART0->COMDIV = i1; + + pADI_UART0->COMFBR = 0x8800|(((((2048/(iOSR*iDiv))*ullRtClk)/i1)/iBaud)-2048); + pADI_UART0->COMIEN = 0; + pADI_UART0->COMLCR = (iFormat&0x3c)|(iBits&3); + + + pADI_UART0->COMFCR = (BITM_UART_COMFCR_RFTRIG & 0/*RX_FIFO_1BYTE*/ ) |BITM_UART_COMFCR_FIFOEN; + pADI_UART0->COMFCR |= BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR; // Clear the UART FIFOs + pADI_UART0->COMFCR &= ~(BITM_UART_COMFCR_RFCLR|BITM_UART_COMFCR_TFCLR); // Disable clearing mechanism + + NVIC_EnableIRQ(UART_EVT_IRQn); // Enable UART interrupt source in NVIC + pADI_UART0->COMIEN = BITM_UART_COMIEN_ERBFI|BITM_UART_COMIEN_ELSI; /* Rx Interrupt */ + return pADI_UART0->COMLSR; +} +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + pADI_UART0->COMTX = c; + while((pADI_UART0->COMLSR&0x20) == 0);// tx fifo empty + return c; +} diff --git a/examples/AD5940_WG/NUCLEO-F411/AD5940_WG.uvoptx b/examples/AD5940_WG/NUCLEO-F411/AD5940_WG.uvoptx new file mode 100644 index 0000000..51f89b0 --- /dev/null +++ b/examples/AD5940_WG/NUCLEO-F411/AD5940_WG.uvoptx @@ -0,0 +1,1008 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + WG_SIN + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U066EFF485457725187092317 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_512 -FS08000000 -FL080000 -FP0($$Device:STM32F411RETx$CMSIS\Flash\STM32F4xx_512.FLM)) + + + + + + 0 + 1 + AppRAMPCfg.CurrRampCode + + + 1 + 1 + AppRAMPCfg.DACCodePerStep + + + 2 + 1 + AppRAMPCfg.CurrRampCode + + + 3 + 1 + AppRAMPCfg.CurrVzeroCode + + + 4 + 1 + VzeroCode + + + 5 + 1 + AppRAMPCfg.VzeroStart + + + 6 + 1 + AppRAMPCfg.VzeroPeak + + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + WG_TRAPZ + 0x4 + ARM-ADS + + 16000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\OUT\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 0 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 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### uVision Project, (C) Keil Software
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RTE\Device\STM32F103C8\startup_stm32f10x_md.s + + + + + + RTE\Device\STM32F103C8\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103C8\system_stm32f10x.c + + + + + + RTE\Device\STM32F103RE\RTE_Device.h + + + + + + RTE\Device\STM32F103RE\startup_stm32f10x_hd.s + + + + + + RTE\Device\STM32F103RE\stm32f10x_conf.h + + + + + + RTE\Device\STM32F103RE\system_stm32f10x.c + + + + + + RTE\Device\STM32F411RETx\RTE_Device.h + + + + + + + + + + + RTE\Device\STM32F411RETx\startup_stm32f411xe.s + + + + + + + + + + + RTE\Device\STM32F411RETx\stm32f4xx_hal_conf.h + + + + + + + + + + + RTE\Device\STM32F411RETx\system_stm32f4xx.c + + + + + + + + + + + + + diff --git a/examples/AD5940_WG/NUCLEO-F411/NUCLEOF411Port.c b/examples/AD5940_WG/NUCLEO-F411/NUCLEOF411Port.c new file mode 100644 index 0000000..c78dd97 --- /dev/null +++ b/examples/AD5940_WG/NUCLEO-F411/NUCLEOF411Port.c @@ -0,0 +1,190 @@ +/** + * @file NUCLEOF411Port.c + * @brief ST NUCLEOF411 board port file. + * @version V0.2.0 + * @author ADI + * @date March 2019 + * @par Revision History: + * + * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + * + * This software is proprietary to Analog Devices, Inc. and its licensors. + * By using this software you agree to the terms of the associated + * Analog Devices Software License Agreement. +**/ +#include "ad5940.h" +#include "stdio.h" +#include "stm32f4xx_hal.h" + +/* Definition for STM32 SPI clock resources */ +#define AD5940SPI SPI1 +#define AD5940_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define AD5940_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define AD5940_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define AD5940_GP0INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define AD5940SPI_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define AD5940SPI_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for AD5940 Pins */ +#define AD5940_SCK_PIN GPIO_PIN_5 +#define AD5940_SCK_GPIO_PORT GPIOA +#define AD5940_SCK_AF GPIO_AF5_SPI1 +#define AD5940_MISO_PIN GPIO_PIN_6 +#define AD5940_MISO_GPIO_PORT GPIOA +#define AD5940_MISO_AF GPIO_AF5_SPI1 +#define AD5940_MOSI_PIN GPIO_PIN_7 +#define AD5940_MOSI_GPIO_PORT GPIOA +#define AD5940_MOSI_AF GPIO_AF5_SPI1 + +#define AD5940_CS_PIN GPIO_PIN_6 +#define AD5940_CS_GPIO_PORT GPIOB + +#define AD5940_RST_PIN GPIO_PIN_0 //A3 +#define AD5940_RST_GPIO_PORT GPIOB + +#define AD5940_GP0INT_PIN GPIO_PIN_10 //A3 +#define AD5940_GP0INT_GPIO_PORT GPIOA +#define AD5940_GP0INT_IRQn EXTI15_10_IRQn + +SPI_HandleTypeDef SpiHandle; + +#define SYSTICK_MAXCOUNT ((1L<<24)-1) /* we use Systick to complete function Delay10uS(). This value only applies to NUCLEOF411 board. */ +#define SYSTICK_CLKFREQ 100000000L /* Systick clock frequency in Hz. This only appies to NUCLEOF411 board */ +volatile static uint8_t ucInterrupted = 0; /* Flag to indicate interrupt occurred */ + +/** + @brief Using SPI to transmit N bytes and return the received bytes. This function targets to + provide a more efficent way to transmit/receive data. + @param pSendBuffer :{0 - 0xFFFFFFFF} + - Pointer to the data to be sent. + @param pRecvBuff :{0 - 0xFFFFFFFF} + - Pointer to the buffer used to store received data. + @param length :{0 - 0xFFFFFFFF} + - Data length in SendBuffer. + @return None. +**/ +void AD5940_ReadWriteNBytes(unsigned char *pSendBuffer,unsigned char *pRecvBuff,unsigned long length) +{ + HAL_SPI_TransmitReceive(&SpiHandle, pSendBuffer, pRecvBuff, length, (uint32_t)-1); +} + +void AD5940_CsClr(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_RESET); +} + +void AD5940_CsSet(void) +{ + HAL_GPIO_WritePin(AD5940_CS_GPIO_PORT, AD5940_CS_PIN, GPIO_PIN_SET); +} + +void AD5940_RstSet(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_SET); +} + +void AD5940_RstClr(void) +{ + HAL_GPIO_WritePin(AD5940_RST_GPIO_PORT, AD5940_RST_PIN, GPIO_PIN_RESET); +} + +void AD5940_Delay10us(uint32_t time) +{ + time/=100; + if(time == 0) time =1; + HAL_Delay(time); +} + +uint32_t AD5940_GetMCUIntFlag(void) +{ + return ucInterrupted; +} + +uint32_t AD5940_ClrMCUIntFlag(void) +{ + ucInterrupted = 0; + return 1; +} + +uint32_t AD5940_MCUResourceInit(void *pCfg) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /* Step1, initialize SPI peripheral and its GPIOs for CS/RST */ + AD5940_SCK_GPIO_CLK_ENABLE(); + AD5940_MISO_GPIO_CLK_ENABLE(); + AD5940_MOSI_GPIO_CLK_ENABLE(); + AD5940_CS_GPIO_CLK_ENABLE(); + AD5940_RST_GPIO_CLK_ENABLE(); + /* Enable SPI clock */ + AD5940_CLK_ENABLE(); + + GPIO_InitStruct.Pin = AD5940_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = AD5940_SCK_AF; + HAL_GPIO_Init(AD5940_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MISO_PIN; + GPIO_InitStruct.Alternate = AD5940_MISO_AF; + HAL_GPIO_Init(AD5940_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_MOSI_PIN; + GPIO_InitStruct.Alternate = AD5940_MOSI_AF; + HAL_GPIO_Init(AD5940_MOSI_GPIO_PORT, &GPIO_InitStruct); + /* SPI CS GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_CS_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(AD5940_CS_GPIO_PORT, &GPIO_InitStruct); + + /* SPI RST GPIO pin configuration */ + GPIO_InitStruct.Pin = AD5940_RST_PIN; + HAL_GPIO_Init(AD5940_RST_GPIO_PORT, &GPIO_InitStruct); + + AD5940_CsSet(); + AD5940_RstSet(); + + /* Set the SPI parameters */ + SpiHandle.Instance = AD5940SPI; + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; //SPI clock should be < AD5940_SystemClock + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW; + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + SpiHandle.Init.Mode = SPI_MODE_MASTER; + HAL_SPI_Init(&SpiHandle); + + /* Step 2: Configure external interrupot line */ + AD5940_GP0INT_GPIO_CLK_ENABLE(); + GPIO_InitStruct.Pin = AD5940_GP0INT_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = 0; + HAL_GPIO_Init(AD5940_GP0INT_GPIO_PORT, &GPIO_InitStruct); + + /* Enable and set EXTI Line0 Interrupt to the lowest priority */ + HAL_NVIC_EnableIRQ(AD5940_GP0INT_IRQn); +// HAL_NVIC_SetPriority(AD5940_GP0INT_IRQn, 0, 0); + return 0; +} + +/* MCU related external line interrupt service routine */ +void EXTI15_10_IRQHandler() +{ + ucInterrupted = 1; + __HAL_GPIO_EXTI_CLEAR_IT(AD5940_GP0INT_PIN); +} + diff --git a/examples/AD5940_WG/NUCLEO-F411/main.c b/examples/AD5940_WG/NUCLEO-F411/main.c new file mode 100644 index 0000000..d4af402 --- /dev/null +++ b/examples/AD5940_WG/NUCLEO-F411/main.c @@ -0,0 +1,182 @@ +/* + +Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved. + +This software is proprietary to Analog Devices, Inc. and its licensors. +By using this software you agree to the terms of the associated +Analog Devices Software License Agreement. + +*/ +#include "stdio.h" +#include "AD5940.h" +#include "stm32f4xx_hal.h" + +/* Functions that used to initialize MCU platform */ +uint32_t MCUPlatformInit(void *pCfg); + +int main(void) +{ + void AD5940_Main(void); + MCUPlatformInit(0); + AD5940_MCUResourceInit(0); /* Initialize resources that AD5940 use, like SPI/GPIO/Interrupt. */ + + printf("Hello AD5940-Build Time:%s\n",__TIME__); + AD5940_Main(); +} + +#define DEBUG_UART USART2 +#define DEBUG_UART_IRQN USART2_IRQn +#define DEBUGUART_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE() +#define DEBUGUART_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +/* Definition for AD5940 Pins */ +#define DEBUGUART_TX_PIN GPIO_PIN_2 +#define DEBUGUART_TX_GPIO_PORT GPIOA +#define DEBUGUART_TX_AF GPIO_AF7_USART2 + +#define DEBUGUART_RX_PIN GPIO_PIN_3 +#define DEBUGUART_RX_GPIO_PORT GPIOA +#define DEBUGUART_RX_AF GPIO_AF7_USART2 + +UART_HandleTypeDef UartHandle; + +void Error_Handler(void){ + while(1); +} +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param husart: SPI handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *husart) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(husart->Instance == DEBUG_UART) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + DEBUGUART_GPIO_CLK_ENABLE(); + /* Enable UART clock */ + DEBUGUART_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* UART TX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_TX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = DEBUGUART_TX_AF; + HAL_GPIO_Init(DEBUGUART_TX_GPIO_PORT, &GPIO_InitStruct); + + /* UART RX GPIO pin configuration */ + GPIO_InitStruct.Pin = DEBUGUART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Alternate = DEBUGUART_RX_AF; + HAL_GPIO_Init(DEBUGUART_RX_GPIO_PORT, &GPIO_InitStruct); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } +} + +uint32_t MCUPlatformInit(void *pCfg) +{ + HAL_Init(); + SystemClock_Config(); + HAL_Init(); + /* Init UART */ + UartHandle.Instance = DEBUG_UART; + + UartHandle.Init.BaudRate = 230400; + UartHandle.Init.WordLength = UART_WORDLENGTH_8B; + UartHandle.Init.StopBits = UART_STOPBITS_1; + UartHandle.Init.Parity = UART_PARITY_NONE; + UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + /* Initialization Error */ + return 0; + } + __HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE); + HAL_NVIC_EnableIRQ(DEBUG_UART_IRQN); + return 1; +} + +void USART2_IRQHandler(void) +{ + //void UARTCmd_Process(char); + volatile char c; + if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) + { + c = USART2->DR; + //UARTCmd_Process(c); + } +} + +#include "stdio.h" +#ifdef __ICCARM__ +int putchar(int c) +#else +int fputc(int c, FILE *f) +#endif +{ + uint8_t t = c; + HAL_UART_Transmit(&UartHandle, &t, 1, 1000); + return c; +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} diff --git a/main/CMakeLists.txt b/main/CMakeLists.txt index a3c67da..9508d66 100644 --- a/main/CMakeLists.txt +++ b/main/CMakeLists.txt @@ -1,3 +1,3 @@ -idf_component_register(SRCS "eis4.c" "eis.c" "echem.c" "ble.c" "temp.c" +idf_component_register(SRCS "eis4.c" "eis.c" "echem.c" "ble.c" "temp.c" "refs.c" INCLUDE_DIRS "." REQUIRES ad5941 ad5941_port bt nvs_flash) diff --git a/main/ble.c b/main/ble.c index 0a3f2d7..e406176 100644 --- a/main/ble.c +++ b/main/ble.c @@ -168,18 +168,23 @@ static void parse_one_sysex(const uint8_t *midi, uint16_t mlen) cmd.cl.t_meas_ms = decode_float(&midi[28]); cmd.cl.lp_rtia = midi[33]; break; - case CMD_SET_TEMP: - if (mlen < 8) return; - cmd.temp_c = decode_float(&midi[3]); - break; + case CMD_START_PH: if (mlen < 8) return; cmd.ph.stabilize_s = decode_float(&midi[3]); break; + case CMD_START_CLEAN: + if (mlen < 13) return; + cmd.clean.v_mv = decode_float(&midi[3]); + cmd.clean.duration_s = decode_float(&midi[8]); + break; case CMD_START_SWEEP: case CMD_GET_CONFIG: case CMD_STOP_AMP: case CMD_GET_TEMP: + case CMD_START_REFS: + case CMD_GET_REFS: + case CMD_CLEAR_REFS: break; default: return; @@ -784,3 +789,27 @@ int ble_send_temp(float temp_c) sx[p++] = 0xF7; return send_sysex(sx, p); } + +int ble_send_ref_frame(uint8_t mode, uint8_t rtia_idx) +{ + uint8_t sx[] = { 0xF0, 0x7D, RSP_REF_FRAME, mode & 0x7F, rtia_idx & 0x7F, 0xF7 }; + return send_sysex(sx, sizeof(sx)); +} + +int ble_send_ref_lp_range(uint8_t mode, uint8_t low_idx, uint8_t high_idx) +{ + uint8_t sx[] = { 0xF0, 0x7D, RSP_REF_LP_RANGE, mode & 0x7F, low_idx & 0x7F, high_idx & 0x7F, 0xF7 }; + return send_sysex(sx, sizeof(sx)); +} + +int ble_send_refs_done(void) +{ + uint8_t sx[] = { 0xF0, 0x7D, RSP_REFS_DONE, 0xF7 }; + return send_sysex(sx, sizeof(sx)); +} + +int ble_send_ref_status(uint8_t has_refs) +{ + uint8_t sx[] = { 0xF0, 0x7D, RSP_REF_STATUS, has_refs & 0x7F, 0xF7 }; + return send_sysex(sx, sizeof(sx)); +} diff --git a/main/ble.h b/main/ble.h index 6b0a215..27c8b30 100644 --- a/main/ble.h +++ b/main/ble.h @@ -13,10 +13,14 @@ #define CMD_START_LSV 0x20 #define CMD_START_AMP 0x21 #define CMD_STOP_AMP 0x22 -#define CMD_SET_TEMP 0x16 + #define CMD_GET_TEMP 0x17 #define CMD_START_CL 0x23 #define CMD_START_PH 0x24 +#define CMD_START_CLEAN 0x25 +#define CMD_START_REFS 0x30 +#define CMD_GET_REFS 0x31 +#define CMD_CLEAR_REFS 0x32 /* Responses: ESP32 → Cue (0x0x) */ #define RSP_SWEEP_START 0x01 @@ -35,6 +39,10 @@ #define RSP_CL_END 0x0E #define RSP_PH_RESULT 0x0F #define RSP_TEMP 0x10 +#define RSP_REF_FRAME 0x20 +#define RSP_REF_LP_RANGE 0x21 +#define RSP_REFS_DONE 0x22 +#define RSP_REF_STATUS 0x23 typedef struct { uint8_t type; @@ -46,8 +54,8 @@ typedef struct { struct { float v_start, v_stop, scan_rate; uint8_t lp_rtia; } lsv; struct { float v_hold, interval_ms, duration_s; uint8_t lp_rtia; } amp; struct { float v_cond, t_cond_ms, v_free, v_total, t_dep_ms, t_meas_ms; uint8_t lp_rtia; } cl; - float temp_c; struct { float stabilize_s; } ph; + struct { float v_mv; float duration_s; } clean; }; } BleCommand; @@ -86,4 +94,10 @@ int ble_send_ph_result(float v_ocp_mv, float ph, float temp_c); /* outbound: temperature */ int ble_send_temp(float temp_c); +/* outbound: reference collection */ +int ble_send_ref_frame(uint8_t mode, uint8_t rtia_idx); +int ble_send_ref_lp_range(uint8_t mode, uint8_t low_idx, uint8_t high_idx); +int ble_send_refs_done(void); +int ble_send_ref_status(uint8_t has_refs); + #endif diff --git a/main/echem.c b/main/echem.c index de29646..50886ee 100644 --- a/main/echem.c +++ b/main/echem.c @@ -8,28 +8,62 @@ #include "freertos/task.h" /* LP RTIA register mapping */ -static const uint32_t lp_rtia_map[] = { +const uint32_t lp_rtia_map[] = { [LP_RTIA_200] = LPTIARTIA_200R, [LP_RTIA_1K] = LPTIARTIA_1K, [LP_RTIA_2K] = LPTIARTIA_2K, + [LP_RTIA_3K] = LPTIARTIA_3K, [LP_RTIA_4K] = LPTIARTIA_4K, + [LP_RTIA_6K] = LPTIARTIA_6K, + [LP_RTIA_8K] = LPTIARTIA_8K, [LP_RTIA_10K] = LPTIARTIA_10K, + [LP_RTIA_12K] = LPTIARTIA_12K, + [LP_RTIA_16K] = LPTIARTIA_16K, [LP_RTIA_20K] = LPTIARTIA_20K, + [LP_RTIA_24K] = LPTIARTIA_24K, + [LP_RTIA_30K] = LPTIARTIA_30K, + [LP_RTIA_32K] = LPTIARTIA_32K, [LP_RTIA_40K] = LPTIARTIA_40K, + [LP_RTIA_48K] = LPTIARTIA_48K, + [LP_RTIA_64K] = LPTIARTIA_64K, + [LP_RTIA_85K] = LPTIARTIA_85K, + [LP_RTIA_96K] = LPTIARTIA_96K, [LP_RTIA_100K] = LPTIARTIA_100K, + [LP_RTIA_120K] = LPTIARTIA_120K, + [LP_RTIA_128K] = LPTIARTIA_128K, + [LP_RTIA_160K] = LPTIARTIA_160K, + [LP_RTIA_196K] = LPTIARTIA_196K, + [LP_RTIA_256K] = LPTIARTIA_256K, [LP_RTIA_512K] = LPTIARTIA_512K, }; /* LP RTIA ohms for current conversion */ -static const float lp_rtia_ohms[] = { +const float lp_rtia_ohms[] = { [LP_RTIA_200] = 200.0f, [LP_RTIA_1K] = 1000.0f, [LP_RTIA_2K] = 2000.0f, + [LP_RTIA_3K] = 3000.0f, [LP_RTIA_4K] = 4000.0f, + [LP_RTIA_6K] = 6000.0f, + [LP_RTIA_8K] = 8000.0f, [LP_RTIA_10K] = 10000.0f, + [LP_RTIA_12K] = 12000.0f, + [LP_RTIA_16K] = 16000.0f, [LP_RTIA_20K] = 20000.0f, + [LP_RTIA_24K] = 24000.0f, + [LP_RTIA_30K] = 30000.0f, + [LP_RTIA_32K] = 32000.0f, [LP_RTIA_40K] = 40000.0f, + [LP_RTIA_48K] = 48000.0f, + [LP_RTIA_64K] = 64000.0f, + [LP_RTIA_85K] = 85000.0f, + [LP_RTIA_96K] = 96000.0f, [LP_RTIA_100K] = 100000.0f, + [LP_RTIA_120K] = 120000.0f, + [LP_RTIA_128K] = 128000.0f, + [LP_RTIA_160K] = 160000.0f, + [LP_RTIA_196K] = 196000.0f, + [LP_RTIA_256K] = 256000.0f, [LP_RTIA_512K] = 512000.0f, }; @@ -279,6 +313,22 @@ static void echem_shutdown_lp(void) /* ---- public ---- */ +int echem_clean(float v_mv, float duration_s) +{ + echem_init_lp(LPTIARTIA_200R); + + uint16_t code = mv_to_vbias_code(v_mv); + AD5940_LPDAC0WriteS(code, VZERO_CODE); + + printf("Clean: %.0f mV for %.0f s\n", v_mv, duration_s); + vTaskDelay(pdMS_TO_TICKS((uint32_t)(duration_s * 1000.0f))); + + echem_shutdown_lp(); + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); + printf("Clean: done\n"); + return 0; +} + void echem_default_lsv(LSVConfig *cfg) { memset(cfg, 0, sizeof(*cfg)); diff --git a/main/echem.h b/main/echem.h index 09c06a0..5e63c47 100644 --- a/main/echem.h +++ b/main/echem.h @@ -9,11 +9,28 @@ typedef enum { LP_RTIA_200 = 0, LP_RTIA_1K, LP_RTIA_2K, + LP_RTIA_3K, LP_RTIA_4K, + LP_RTIA_6K, + LP_RTIA_8K, LP_RTIA_10K, + LP_RTIA_12K, + LP_RTIA_16K, LP_RTIA_20K, + LP_RTIA_24K, + LP_RTIA_30K, + LP_RTIA_32K, LP_RTIA_40K, + LP_RTIA_48K, + LP_RTIA_64K, + LP_RTIA_85K, + LP_RTIA_96K, LP_RTIA_100K, + LP_RTIA_120K, + LP_RTIA_128K, + LP_RTIA_160K, + LP_RTIA_196K, + LP_RTIA_256K, LP_RTIA_512K, LP_RTIA_COUNT } EchemLpRtia; @@ -84,6 +101,8 @@ typedef int (*lsv_point_cb_t)(uint16_t idx, float v_mv, float i_ua); typedef int (*amp_point_cb_t)(uint16_t idx, float t_ms, float i_ua); typedef int (*cl_point_cb_t)(uint16_t idx, float t_ms, float i_ua, uint8_t phase); +int echem_clean(float v_mv, float duration_s); + void echem_default_lsv(LSVConfig *cfg); void echem_default_amp(AmpConfig *cfg); void echem_default_cl(ClConfig *cfg); diff --git a/main/eis4.c b/main/eis4.c index 815a7b6..4f023e3 100644 --- a/main/eis4.c +++ b/main/eis4.c @@ -5,6 +5,7 @@ #include "echem.h" #include "ble.h" #include "temp.h" +#include "refs.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "nvs_flash.h" @@ -16,6 +17,7 @@ static EISPoint results[EIS_MAX_POINTS]; static LSVPoint lsv_results[ECHEM_MAX_POINTS]; static AmpPoint amp_results[ECHEM_MAX_POINTS]; static ClPoint cl_results[ECHEM_MAX_POINTS]; +static RefStore ref_store; static void do_sweep(void) { @@ -162,6 +164,25 @@ void app_main(void) break; } + case CMD_START_CLEAN: + printf("Clean: %.0f mV, %.0f s\n", cmd.clean.v_mv, cmd.clean.duration_s); + echem_clean(cmd.clean.v_mv, cmd.clean.duration_s); + break; + + case CMD_START_REFS: + printf("Ref collection starting\n"); + refs_collect(&ref_store, &cfg); + break; + + case CMD_GET_REFS: + refs_send(&ref_store); + break; + + case CMD_CLEAR_REFS: + refs_clear(&ref_store); + printf("Refs cleared\n"); + break; + case CMD_START_CL: { ClConfig cl_cfg; cl_cfg.v_cond = cmd.cl.v_cond; diff --git a/main/refs.c b/main/refs.c new file mode 100644 index 0000000..fd05bf7 --- /dev/null +++ b/main/refs.c @@ -0,0 +1,333 @@ +#include "refs.h" +#include "ble.h" +#include "temp.h" +#include "ad5940.h" +#include +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" + +/* LP RTIA register mapping (mirrors echem.c) */ +extern const uint32_t lp_rtia_map[]; +extern const float lp_rtia_ohms[]; + +/* ---- ADC helpers ---- */ + +static int32_t read_adc_code(void) +{ + AD5940_INTCClrFlag(AFEINTSRC_SINC2RDY); + AD5940_AFECtrlS(AFECTRL_ADCPWR, bTRUE); + AD5940_Delay10us(25); + AD5940_AFECtrlS(AFECTRL_ADCCNV, bTRUE); + + AD5940_ClrMCUIntFlag(); + while (!AD5940_GetMCUIntFlag()) + vTaskDelay(1); + + AD5940_AFECtrlS(AFECTRL_ADCCNV | AFECTRL_ADCPWR, bFALSE); + AD5940_INTCClrFlag(AFEINTSRC_SINC2RDY); + + uint32_t raw = AD5940_ReadAfeResult(AFERESULT_SINC2); + return (raw & (1UL << 15)) ? (int32_t)(raw | 0xFFFF0000UL) : (int32_t)raw; +} + +/* ---- Clipping detection ---- */ + +#define ADC_OK 0 +#define ADC_CLIPPED 1 +#define ADC_OSCILLATING 2 +#define CLIP_THRESHOLD 30000 +#define PROBE_SAMPLES 8 + +static void init_lp_for_probe(uint32_t rtia_reg) +{ + CLKCfg_Type clk; + memset(&clk, 0, sizeof(clk)); + clk.HFOSCEn = bTRUE; + clk.HfOSC32MHzMode = bFALSE; + clk.SysClkSrc = SYSCLKSRC_HFOSC; + clk.ADCCLkSrc = ADCCLKSRC_HFOSC; + clk.SysClkDiv = SYSCLKDIV_1; + clk.ADCClkDiv = ADCCLKDIV_1; + clk.LFOSCEn = bTRUE; + clk.HFXTALEn = bFALSE; + AD5940_CLKCfg(&clk); + + AFERefCfg_Type ref; + AD5940_StructInit(&ref, sizeof(ref)); + ref.HpBandgapEn = bTRUE; + ref.Hp1V1BuffEn = bTRUE; + ref.Hp1V8BuffEn = bTRUE; + ref.LpBandgapEn = bTRUE; + ref.LpRefBufEn = bTRUE; + ref.LpRefBoostEn = bTRUE; + AD5940_REFCfgS(&ref); + + AD5940_AFEPwrBW(AFEPWR_LP, AFEBW_250KHZ); + + LPLoopCfg_Type lp; + AD5940_StructInit(&lp, sizeof(lp)); + lp.LpDacCfg.LpdacSel = LPDAC0; + lp.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp.LpDacCfg.LpDacSW = LPDACSW_VZERO2LPTIA | LPDACSW_VBIAS2LPPA; + lp.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp.LpDacCfg.DataRst = bFALSE; + lp.LpDacCfg.PowerEn = bTRUE; + lp.LpDacCfg.DacData6Bit = 26; /* VZERO ~1094mV */ + lp.LpDacCfg.DacData12Bit = (uint16_t)((1093.75f - 200.0f) / 0.537f + 0.5f); /* 0mV cell */ + + lp.LpAmpCfg.LpAmpSel = LPAMP0; + lp.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_BOOST3; + lp.LpAmpCfg.LpPaPwrEn = bTRUE; + lp.LpAmpCfg.LpTiaPwrEn = bTRUE; + lp.LpAmpCfg.LpTiaRf = LPTIARF_SHORT; + lp.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lp.LpAmpCfg.LpTiaRtia = rtia_reg; + lp.LpAmpCfg.LpTiaSW = LPTIASW(2) | LPTIASW(4) | LPTIASW(5) | + LPTIASW(7) | LPTIASW(12); + AD5940_LPLoopCfgS(&lp); + + ADCBaseCfg_Type adc; + adc.ADCMuxP = ADCMUXP_LPTIA0_P; + adc.ADCMuxN = ADCMUXN_LPTIA0_N; + adc.ADCPga = ADCPGA_1P5; + AD5940_ADCBaseCfgS(&adc); + + ADCFilterCfg_Type filt; + AD5940_StructInit(&filt, sizeof(filt)); + filt.ADCSinc3Osr = ADCSINC3OSR_4; + filt.ADCSinc2Osr = ADCSINC2OSR_667; + filt.ADCAvgNum = ADCAVGNUM_16; + filt.ADCRate = ADCRATE_800KHZ; + filt.BpNotch = bFALSE; + filt.BpSinc3 = bFALSE; + filt.Sinc2NotchEnable = bTRUE; + filt.Sinc3ClkEnable = bTRUE; + filt.Sinc2NotchClkEnable = bTRUE; + filt.DFTClkEnable = bFALSE; + filt.WGClkEnable = bFALSE; + AD5940_ADCFilterCfgS(&filt); + + AD5940_INTCCfg(AFEINTC_0, AFEINTSRC_SINC2RDY, bTRUE); + AD5940_INTCCfg(AFEINTC_1, AFEINTSRC_SINC2RDY, bTRUE); + AD5940_INTCClrFlag(AFEINTSRC_ALLINT); + + AGPIOCfg_Type gpio; + AD5940_StructInit(&gpio, sizeof(gpio)); + gpio.FuncSet = GP0_INT; + gpio.OutputEnSet = AGPIO_Pin0; + AD5940_AGPIOCfg(&gpio); + + AD5940_WriteReg(REG_AFE_FIFOCON, 0); +} + +static void shutdown_lp(void) +{ + LPLoopCfg_Type lp; + AD5940_StructInit(&lp, sizeof(lp)); + lp.LpDacCfg.LpdacSel = LPDAC0; + lp.LpDacCfg.LpDacSrc = LPDACSRC_MMR; + lp.LpDacCfg.LpDacVzeroMux = LPDACVZERO_6BIT; + lp.LpDacCfg.LpDacVbiasMux = LPDACVBIAS_12BIT; + lp.LpDacCfg.LpDacSW = 0; + lp.LpDacCfg.LpDacRef = LPDACREF_2P5; + lp.LpDacCfg.PowerEn = bFALSE; + lp.LpDacCfg.DataRst = bFALSE; + lp.LpDacCfg.DacData6Bit = 0; + lp.LpDacCfg.DacData12Bit = 0; + lp.LpAmpCfg.LpAmpSel = LPAMP0; + lp.LpAmpCfg.LpAmpPwrMod = LPAMPPWR_NORM; + lp.LpAmpCfg.LpPaPwrEn = bFALSE; + lp.LpAmpCfg.LpTiaPwrEn = bFALSE; + lp.LpAmpCfg.LpTiaRf = LPTIARF_OPEN; + lp.LpAmpCfg.LpTiaRload = LPTIARLOAD_SHORT; + lp.LpAmpCfg.LpTiaRtia = LPTIARTIA_OPEN; + lp.LpAmpCfg.LpTiaSW = 0; + AD5940_LPLoopCfgS(&lp); + + SWMatrixCfg_Type sw = { SWD_OPEN, SWP_OPEN, SWN_OPEN, SWT_OPEN }; + AD5940_SWMatrixCfgS(&sw); +} + +static int check_adc_clipping(uint8_t lp_rtia_idx) +{ + init_lp_for_probe(lp_rtia_map[lp_rtia_idx]); + vTaskDelay(pdMS_TO_TICKS(50)); + + int clip_count = 0; + int sign_changes = 0; + int any_high = 0; + int32_t prev_sign = 0; + + for (int i = 0; i < PROBE_SAMPLES; i++) { + int32_t code = read_adc_code(); + int32_t abs_code = code < 0 ? -code : code; + + if (abs_code > CLIP_THRESHOLD) { + clip_count++; + any_high = 1; + } + + int32_t cur_sign = (code > 0) ? 1 : ((code < 0) ? -1 : 0); + if (i > 0 && cur_sign != 0 && prev_sign != 0 && cur_sign != prev_sign) + sign_changes++; + if (cur_sign != 0) prev_sign = cur_sign; + } + + shutdown_lp(); + AD5940_AFECtrlS(AFECTRL_ALL, bFALSE); + + if (sign_changes >= 3 && any_high) + return ADC_OSCILLATING; + if (clip_count > PROBE_SAMPLES / 2) + return ADC_CLIPPED; + return ADC_OK; +} + +static void lp_find_valid_range(LpRtiaRange *range) +{ + int low_clip = check_adc_clipping(0); + int high_clip = check_adc_clipping(LP_RTIA_512K); + + uint8_t lo = 0, hi = LP_RTIA_512K; + + if (low_clip != ADC_OK) { + /* binary search upward for first non-clipping */ + uint8_t a = 0, b = LP_RTIA_512K; + while (a < b) { + uint8_t m = (a + b) / 2; + if (check_adc_clipping(m) != ADC_OK) + a = m + 1; + else + b = m; + } + lo = a; + } + + if (high_clip != ADC_OK) { + /* binary search downward for last non-clipping */ + uint8_t a = lo, b = LP_RTIA_512K; + while (a < b) { + uint8_t m = (a + b + 1) / 2; + if (check_adc_clipping(m) != ADC_OK) + a = m; + else + b = m - 1; + } + hi = a; + } + + range->low_idx = lo; + range->high_idx = hi; + range->valid = (lo <= hi) ? 1 : 0; +} + +/* ---- Collection ---- */ + +void refs_collect(RefStore *store, const EISConfig *cfg) +{ + memset(store, 0, sizeof(*store)); + + /* EIS phase: sweep each RTIA 0-7 with RCAL=3K */ + EISConfig ref_cfg = *cfg; + ref_cfg.rcal = RCAL_3K; + + for (int r = 0; r < REF_EIS_RTIA_COUNT; r++) { + ref_cfg.rtia = (EISRtia)r; + eis_init(&ref_cfg); + + ble_send_ref_frame(REF_MODE_EIS, (uint8_t)r); + + uint32_t n = eis_calc_num_points(&ref_cfg); + ble_send_sweep_start(n, ref_cfg.freq_start_hz, ref_cfg.freq_stop_hz); + + int got = eis_sweep(store->eis[r].pts, n, ble_send_eis_point); + store->eis[r].n_points = (uint32_t)got; + store->eis[r].valid = (got > 0) ? 1 : 0; + + ble_send_sweep_end(); + printf("Ref EIS RTIA %d: %d pts\n", r, got); + } + + /* LP phase: binary search valid RTIA range for each LP mode */ + printf("Ref: LP range search (LSV)\n"); + ble_send_ref_frame(REF_MODE_LSV, 0); + lp_find_valid_range(&store->lsv_range); + if (store->lsv_range.valid) + ble_send_ref_lp_range(REF_MODE_LSV, store->lsv_range.low_idx, store->lsv_range.high_idx); + printf("Ref LSV range: %u-%u\n", store->lsv_range.low_idx, store->lsv_range.high_idx); + + printf("Ref: LP range search (Amp)\n"); + ble_send_ref_frame(REF_MODE_AMP, 0); + lp_find_valid_range(&store->amp_range); + if (store->amp_range.valid) + ble_send_ref_lp_range(REF_MODE_AMP, store->amp_range.low_idx, store->amp_range.high_idx); + printf("Ref Amp range: %u-%u\n", store->amp_range.low_idx, store->amp_range.high_idx); + + printf("Ref: LP range search (Cl)\n"); + ble_send_ref_frame(REF_MODE_CL, 0); + lp_find_valid_range(&store->cl_range); + if (store->cl_range.valid) + ble_send_ref_lp_range(REF_MODE_CL, store->cl_range.low_idx, store->cl_range.high_idx); + printf("Ref Cl range: %u-%u\n", store->cl_range.low_idx, store->cl_range.high_idx); + + /* pH phase: OCP measurement */ + printf("Ref: pH OCP\n"); + ble_send_ref_frame(REF_MODE_PH, 0); + PhConfig ph_cfg; + ph_cfg.stabilize_s = 10.0f; + ph_cfg.temp_c = temp_get(); + echem_ph_ocp(&ph_cfg, &store->ph_ref); + store->ph_valid = 1; + ble_send_ph_result(store->ph_ref.v_ocp_mv, store->ph_ref.ph, store->ph_ref.temp_c); + + store->has_refs = 1; + ble_send_refs_done(); + printf("Ref collection complete\n"); +} + +/* ---- Send stored refs to client ---- */ + +void refs_send(const RefStore *store) +{ + if (!store->has_refs) { + ble_send_ref_status(0); + return; + } + ble_send_ref_status(1); + + for (int r = 0; r < REF_EIS_RTIA_COUNT; r++) { + if (!store->eis[r].valid) continue; + + ble_send_ref_frame(REF_MODE_EIS, (uint8_t)r); + uint32_t n = store->eis[r].n_points; + ble_send_sweep_start(n, store->eis[r].pts[0].freq_hz, + store->eis[r].pts[n - 1].freq_hz); + for (uint32_t i = 0; i < n; i++) + ble_send_eis_point((uint16_t)i, &store->eis[r].pts[i]); + ble_send_sweep_end(); + } + + if (store->lsv_range.valid) + ble_send_ref_lp_range(REF_MODE_LSV, store->lsv_range.low_idx, store->lsv_range.high_idx); + if (store->amp_range.valid) + ble_send_ref_lp_range(REF_MODE_AMP, store->amp_range.low_idx, store->amp_range.high_idx); + if (store->cl_range.valid) + ble_send_ref_lp_range(REF_MODE_CL, store->cl_range.low_idx, store->cl_range.high_idx); + + if (store->ph_valid) { + ble_send_ref_frame(REF_MODE_PH, 0); + ble_send_ph_result(store->ph_ref.v_ocp_mv, store->ph_ref.ph, store->ph_ref.temp_c); + } + + ble_send_refs_done(); +} + +void refs_clear(RefStore *store) +{ + memset(store, 0, sizeof(*store)); + ble_send_ref_status(0); +} diff --git a/main/refs.h b/main/refs.h new file mode 100644 index 0000000..34634a1 --- /dev/null +++ b/main/refs.h @@ -0,0 +1,41 @@ +#ifndef REFS_H +#define REFS_H + +#include "eis.h" +#include "echem.h" + +#define REF_MODE_EIS 0 +#define REF_MODE_LSV 1 +#define REF_MODE_AMP 2 +#define REF_MODE_CL 3 +#define REF_MODE_PH 4 + +#define REF_EIS_RTIA_COUNT 8 /* RTIA 0-7 (skip ExtDe0) */ + +typedef struct { + uint8_t low_idx; + uint8_t high_idx; + uint8_t valid; +} LpRtiaRange; + +typedef struct { + EISPoint pts[EIS_MAX_POINTS]; + uint32_t n_points; + uint8_t valid; +} EisRefSlot; + +typedef struct { + EisRefSlot eis[REF_EIS_RTIA_COUNT]; + LpRtiaRange lsv_range; + LpRtiaRange amp_range; + LpRtiaRange cl_range; + PhResult ph_ref; + uint8_t ph_valid; + uint8_t has_refs; +} RefStore; + +void refs_collect(RefStore *store, const EISConfig *cfg); +void refs_send(const RefStore *store); +void refs_clear(RefStore *store); + +#endif